Po-Hsun Wu

18 papers A 2Journal 9Unranked 7
YearRankTypeTitle / Venue / Authors
2022 J jnl
Robust H
IEEE Access
Bor-Sen Chen, Po-Hsun Wu
2021 J jnl
Robust H
IEEE Access
Bor-Sen Chen, Po-Hsun Wu, Min-Yen Lee
2019 — conf
Auto-focus pathology microscope using sub-array sampling.
I2MTC
Po-Hsun Wu, Chun-Jen Weng, Pi-Ying Cheng
2016 J jnl
Parasitic-Aware Common-Centroid FinFET Placement and Routing for Current-Ratio Matching.
ACM Trans. Design Autom. Electr. Syst.
Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, Tsung-Yi Ho
2015 J jnl
A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Xin Li, Tsung-Yi Ho
2015 — conf
Analog layout synthesis with knowledge mining.
ECCTD
Po-Hsun Wu, Mark Po-Hung Lin, Tsung-Yi Ho
2015 — conf
Common-Centroid FinFET Placement Considering the Impact of Gate Misalignment.
ISPD
Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, Tsung-Yi Ho
2014 — conf
A topology-based ECO routing methodology for mask cost minimization.
ASP-DAC
Po-Hsun Wu, Shang-Ya Bai, Tsung-Yi Ho
2014 J jnl
Exploring Feasibilities of Symmetry Islands and Monotonic Current Paths in Slicing Trees for Analog Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Tsung-Yi Ho, Bin-Da Liu
2014 J jnl
Placement optimization of flexible TFT circuits with mechanical strain and temperature consideration.
ACM J. Emerg. Technol. Comput. Syst.
Jiun-Li Lin, Po-Hsun Wu, Tsung-Yi Ho
2014 — conf
Triangle-based process hotspot classification with dummification in EUVL.
VLSI-DAT
Po-Hsun Wu, Che-Wen Chen, Chi-Ruo Wu, Tsung-Yi Ho
2013 J jnl
1-D Cell Generation With Printability Enhancement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen, Shun-Ren Siao, Shu-Hung Lin
2013 — conf
A novel cell placement algorithm for flexible TFT circuit with mechanical strain and temperature consideration.
ASP-DAC
Jiun-Li Lin, Po-Hsun Wu, Tsung-Yi Ho
2013 J jnl
Bus-driven floorplanning with thermal consideration.
Integr.
Po-Hsun Wu, Tsung-Yi Ho
2013 — conf
Lithography-aware 1-dimensional cell generation.
ECCTD
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen
2012 J jnl
Bus-driven floorplanning with bus pin assignment and deviation minimization.
Integr.
Po-Hsun Wu, Tsung-Yi Ho
2012 A conf
Performance-driven analog placement considering monotonic current paths.
ICCAD
Po-Hsun Wu, Mark Po-Hung Lin, Yang-Ru Chen, Bing-Shiun Chou, Tung-Chieh Chen, Tsung-Yi Ho, Bin-Da Liu
2011 A conf
Thermal-aware bus-driven floorplanning.
ISLPED
Po-Hsun Wu, Tsung-Yi Ho