Po-Cheng Pan

14 papers A* 3A 4Journal 2Unranked 5
YearRankTypeTitle / Venue / Authors
2024 — conf
Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization.
MWSCAS
Bo-Han Li, Kuan-Chih Lin, Hao Zuo, Po-Cheng Pan, Hung-Ming Chen, Shyh-Jye Jou, Chien-Nan Jimmy Liu, Bo-Cheng Lai
2020 J jnl
Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Wei-Zen Chen
2019 A* conf
An Efficient Learning-based Approach for Performance Exploration on Analog and RF Circuit Synthesis.
DAC
Po-Cheng Pan, Chien-Chia Huang, Hung-Ming Chen
2018 A* conf
Analog placement with current flow and symmetry constraints using PCP-SP.
DAC
Abhishek Patyal, Po-Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao-Yu Chi, Chien-Nan Liu
2018 — conf
On Closing the Gap Between Pre-Simulation and Post-Simulation Results in Nanometer Analog Layouts.
SMACD
Po-Cheng Pan, Hung-Wen Huang, Chien-Chia Huang, Abhishek Patyal, Hung-Ming Chen, Tsun-Yu Yang
2015 J jnl
A Fast Prototyping Framework for Analog Layout Migration With Planar Preservation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Po-Cheng Pan, Ching-Yu Chin, Hung-Ming Chen, Tung-Chieh Chen, Chin-Chieh Lee, Jou-Chun Lin
2015 A* conf
R2P: Recomposition and Retargeting of Photographic Images.
ACM Multimedia
Hui-Tang Chang, Po-Cheng Pan, Yu-Chiang Frank Wang, Ming-Syan Chen
2014 — conf
An automatic synthesis tool for nanometer low dropout regulator using simulation based model and geometric programming.
VLSI-DAT
Shih-Hsin Hsu, Wei-Zen Chen, Jui-Pin Zheng, Sean S.-Y. Liu, Po-Cheng Pan, Hung-Ming Chen
2013 A conf
Efficient analog layout prototyping by layout reuse with routing preservation.
ICCAD
Ching-Yu Chin, Po-Cheng Pan, Hung-Ming Chen, Tung-Chieh Chen, Jou-Chun Lin
2013 A conf
PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design.
DATE
Po-Cheng Pan, Hung-Ming Chen, Chien-Chih Lin
2012 A conf
Configurable analog routing methodology via technology and design constraint unification.
ICCAD
Po-Cheng Pan, Hung-Ming Chen, Yi-Kan Cheng, Jill Liu, Wei-Yi Hu
2011 A conf
Fast analog layout prototyping for nanometer design migration.
ICCAD
Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen
2011 — conf
Integrated hierarchical synthesis of analog/RF circuits with accurate performance mapping.
ISQED
Kuo-Hsuan Meng, Po-Cheng Pan, Hung-Ming Chen
2009 — conf
A stochastic-based efficient critical area extractor on OpenAccess platform.
ACM Great Lakes Symposium on VLSI
Bo-Zhou Chen, Hung-Ming Chen, Li-Da Huang, Po-Cheng Pan