Po-Chang Wu

16 papers A* 1C 1Journal 6Unranked 8
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 43.4-dB Gain 7.6-mW 197.5% Bandwidth Double Noise-Canceling Cryogenic LNA Using Gain Peaking Technique for Multiple Spin Qubit Readout.
IEEE Trans. Circuits Syst. II Express Briefs
Mahesh Kumar Chaubey, Yin-Cheng Chang, Po-Chang Wu, Hann-Huei Tsai, Shawn S. H. Hsu
2024 J jnl
A 0.01-to-2.6-GHz Two-Fold Current Reuse Dual Noise-Canceling LNA Achieving 6.8-K Noise Temperature for Quantum Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Mahesh Kumar Chaubey, Chih-Cheng Lin, Yin-Cheng Chang, Po-Chang Wu, Hann-Huei Tsai, Shawn S. H. Hsu
2020 J jnl
A Low-Power Low-Noise Monolithic Accelerometer with Automatic Sensor Offset Calibration.
Microelectron. J.
Chih-Yuan Yeh, Jung-Tang Huang, Sheng-Hsiang Tseng, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang
2020 A* conf
Late Breaking Results: Automatic Adaptive MOM Capacitor Cell Generation for Analog and Mixed-Signal Layout Design.
DAC
Tzu-Wei Wang, Po-Chang Wu, Mark Po-Hung Lin
2019 — conf
A 2.5D mm-size Wafer-level CMOS-IPD Wireless Power Transfer Receiver Using Cross-coupled and Self-biasing Topology for Implantable Biomedical System.
APCCAS
Kuei-Cheng Lin, Po-Chang Wu, Yu-Chen Liu, Hann-Huei Tsai, Ying-Zong Juang
2019 — conf
A Low-Cost 70Mbps Optical Detector Design For Optocoupler Application.
APCCAS
Yu-Chen Liu, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang
2019 J jnl
A low-power monolithic three-axis accelerometer with automatically sensor offset compensated and interface circuit.
Microelectron. J.
Chih-Yuan Yeh, Jung-Tang Huang, Sheng-Hsiang Tseng, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang
2017 J jnl
An Efficient GPU-Based Multiple Pattern Matching Algorithm for Packet Filtering.
J. Signal Process. Syst.
Che-Lun Hung, Chun-Yuan Lin, Po-Chang Wu
2016 — conf
A low power and low noise CMOS chopper amplifier for use in capacitive type accelerometer.
APCCAS
Chih-Yuan Yeh, Jung-Tang Huang, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang
2016 J jnl
Dielectric characterization and voltage holding ratio of blue-phase cells.
Displays
Po-Chang Wu, Hsuan-Tsung Hsu, Hsin-Li Chen, Wei Lee
2016 — conf
Low-frequency noise reduction technique for accelerometer readout circuit.
APCCAS
Po-Chang Wu, Chih-Yuan Yeh, Hann-Huei Tsai, Ying-Zong Juang
2015 — conf
Design of a 0.6-V 0.2-mW CMOS MEMS accelerometer.
ICCE-TW
Po-Chang Wu, Bin-Da Liu, Chih-Yuan Yeh, Sheng-Hsiang Tseng, Hann-Huei Tsai, Ying-Zong Juang
2015 — conf
Efficient Parallel Muti-pattern Matching Using GPGPU Acceleration for Packet Filtering.
HPCC/CSS/ICESS
Che-Lun Hung, Po-Chang Wu, Hsiao-Hsi Wang, Chun-Yuan Lin
2014 C conf
5-GHz SiGe linearity power amplifier using integrated feedforward architecture for WLAN applications.
ISCAS
Kuei-Cheng Lin, Hwann-Kaeo Chiou, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang
2013 — conf
Novel automatic offset cancellation approach for capacitive CMOS MEMS accelerometers.
ISCE
Po-Chang Wu, Bin-Da Liu, Yu-Chen Teng, Chih-Yuan Yeh, Sheng-Hsiang Tseng, Hann-Huei Tsai, Ying-Zong Juang
2012 — conf
Variable gain active predistorter with linearity enhancement for a 2.4 GHz SiGe HBT power amplifier design.
VLSI-DAT
Kuei-Cheng Lin, Hwann-Kaeo Chiou, Po-Chang Wu, Chu-Jung Sha, Chun-Lin Ko, Da-Chiang Chang, Ying-Zong Juang