Pinaki Mazumder

155 papers A* 3A 18B 1C 3Misc 16Journal 72Unranked 41

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Relaxation-based dynamical Ising machines for discrete tomography. CoRR Mikhail Erementchouk, Aditya Shukla, Pinaki Mazumder
2025	J	`jnl`	Scalable almost-linear dynamical Ising machines. Nat. Comput. Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder
2024	J	`jnl`	Non-binary dynamical Ising machines for combinatorial optimization. CoRR Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder
2023	J	`jnl`	Custom CMOS Ising Machine Based on Relaxed Burer-Monteiro-Zhang Heuristic. IEEE Trans. Computers Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder
2023	J	`jnl`	NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report. CoRR Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David M. Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine
2023	J	`jnl`	Self-contained relaxation-based dynamical Ising machines. CoRR Mikhail Erementchouk, Aditya Shukla, Pinaki Mazumder
2022	J	`jnl`	Dynamic Pinning Synchronization of Fuzzy-Dependent-Switched Coupled Memristive Neural Networks With Mismatched Dimensions on Time Scales. IEEE Trans. Fuzzy Syst. Xiangxiang Wang, Yongbin Yu, JingYe Cai, Shouming Zhong, Nijing Yang, Kaibo Shi, Pinaki Mazumder, Tashi Nyima
2022	J	`jnl`	Scalable almost-linear dynamical Ising machines. CoRR Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder
2021	J	`jnl`	Navigating the Seismic Shift of Post-Moore Computer Systems Design. IEEE Micro Anindya Banerjee, Sankar Basu, Erik Brunvand, Pinaki Mazumder, Rance Cleaveland, Gurdip Singh, Margaret Martonosi, Fernanda Pembleton
2020	—	`conf`	Convolutional Neural Network Design for Breast Cancer Medical Image Classification. ICCT Yongbin Yu, Favour Ekong, Pinaki Mazumder
2020	—	`conf`	Process Variation in Spoof Plasmon Interconnect: Consequences and Compensations. RWS Md. Faizul Bari, Soumitra Roy Joy, Md. Zunaid Baten, Pinaki Mazumder
2020	J	`jnl`	Terahertz Quantum Cryptography. IEEE J. Sel. Areas Commun. Carlo Ottaviani, Matthew J. Woolley, Misha Erementchouk, John F. Federici, Pinaki Mazumder, Stefano Pirandola, Christian Weedbrook
2019	J	`jnl`	Spoof Plasmon Interconnects - Communications Beyond RC Limit. IEEE Trans. Commun. Soumitra Roy Joy, Mikhail Erementchouk, Hao Yu, Pinaki Mazumder
2018	Misc	`conf`	A Low-Power Circuit for Adaptive Dynamic Programming. VLSID Nan Zheng, Pinaki Mazumder
2018	C	`conf`	A Low-Power Hardware Architecture for On-Line Supervised Learning in Multi-Layer Spiking Neural Networks. ISCAS Nan Zheng, Pinaki Mazumder
2018	J	`jnl`	A Scalable Low-Power Reconfigurable Accelerator for Action-Dependent Heuristic Dynamic Programming. IEEE Trans. Circuits Syst. I Regul. Pap. Nan Zheng, Pinaki Mazumder
2018	J	`jnl`	Online Supervised Learning for Hardware-Based Multilayer Spiking Neural Networks Through the Modulation of Weight-Dependent Spike-Timing-Dependent Plasticity. IEEE Trans. Neural Networks Learn. Syst. Nan Zheng, Pinaki Mazumder
2017	J	`jnl`	A robust 12T SRAM cell with improved write margin for ultra-low power applications in 40 nm CMOS. Integr. Jaeyoung Kim, Pinaki Mazumder
2017	J	`jnl`	An Efficient Eligible Error Locator Polynomial Searching Algorithm and Hardware Architecture for One-Pass Chase Decoding of BCH Codes. IEEE Trans. Circuits Syst. II Express Briefs Nan Zheng, Pinaki Mazumder
2017	J	`jnl`	Energy-Efficient Hardware Architecture of Self-Organizing Map for ECG Clustering in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Jaeyoung Kim, Pinaki Mazumder
2017	J	`jnl`	Hardware-Friendly Actor-Critic Reinforcement Learning Through Modulation of Spike-Timing-Dependent Plasticity. IEEE Trans. Computers Nan Zheng, Pinaki Mazumder
2017	J	`jnl`	Modeling and Mitigation of Static Noise Margin Variation in Subthreshold SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. Nan Zheng, Pinaki Mazumder
2016	J	`jnl`	Digital implementation of a virtual insect trained by spike-timing dependent plasticity. Integr. Pinaki Mazumder, Di Hu, Idongesit E. Ebong, Xu Zhang, Ziye Xu, Silvia Ferrari
2015	J	`jnl`	Memristor-Based Cellular Nonlinear/Neural Network: Design, Analysis, and Applications. IEEE Trans. Neural Networks Learn. Syst. Shukai Duan, Xiaofang Hu, Zhekang Dong, Lidan Wang, Pinaki Mazumder
2014	C	`conf`	A low-power reconfigurable CMOS power amplifier for wireless sensor network applications. ISCAS Nan Zheng, Jaeyoung Kim, Pinaki Mazumder
2013	—	`conf`	A 250mV sub-threshold asynchronous 8051microcontroller with a novel 16T SRAM cell for improved reliability in 40nm CMOS. ACM Great Lakes Symposium on VLSI Jaeyoung Kim, Kwen-Siong Chong, Joseph Sylvester Chang, Pinaki Mazumder
2013	J	`jnl`	Color image processing with multi-peak resonant tunneling diodes. ACM J. Emerg. Technol. Comput. Syst. Woo Hyung Lee, Pinaki Mazumder
2013	J	`jnl`	Nonvolatile Nanopipelining Logic Using Multiferroic Single-Domain Nanomagnets. IEEE Trans. Very Large Scale Integr. Syst. Yalcin Yilmaz, Pinaki Mazumder
2012	J	`jnl`	CMOS and Memristor-Based Neural Network Design for Position Detection. Proc. IEEE Idongesit E. Ebong, Pinaki Mazumder
2012	—	`conf`	Comparison of FFT/IFFT Designs Utilizing Different Low Power Techniques. ISED Kwen-Siong Chong, Joseph S. Chang, Idongesit E. Ebong, Yalcin Yilmaz, Pinaki Mazumder
2012	J	`jnl`	Memristor-based RRAM with applications. Sci. China Inf. Sci. Shukai Duan, Xiaofang Hu, Lidan Wang, Chuandong Li, Pinaki Mazumder
2012	J	`jnl`	Memristors: Devices, Models, and Applications [Scanning the Issue]. Proc. IEEE Pinaki Mazumder, Sung-Mo Kang, Rainer Waser
2011	J	`jnl`	Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. IEEE Trans. Computers Alfredo Benso, Yiorgos Makris, Pinaki Mazumder
2011	—	`conf`	Threshold Read Method for Multi-bit Memristive Crossbar Memory. ISED Yalcin Yilmaz, Pinaki Mazumder
2009	A	`conf`	An accurate interconnect thermal model using equivalent transmission line circuit. DATE Baohua Wang, Pinaki Mazumder
2009	—	`conf`	Disruptive technologies and neurally-inspired architectures. ACM Great Lakes Symposium on VLSI Pinaki Mazumder
2009	J	`jnl`	Tunneling-Based Cellular Nonlinear Network Architectures for Image Processing. IEEE Trans. Very Large Scale Integr. Syst. Pinaki Mazumder, Sing-Rong Li, Idongesit E. Ebong
2007	J	`jnl`	Accelerated Chip-Level Thermal Analysis Using Multilayer Green's Function. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Baohua Wang, Pinaki Mazumder
2007	J	`jnl`	Efficient Modeling of Transmission Lines With Electromagnetic Wave Coupling by Using the Finite Difference Quadrature Method. IEEE Trans. Very Large Scale Integr. Syst. Qinwei Xu, Pinaki Mazumder
2006	A	`conf`	A logarithmic full-chip thermal analysis algorithm based on multi-layer Green's function. DATE Baohua Wang, Pinaki Mazumder
2006	Misc	`conf`	Bounding Supply Noise Induced Path Delay Variation Using a Relaxation Approach. VLSI Design Baohua Wang, Pinaki Mazumder
2006	—	`conf`	Optimization of circuit trajectories: an auxiliary network approach. ASP-DAC Baohua Wang, Pinaki Mazumder
2006	—	`conf`	Parallel Processing Based Power Reduction in a 256 State Viterbi Decoder. ASAP Woo Hyung Lee, Pinaki Mazumder
2005	—	`conf`	Design of a new sense amplifier flip-flop with improved power-delay-product. ISCAS (2) Hui Zhang, Pinaki Mazumder
2005	A	`conf`	EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation. DATE Baohua Wang, Pinaki Mazumder
2005	—	`conf`	Integrating lumped networks into full wave TLM/FDTD methods using passive discrete circuit models. ISCAS (3) Baohua Wang, Pinaki Mazumder
2005	Misc	`conf`	Multivariate Normal Distribution Based Statistical Timing Analysis Using Global Projection and Local Expansion. VLSI Design Baohua Wang, Pinaki Mazumder
2005	—	`conf`	New logic circuits consisting of quantum dots and CMOS. ECCTD Woo Hyung Lee, Pinaki Mazumder
2005	—	`conf`	On the functional failure and switching time analysis of the MOBILE circuit [monostable-bistable logic element]. ISCAS (3) Sing-Rong Li, Pinaki Mazumder, Kyounghoon Yang
2004	A*	`conf`	A novel technique to improve noise immunity of CMOS dynamic logic circuits. DAC Li Ding, Pinaki Mazumder
2004	Misc	`conf`	Dynamic Noise Margin: Definitions and Model. VLSI Design Li Ding, Pinaki Mazumder
2004	—	`conf`	Fast thermal analysis for VLSI circuits via semi-analytical Green's function in multi-layer materials. ISCAS (2) Baohua Wang, Pinaki Mazumder
2004	—	`conf`	Modeling of transmission lines with EM wave coupling by the finite difference quadrature method. ACM Great Lakes Symposium on VLSI Qinwei Xu, Pinaki Mazumder
2004	J	`jnl`	On circuit techniques to improve noise immunity of CMOS dynamic logic. IEEE Trans. Very Large Scale Integr. Syst. Li Ding, Pinaki Mazumder
2004	A	`conf`	On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED Baohua Wang, Pinaki Mazumder
2004	A	`conf`	On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED Baohua Wang, Pinaki Mazumder
2004	—	`conf`	On the implementation of RTD based CNNs. ISCAS (3) Sing-Rong Li, Pinaki Mazumder, Leon O. Chua
2004	—	`conf`	Resonant tunnelling diode based QMOS edge triggered flip-flop design. ISCAS (3) Hui Zhang, Pinaki Mazumder, Kyounghoon Yang
2003	J	`jnl`	Accurate crosstalk noise modeling for early signal integrity analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Li Ding, David T. Blaauw, Pinaki Mazumder
2003	Misc	`conf`	Comparison of Bistable Circuits Based on Resonant-Tunneling Diodes. VLSI Design Alejandro F. González, Pinaki Mazumder
2003	—	`conf`	Efficient interconnect modeling by Finite Difference Quadrature methods. ISCAS (4) Qinwei Xu, Pinaki Mazumder
2003	J	`jnl`	Equivalent-circuit interconnect modeling based on the fifth-order differential quadrature methods. IEEE Trans. Very Large Scale Integr. Syst. Qinwei Xu, Pinaki Mazumder
2003	A	`conf`	Modeling Noise Transfer Characteristic of Dynamic Logic Gates. DATE Li Ding, Pinaki Mazumder
2003	—	`conf`	Performance modeling of resonant tunneling based RAMs. ISCAS (4) Hui Zhang, Pinaki Mazumder, Li Ding, Kyounghoon Yang
2003	J	`jnl`	Simultaneous switching noise analysis using application specific device modeling. IEEE Trans. Very Large Scale Integr. Syst. Li Ding, Pinaki Mazumder
2003	—	`conf`	Subgridding method for speeding up FD-TLM circuit simulation. ISCAS (3) Baohua Wang, Pinaki Mazumder
2003	Misc	`conf`	The Impact of Bit-Line Coupling and Ground Bounce on CMOS SRAM Performance. VLSI Design Li Ding, Pinaki Mazumder
2002	A	`conf`	Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling. DATE Li Ding, Pinaki Mazumder
2002	—	`conf`	Crosstalk noise estimation using effective coupling capacitance. ISCAS (5) Li Ding, Pinaki Mazumder, David T. Blaauw
2002	—	`conf`	Efficient Macromodeling for On-Chip Interconnects. ASP-DAC/VLSI Design Qinwei Xu, Pinaki Mazumder
2002	A	`conf`	Efficient crosstalk noise modeling using aggressor and tree reductions. ICCAD Li Ding, David T. Blaauw, Pinaki Mazumder
2002	A	`conf`	Formulation of Low-Order Dominant Poles for Y-Matrix of Interconnects. DATE Qinwei Xu, Pinaki Mazumder
2002	—	`conf`	Modified long channel model for analytical study of DSM circuits. ISCAS (5) Li Ding, Pinaki Mazumder
2002	—	`conf`	Novel interconnect modeling by using high-order compact finite difference methods. ACM Great Lakes Symposium on VLSI Qinwei Xu, Pinaki Mazumder
2002	—	`conf`	Novel macromodeling for on-chip RC/RLC interconnects. ISCAS (4) Qinwei Xu, Pinaki Mazumder, Li Ding
2002	A	`conf`	Optimal Transistor Tapering for High-Speed CMOS Circuits. DATE Li Ding, Pinaki Mazumder
2002	—	`conf`	Rational ABCD Modeling of High-Speed Interconnects. ASP-DAC/VLSI Design Qinwei Xu, Pinaki Mazumder
2002	—	`conf`	Rise time analysis of MOBILE circuit. ISCAS (5) Tetsuya Uemura, Pinaki Mazumder
2001	—	`conf`	A 250-MHz, 32-bit quantum MOS correlator prototype. ICECS Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González, Pinaki Mazumder
2001	—	`conf`	A dual-rail static edge-triggered latch. ISCAS (2) Li Ding, Pinaki Mazumder, N. Srinivas
2001	J	`jnl`	A physical design tool for built-in self-repairable RAMs. IEEE Trans. Very Large Scale Integr. Syst. Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta
2001	J	`jnl`	Augmentation of SPICE for simulation of circuits containingresonant tunneling diodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mayukh Bhattacharya, Pinaki Mazumder
2001	J	`jnl`	CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differentiaI-resistance devices. IEEE J. Solid State Circuits Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
2001	A	`conf`	Efficient and passive modeling of transmission lines by using differential quadrature method. DATE Qinwei Xu, Pinaki Mazumder
2001	Misc	`conf`	Fd-Tlm Electromagnetic Field Simulation Of High-Speed Iii-V Heterojunction Bipolar Transistor Digital Logic Gates. VLSI Design Mayukh Bhattacharya, Pinaki Mazumder, Ronald J. Lomax
2001	Misc	`conf`	Modeling of Nonuniform Interconnects by Using Differential Quadrature Method. VLSI Design Qinwei Xu, Pinaki Mazumder, Mayukh Bhattacharya
2001	Misc	`conf`	Transmission Line Modeling by Modified Method of Characteristics. VLSI Design Qinwei Xu, Pinaki Mazumder, Zheng-Fan Li
2000	C	`conf`	A prototyping technique for large-scale RTD-CMOS circuits. ISCAS Mayukh Bhattacharya, Shriram Kulkarni, Alejandro F. González, Pinaki Mazumder
2000	Misc	`conf`	Convergence Issues in Resonant Tunneling Diode Circuit Simulation. VLSI Design Mayukh Bhattacharya, Pinaki Mazumder
2000	J	`jnl`	New March Tests for Multiport RAM Devices. J. Electron. Test. Kanad Chakraborty, Pinaki Mazumder
2000	J	`jnl`	Redundant arithmetic, algorithms and implementations. Integr. Alejandro F. González, Pinaki Mazumder
2000	—	`conf`	Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. ISMVL Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
1999	A	`conf`	A Physical Design Tool for Built-in Self-Repairable Static RAMs. DATE Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
1999	—	`conf`	Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit. Great Lakes Symposium on VLSI Tetsuya Uemura, Pinaki Mazumder
1999	—	`conf`	Integration of InAs/AlSb/GaSb Resonant Interband Tunneling Diodes with Heterostructure Field-Effect Transistors for Ultra-High-Speed Digital Circuit Applications. Great Lakes Symposium on VLSI Patrick Fay, Gary H. Bernstein, David H. Chow, Joel N. Schulman, Pinaki Mazumder, William Williamson III, Barry K. Gilbert
1999	J	`jnl`	Special Issue On Quantum Devices And Their Applications. Proc. IEEE Alan C. Seabaugh, Pinaki Mazumder
1998	—	`conf`	A Silicon Compiler for Fault-Tolerant ROMs. DFT Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder
1998	Misc	`conf`	Analysis of Failures in Deep Submicron SRAM Cells. VTS Pinaki Mazumder
1998	Misc	`conf`	Circuit Design using Resonant Tunneling Diodes. VLSI Design Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González
1998	J	`jnl`	Digital circuit applications of resonant tunneling devices. Proc. IEEE Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Jian Ping Sun, George I. Haddad
1998	J	`jnl`	FTROM: A Silicon Compiler for Fault-tolerant ROMs. Integr. Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder
1998	J	`jnl`	Guest Editorial Special Section On Impacts Of Emerging Technologies On VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. Pinaki Mazumder
1998	J	`jnl`	Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices. IEEE Trans. Computers Alejandro F. González, Pinaki Mazumder
1998	—	`conf`	Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes. Great Lakes Symposium on VLSI Mayukh Bhattacharya, Pinaki Mazumder
1998	J	`jnl`	Resonant tunneling diodes: models and properties. Proc. IEEE Jian Ping Sun, George I. Haddad, Pinaki Mazumder, Joel N. Schulman
1997	—	`conf`	A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs. ED&TC Kanad Chakraborty, Pinaki Mazumder
1997	—	`conf`	Compact Signed-Digit Adder Using Multiple-Valued Logic. ARVLSI Alejandro F. González, Pinaki Mazumder
1996	Misc	`conf`	A high-speed 32-bit parallel correlator for spread spectrum communication. VLSI Design Shriram Kulkarni, Pinaki Mazumder, George I. Haddad
1996	A	`conf`	An efficient, bus-layout based method for early diagnosis of bussed driver shorts in printed circuit boards. ICCAD Kanad Chakraborty, Pinaki Mazumder
1996	J	`jnl`	Compact multiple-valued multiplexers using negative differential resistance devices. IEEE J. Solid State Circuits H. L. Chan, Sundarar Mohan, Pinaki Mazumder, George I. Haddad
1996	J	`jnl`	Generation of Minimal Vertex Covers for Row/Column Allocation in Self-Repairable Arrays. IEEE Trans. Computers Michael D. Smith, Pinaki Mazumder
1995	J	`jnl`	Device and circuit simulation of quantum electronic devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sundarar Mohan, Jian Ping Sun, Pinaki Mazumder, George I. Haddad
1995	Misc	`conf`	Genetic multiway partitioning. VLSI Design Khushro Shahookar, Pinaki Mazumder
1994	—	`conf`	A Genetic Algorithm for the Steiner Problem in a Graph. EDAC-ETC-EUROASIC Henrik Esbensen, Pinaki Mazumder
1994	—	`conf`	A Systolic Architecture for High Speed Hypergraph Partitioning Using a Genetic Algorithm. Evo Workshops Heming Chan, Pinaki Mazumder
1994	J	`jnl`	A survey of DA techniques for PLD and FPGA based systems. Integr. Raja Venkateswaran, Pinaki Mazumder
1994	J	`jnl`	Guest editor's introduction. J. Electron. Test. Pinaki Mazumder
1994	Misc	`conf`	SAGA: A Unification of the Genetic Algorithm with Simulated Annealing and its Application to Macro-Cell Placement. VLSI Design Henrik Esbensen, Pinaki Mazumder
1994	J	`jnl`	Technology and layout-related testing of static random-access memories. J. Electron. Test. Kanad Chakraborty, Pinaki Mazumder
1993	J	`jnl`	A new built-in self-repair approach to VLSI memory yield enhancement by using neural-type circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pinaki Mazumder, Jih-Shyr Yih
1993	J	`jnl`	Analytical and simulation studies of failure modes in SRAMs using high electron mobility transistors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sundarar Mohan, Pinaki Mazumder
1993	J	`jnl`	Coprocessor design for multilayer surface-mounted PCB routing. IEEE Trans. Very Large Scale Integr. Syst. Raja Venkateswaran, Pinaki Mazumder
1993	J	`jnl`	Design of a Fault-Tolerant Three-Dimensional Dynamic Random-Access Memory with On-Chip Error-Correcting Circuit. IEEE Trans. Computers Pinaki Mazumder
1993	Misc	`conf`	Genetic Beam Search for Gate Matrix Layout. VLSI Design Khushro Shahookar, W. Khamisani, Pinaki Mazumder, Sudhakar M. Reddy
1993	J	`jnl`	Guest Editor's Introduction: Testing and Improving the Testability of Multimegabit Memories. IEEE Des. Test Comput. Pinaki Mazumder, John P. Hayes
1993	J	`jnl`	Restructuring of square processor arrays by built-in self-repair circuit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pinaki Mazumder, Jih-Shyr Yih
1993	J	`jnl`	Wolverines: standard cell placement on a network of workstations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sundarar Mohan, Pinaki Mazumder
1992	A	`conf`	An Integrated Built-In Self-Testing and Self-Repair of VLSI/WSI Hexagonal Arrays. ITC Pinaki Mazumder
1992	J	`jnl`	An efficient design of embedded memories and their testability analysis using Markov chains. J. Electron. Test. Pinaki Mazumder, Janak H. Patel
1992	J	`jnl`	An on-chip ECC circuit for correcting soft errors in DRAMs with trench capacitors. IEEE J. Solid State Circuits Pinaki Mazumder
1992	J	`jnl`	Restructuring WSI hexagonal processor arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Raja Venkateswaran, Pinaki Mazumder, K. G. Shin
1992	—	`conf`	Wolverines: standard cell placement on a network of workstations. EURO-DAC Sundarar Mohan, Pinaki Mazumder
1991	J	`jnl`	Circuit behavior modeling and compact testing performance evaluation. IEEE J. Solid State Circuits Jih-Shyr Yih, Pinaki Mazumder
1991	A	`conf`	Fault Modeling and Testing of GaAs Static Random Access Memories. ITC Sundarar Mohan, Pinaki Mazumder
1991	J	`jnl`	Macro-cell and module placement by genetic adaptive search with bitmap-represented chromosome. Integr. Heming Chan, Pinaki Mazumder, Khushro Shahookar
1991	J	`jnl`	VLSI Cell Placement Techniques. ACM Comput. Surv. Khushro Shahookar, Pinaki Mazumder
1990	—	`conf`	A Parallel Karmarkar Algorithm on Orthogonal Tree Networks. ICPP (3) R. B. Panwar, Pinaki Mazumder
1990	J	`jnl`	A genetic approach to standard cell placement using meta-genetic parameter optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Khushro Shahookar, Pinaki Mazumder
1990	J	`jnl`	A hexagonal array machine for multilayer wire routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Raja Venkateswaran, Pinaki Mazumder
1990	J	`jnl`	A neural network design for circuit partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jih-Shyr Yih, Pinaki Mazumder
1990	A	`conf`	A novel built-in self-repair approach to VLSI memory yield enhancement. ITC Pinaki Mazumder, Jih-Shyr Yih
1990	J	`jnl`	A reconfigurable parallel signature analyzer for concurrent error correction in DRAM. IEEE J. Solid State Circuits Pinaki Mazumder, Janak H. Patel, Jacob A. Abraham
1990	—	`conf`	GASP: a Genetic Algorithm for Standard cell Placement. EURO-DAC Khushro Shahookar, Pinaki Mazumder
1989	A*	`conf`	A Neural Network Design for Circuit Partitioning. DAC Jih-Shyr Yih, Pinaki Mazumder
1989	A	`conf`	HAM-a hardware accelerator for multi-layer wire routing. ICCAD Raja Venkateswaran, Pinaki Mazumder
1989	—	`conf`	Neural computing for built-in self-repair of embedded memory arrays. FTCS Pinaki Mazumder, Jih-Shyr Yih
1989	J	`jnl`	Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories. IEEE Trans. Computers Pinaki Mazumder, Janak H. Patel
1988	A	`conf`	An On-Chip Double-Bit Error-Correcting Code for Three-Dimensional Dynamic Random-Access Memory. ITC Pinaki Mazumder
1988	J	`jnl`	Methodologies for testing embedded content addressable memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs
1988	J	`jnl`	Parallel testing of parametric faults in a three-dimensional dynamic random-access memory. IEEE J. Solid State Circuits Pinaki Mazumder
1988	—	`—`	Testing and Fault-Tolerance Aspects of High-Density VLSI Memory Pinaki Mazumder
1987	A*	`conf`	Design and Algorithms for Parallel Testing of Random Access and Content Addressable Memories. DAC Pinaki Mazumder, Janak H. Patel, W. Kent Fuchs
1987	J	`jnl`	Evaluation of On-Chip Static Interconnection Networks. IEEE Trans. Computers Pinaki Mazumder
1987	J	`jnl`	Planar decomposition for quadtree data structure. Comput. Vis. Graph. Image Process. Pinaki Mazumder
1986	B	`conf`	Evaluation of Three Interconnection Networks for CMOS VLSI Implementation. ICPP Pinaki Mazumder