Pietro Andreani

106 papers C 10Journal 41Unranked 55

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS. IEEE Access Hamid Karrari, Pietro Andreani, Siyu Tan
2024	—	`conf`	Asynchronous vs Synchronous SAR ADCs - Performance Beyond Nominal Speed. PRIME Hamid Karrari, Pietro Andreani, Siyu Tan
2023	—	`conf`	A 1.4 GS/s TI Pipelined-SAR analog-to-digital converter in 22-nm FDSOI CMOS. NorCAS Hamid Karrari, Pietro Andreani, Siyu Tan
2023	—	`conf`	A High-Speed Comparator Using a New Regeneration Latch. MWSCAS Hamid Karrari, Pietro Andreani, Siyu Tan
2023	—	`conf`	A Technique to Increase the Linearity of the Bootstrapped Switch. MWSCAS Hamid Karrari, Pietro Andreani, Siyu Tan
2023	J	`jnl`	On the Calculation and Simulation of Loop Gain in Feedback Circuits. IEEE Trans. Circuits Syst. II Express Briefs Baktash Behmanesh, Pietro Andreani
2023	J	`jnl`	Some Results on Oscillation Stability in Multi-Mode Harmonic Oscillators. IEEE Trans. Circuits Syst. II Express Briefs Pietro Andreani
2022	J	`jnl`	A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise. IEEE J. Solid State Circuits Lorenzo Tomasin, Pietro Andreani, Giovanni Boi, Fabio Padovan, Andrea Bevilacqua
2020	C	`conf`	A 10-Bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration. ISCAS Siyu Tan, Daniele Mastantuono, Roland Strandberg, Lars Sundström, Pietro Andreani, Mattias Palm
2020	J	`jnl`	A 19.5-GHz 28-nm Class-C CMOS VCO, With a Reasonably Rigorous Result on 1/f Noise Upconversion Caused by Short-Channel Effects. IEEE J. Solid State Circuits Alessandro Franceschin, Pietro Andreani, Fabio Padovan, Matteo Bassi, Andrea Bevilacqua
2020	—	`conf`	A Design Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs. NorCAS Siyu Tan, Mattias Palm, Daniele Mastantuono, Roland Strandberg, Lars Sundström, Sven Mattisson, Pietro Andreani
2020	J	`jnl`	Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO. IEEE J. Solid State Circuits Simone Veni, Pietro Andreani, Michele Caruso, Marc Tiebout, Andrea Bevilacqua
2019	—	`conf`	A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion. ESSCIRC Alessandro Franceschin, Pietro Andreani, Fabio Padovan, Matteo Bassi, Roberto Nonis, Andrea Bevilacqua
2019	—	`conf`	A 5 GHz CT $\Delta\sum$ ADC with 250 MHz Signal Bandwidth in 28 nm-FDSOI CMOS. NORCAS Siyu Tan, Lars Sundström, Mattias Palm, Sven Mattisson, Pietro Andreani
2019	J	`jnl`	An Accurate Analysis of Phase Noise in CMOS Ring Oscillators. IEEE Trans. Circuits Syst. II Express Briefs Federico Pepe, Pietro Andreani
2018	J	`jnl`	On the Remarkable Performance of the Series-Resonance CMOS Oscillator. IEEE Trans. Circuits Syst. I Regul. Pap. Federico Pepe, Andrea Bevilacqua, Pietro Andreani
2017	J	`jnl`	A General Theory of Phase Noise in Transconductor-Based Harmonic Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. Federico Pepe, Pietro Andreani
2016	J	`jnl`	A 2.2-ps Two-Dimensional Gated-Vernier Time-to-Digital Converter With Digital Calibration. IEEE Trans. Circuits Syst. II Express Briefs Ping Lu, Ying Wu, Pietro Andreani
2016	J	`jnl`	A 65 nm CMOS Wideband Radio Receiver With ΔΣ-Based A/D-Converting Channel-Select Filters. IEEE J. Solid State Circuits Xiaodong Liu, Anders Nejdel, Mattias Palm, Lars Sundström, Markus Törmänen, Henrik Sjöland, Pietro Andreani
2016	—	`conf`	An experimental comparison between two widely adopted phase noise models. NORCAS Federico Pepe, Pietro Andreani
2016	J	`jnl`	New Associate Editors. IEEE J. Solid State Circuits Michael P. Flynn, Pietro Andreani, SeongHwan Cho
2016	J	`jnl`	Still More on the 1/f IEEE Trans. Circuits Syst. II Express Briefs Federico Pepe, Pietro Andreani
2015	—	`conf`	A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters. ESSCIRC Anders Nejdel, Xiaodong Liu, Mattias Palm, Lars Sundström, Markus Törmänen, Henrik Sjöland, Pietro Andreani
2015	—	`conf`	A 65nm CMOS fraction-N digital PLL with shaped in-band phase noise. NORCAS Ahmed Mahmoud, Pietro Andreani, Ping Lu
2015	—	`conf`	Digital background calibration in continuous-time delta-sigma analog to digital converters. NORCAS Siyu Tan, Yun Miao, Mattias Palm, Joachim Rodrigues, Pietro Andreani
2014	—	`conf`	21.6 A 2.4-to-5.3GHz dual-core CMOS VCO with concentric 8-shaped coils. ISSCC Luca Fanori, Thomas Mattsson, Pietro Andreani
2014	C	`conf`	A 1-1 MASH 2-D vernier time-to-digital converter with 2 ISCAS Ping Lu, Pietro Andreani
2014	—	`conf`	A Class-D CMOS DCO with an on-chip LDO. ESSCIRC Luca Fanori, Thomas Mattsson, Pietro Andreani
2014	J	`jnl`	A Filtering ΔΣ ADC for LTE and Beyond. IEEE J. Solid State Circuits Mattias Andersson, Martin Anderson, Lars Sundström, Sven Mattisson, Pietro Andreani
2014	J	`jnl`	A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers. IEEE J. Solid State Circuits Antonio Liscidini, Luca Fanori, Pietro Andreani, Rinaldo Castello
2014	—	`conf`	A low-power 2nd-order CT ΔΣ modulator with an asynchronous SAR quantizer. NORCHIP Dejan Radjen, Martin Anderson, Lars Sundström, Pietro Andreani
2014	C	`conf`	An 11mW continuous time delta-Sigma modulator with 20 MHz bandwidth in 65nm CMOS. ISCAS Xiaodong Liu, Mattias Andersson, Martin Anderson, Lars Sundström, Pietro Andreani
2014	—	`conf`	Lessons from ten years of the international master's program in System-on-Chip. EWME Peter Nilsson, Pietro Andreani, Krzysztof Kuchcinski, Joachim Rodrigues, Henrik Sjöland, Markus Törmänen, Lars-Erik Wernersson, Viktor Öwall
2013	—	`conf`	A 2.5-to-3.3GHz CMOS Class-D VCO. ISSCC Luca Fanori, Pietro Andreani
2013	—	`conf`	A 9MHz filtering ADC with additional 2 ESSCIRC Mattias Andersson, Martin Anderson, Lars Sundström, Sven Mattisson, Pietro Andreani
2013	J	`jnl`	A Push-Pull Class-C CMOS VCO. IEEE J. Solid State Circuits Andrea Mazzanti, Pietro Andreani
2013	—	`conf`	A high-swing complementary class-C VCO. ESSCIRC Luca Fanori, Pietro Andreani
2013	—	`conf`	A low-power 2nd-order CT ΔΣ modulator with a single operational amplifier. NORCHIP Dejan Radjen, Pietro Andreani, Martin Anderson, Lars Sundström
2013	C	`conf`	A wide bandwidth fractional-N synthesizer for LTE with phase noise cancellation using a hybrid-ΔΣ-DAC and charge re-timing. ISCAS Dawei Ye, Ping Lu, Pietro Andreani, Ronan A. R. van der Zee
2013	J	`jnl`	Class-D CMOS Oscillators. IEEE J. Solid State Circuits Luca Fanori, Pietro Andreani
2013	J	`jnl`	Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs. IEEE J. Solid State Circuits Luca Fanori, Pietro Andreani
2012	J	`jnl`	A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps. IEEE J. Solid State Circuits Ping Lu, Antonio Liscidini, Pietro Andreani
2012	—	`conf`	A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers. ISSCC Antonio Liscidini, Luca Fanori, Pietro Andreani, Rinaldo Castello
2012	—	`conf`	A 6.7-to-9.2GHz 55nm CMOS hybrid Class-B/Class-C cellular TX VCO. ISSCC Luca Fanori, Antonio Liscidini, Pietro Andreani
2012	C	`conf`	A 90nm CMOS digital PLL based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter. ISCAS Ping Lu, Ying Wu, Pietro Andreani
2012	—	`conf`	A 90nm CMOS gated-ring-oscillator-based 2-dimension Vernier time-to-digital converter. NORCHIP Ping Lu, Pietro Andreani, Antonio Liscidini
2012	J	`jnl`	An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Bevilacqua, Pietro Andreani
2012	—	`conf`	Low-phase-noise 3.4-4.5 GHz dynamic-bias class-C CMOS VCOs with a FoM of 191 dBc/Hz. ESSCIRC Luca Fanori, Pietro Andreani
2012	J	`jnl`	Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator. IEEE Trans. Circuits Syst. II Express Briefs Andrea Bevilacqua, Pietro Andreani
2011	—	`conf`	A 2.7-6.1GHz CMOS local oscillator based on frequency multiplication by 3/2. NORCHIP Andrea Bevilacqua, Pietro Andreani
2011	—	`conf`	A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS. NORCHIP Mohammed Abdulaziz, Muhammad Shakir, Ping Lu, Pietro Andreani
2011	—	`conf`	A 9-band WCDMA/EDGE transceiver supporting HSPA evolution. ISSCC Magnus Nilsson, Sven Mattisson, Nikolaus Klemmer, Martin Anderson, Torkel Arnborg, Peter Caputa, Staffan Ek, Lin Fan, Henrik Fredriksson, Fabien Garrigues, Henrik Geis, Hans Hagberg, Joel Hedestig, Hu Huang, Yevgeniy Kagan, Niklas Karlsson, Henrik Kinzel, Thomas Mattsson, Thomas Mills, Fenghao Mu, Andreas Mårtensson, Lars Nicklasson, Filip Oredsson, Ufuk Ozdemir, Fitzgerald Park, Tony Pettersson, Tony Påhlsson, Markus Pålsson, Stephane Ramon, Magnus Sandgren, Per Sandrup, Anna-Karin Stenman, Roland Strandberg, Lars Sundström, Fredrik Tillman, Tobias Tired, Satish Uppathil, Joel Walukas, Eric Westesson, Xuhao Zhang, Pietro Andreani
2011	—	`conf`	A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter for DPLLs. ESSCIRC Ping Lu, Pietro Andreani, Antonio Liscidini
2011	J	`jnl`	A TX VCO for WCDMA/EDGE in 90 nm RF CMOS. IEEE J. Solid State Circuits Pietro Andreani, Kirill Kozmin, Per Sandrup, Magnus Nilsson, Thomas Mattsson
2011	—	`conf`	A continuous time ΔΣ modulator with reduced clock jitter sensitivity through DSCR feedback. NORCHIP Dejan Radjen, Pietro Andreani, Martin Anderson, Lars Sundström
2011	—	`conf`	A digital PLL with a multi-delay coarse-fine TDC. NORCHIP Ying Wu, Ping Lu, Pietro Andreani
2011	—	`conf`	A mixed mode design flow for multi GHz ADPLLs. NORCHIP Muhammad Shakir, Mohammed Abdulaziz, Ping Lu, Pietro Andreani
2011	—	`conf`	Dynamic bias schemes for class-C VCOs. NORCHIP Luca Fanori, Pietro Andreani
2011	—	`conf`	Highly linear direct conversion receiver using customized on-chip balun. NORCHIP Xiaodong Liu, Vijay Viswam, Stefan Back Andersson, Johan Wernehag, Imad ud Din, Pietro Andreani
2011	C	`conf`	On the bias noise to phase noise conversion in harmonic oscillators using Groszkowski theory. ISCAS Andrea Bevilacqua, Pietro Andreani
2011	—	`conf`	Single-ended low noise multiband LNA with programmable integrated matching and high isolation switches. NORCHIP Tobias Tired, Pietro Andreani
2010	—	`conf`	A transmitter CMOS VCO for WCDMA/EDGE. ESSCIRC Pietro Andreani, Kirill Kozmin, Per Sandrup, Thomas Mattsson
2010	C	`conf`	Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end. ISCAS Matteo Camponeschi, Andrea Bevilacqua, Andrea Neviani, Pietro Andreani
2010	C	`conf`	Impact of MOS threshold-voltage mismatch in current-steering DACs for CT ΣΔ modulators. ISCAS Mattias Andersson, Martin Anderson, Pietro Andreani, Lars Sundström
2009	J	`jnl`	A Time-Variant Analysis of Fundamental 1/f IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Mazzanti, Pietro Andreani
2009	—	`conf`	A compact CMOS MEMS microphone with 66dB SNR. ISSCC Jelena Citakovic, Per F. Hovesten, Gino Rocca, Aart van Halteren, Pirmin Rombach, Lars J. Stenberg, Pietro Andreani, Erik Bruun
2008	—	`conf`	A 1.4mW 4.90-to-5.65GHz Class-C CMOS VCO with an Average FoM of 194.5dBc/Hz. ISSCC Andrea Mazzanti, Pietro Andreani
2008	J	`jnl`	Author's Response. IEEE J. Solid State Circuits Lei Lu, Zhangwen Tang, Pietro Andreani, Andrea Mazzanti, Ali Hajimiri
2008	J	`jnl`	Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise. IEEE J. Solid State Circuits Andrea Mazzanti, Pietro Andreani
2008	J	`jnl`	Comments on "Comments on "A General Theory of Phase Noise in Electrical Oscillators"". IEEE J. Solid State Circuits Lei Lu, Zhangwen Tang, Pietro Andreani, Andrea Mazzanti, Ali Hajimiri
2008	J	`jnl`	Sensitivity Degradation in a Tri-Band GSM BiCMOS Direct-Conversion Receiver Caused by Transient Substrate Heating. IEEE J. Solid State Circuits Sven Mattisson, Hans Hagberg, Pietro Andreani
2007	—	`conf`	45% Power Saving in a 0.25μm BiCMOS 10Gb/s 50Ω-Terminated Packaged Active-Load Laser Driver. ISSCC Emre Ayranci, Kenn Christensen, Pietro Andreani
2007	—	`conf`	A 0.2V, 7.5 μW, 20 kHz ΣΔ modulator with 69 dB SNR in 90 nm CMOS. ESSCIRC Ulrik Wismar, Dag T. Wisland, Pietro Andreani
2007	—	`conf`	A 0.35μm 50V CMOS sliding-mode control IC for buck converters. ESSCIRC Mikkel Hoyerby, Michael A. E. Andersen, Pietro Andreani
2007	J	`jnl`	An Analysis of 1/f IEEE J. Solid State Circuits Ali Fard, Pietro Andreani
2006	—	`conf`	A 2.3GHz LC-tank CMOS VCO with optimal phase noise performance. ISSCC Pietro Andreani, Ali Fard
2006	—	`conf`	A 240W Monolithic Class-D Audio Amplifier Output Stage. ISSCC Flemming Nyboe, Cetyn Kaya, Lars Risbo, Pietro Andreani
2006	—	`conf`	A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO. ISSCC Antonio Liscidini, Andrea Mazzanti, Riccardo Tonietto, Luca Vandi, Pietro Andreani, Rinaldo Castello
2006	J	`jnl`	A time-variant analysis of the 1/f IEEE Trans. Circuits Syst. I Regul. Pap. Pietro Andreani
2006	—	`conf`	Detailed Behavioral Modeling of Bang-Bang Phase Detectors. APCCAS Chenhui Jiang, Pietro Andreani, U. D. Keil
2006	J	`jnl`	More on the$1/{\rm f}^{2}$Phase Noise Performance of CMOS Differential-PairLC-Tank Oscillators. IEEE J. Solid State Circuits Pietro Andreani, Ali Fard
2006	J	`jnl`	On the amplitude and phase errors of quadrature LC-tank CMOS oscillators. IEEE J. Solid State Circuits Andrea Mazzanti, Pietro Andreani
2006	J	`jnl`	Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell. IEEE J. Solid State Circuits Antonio Liscidini, Andrea Mazzanti, Riccardo Tonietto, Luca Vandi, Pietro Andreani, Rinaldo Castello
2005	J	`jnl`	A study of phase noise in colpitts and LC-tank CMOS oscillators. IEEE J. Solid State Circuits Pietro Andreani, Xiaoyan Wang, Luca Vandi, Ali Fard
2005	—	`conf`	Phase noise analysis and design of a 3-GHz bipolar differential colpitts VCO. ESSCIRC Xiaoyan Wang, Ali Fard, Pietro Andreani
2005	—	`conf`	Technology scaling impact on embedded ADC design for telecom receivers. ISCAS (5) Jannik Hammel Nielsen, Pietro Andreani, Piero Malcovati, Andrea Baschirotto
2004	—	`conf`	Comparison of the image rejection between the passive and the Gilbert mixer. ISCAS (1) Xiaoyan Wang, Pietro Andreani
2004	J	`jnl`	On the phase-noise and phase-error performances of multiphase LC CMOS VCOs. IEEE J. Solid State Circuits Pietro Andreani, Xiaoyan Wang
2003	J	`jnl`	Highly functional tunnelling devices integrated in 3D. Int. J. Circuit Theory Appl. Lars-Erik Wernersson, Erik Lind, Peter Lindström, Pietro Andreani
2003	—	`conf`	Impact of mutual inductance and parasitic capacitance on the phase-error performance of CMOS quadrature VCOs. ISCAS (1) Xiaoyan Wang, Pietro Andreani
2002	—	`conf`	A 57-dB image band rejection CMOS G ISCAS (5) Bo Shi, Weiyun Shan, Pietro Andreani
2002	J	`jnl`	Analysis and design of a 1.8-GHz CMOS LC quadrature VCO. IEEE J. Solid State Circuits Pietro Andreani, Andrea Bonfanti, Luca Romanò, Carlo Samori
2002	—	`conf`	Bandwidth considerations for a CALLUM transmitter architecture. ISCAS (4) Roland Strandberg, Pietro Andreani, Lars Sundström
2002	—	`conf`	Circuits and devices with integrated VFETs and RTDs. ISCAS (5) Lars-Erik Wernersson, Erik Lind, Peter Lindström, Pietro Andreani
2002	J	`jnl`	On the use of Nauta's transconductor in low-frequency CMOS g IEEE J. Solid State Circuits Pietro Andreani, Sven Mattisson
2002	J	`jnl`	Tail current noise suppression in RF CMOS VCOs. IEEE J. Solid State Circuits Pietro Andreani, Henrik Sjöland
2001	—	`conf`	A 1.8-GHz monolithic CMOS VCO tuned by an inductive varactor. ISCAS (4) Pietro Andreani
2001	—	`conf`	A 2.2 GHz CMOS VCO with inductive degeneration noise suppression. CICC Pietro Andreani, Henrik Sjöland
2000	C	`conf`	A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor. ISCAS Pietro Andreani, Sven Mattisson
2000	—	`conf`	A CMOS g CICC Pietro Andreani, Sven Mattisson
2000	J	`jnl`	On the use of MOS varactors in RF VCOs. IEEE J. Solid State Circuits Pietro Andreani, Sven Mattisson
1999	—	`conf`	A 2.4-GHz CMOS monolithic VCO based on an MOS varactor. ISCAS (2) Pietro Andreani, Sven Mattisson
1999	—	`conf`	A chip for linearization of RF power amplifiers using digital predistortion with a bit-parallel complex multiplier. ISCAS (1) Pietro Andreani, Lars Sundström, Niklas Karlsson, M. Svensson
1998	J	`jnl`	Characteristic polynomial and zero polynomial with the Cochrun-Grabel method. Int. J. Circuit Theory Appl. Pietro Andreani, Sven Mattisson
1998	J	`jnl`	Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution. IEEE J. Solid State Circuits Pietro Andreani, Franco Bigongiari, Roberto Roncella, Roberto Saletti, Pierangelo Terreni, Adriano Bigongiari, Maurizio Lippi
1993	C	`conf`	A GSM speech coder implemented on a customized processor architecture. ISCAS Viktor Öwall, Pietro Andreani, L. Brange, Peter Nilsson, A. Wass, Mats Torkelson