Piet Engelke

38 papers A* 1A 7B 4C 3Misc 5Journal 7Unranked 10
YearRankTypeTitle / Venue / Authors
2020 A conf
IJTAG Through a Two-Pin Chip Interface.
ITC
Manu Baby, Bernd Büttner, Piet Engelke, Ulrike Pfannkuchen, Reinhard Meier, Jonathan Gaudet, Jean-François Côté, Givargis Danialy, Martin Keim, Lori Schramm
2017 A conf
BASTION: Board and SoC test instrumentation for ageing and no failure found.
DATE
Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke
2014 A* conf
Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures.
DAC
Felix Reimann, Michael Glaß, Jürgen Teich, Alejandro Cook, Laura Rodríguez Gómez, Dominik Ull, Hans-Joachim Wunderlich, Piet Engelke, Ulrich Abelein
2014 A conf
Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures.
DATE
Ulrich Abelein, Alejandro Cook, Piet Engelke, Michael Glaß, Felix Reimann, Laura Rodríguez Gómez, Thomas Russ, Jürgen Teich, Dominik Ull, Hans-Joachim Wunderlich
2014 — conf
Struktureller Test im System.
Aspekte der Technischen Informatik
Piet Engelke
2013 C conf
On the feasibility of combining on-line-test and self repair for logic circuits.
DDECS
Tobias Koal, Markus Ulbricht, Piet Engelke, Heinrich Theodor Vierhaus
2012 B conf
Funding project DIANA - Integrated diagnostics for the analysis of electronic failures in vehicles.
ETS
Piet Engelke, Hermann Obermeir
2012 C conf
Scan Based Tests via Standard Interfaces.
DSD
Christian Gleichner, Heinrich Theodor Vierhaus, Piet Engelke
2010 J jnl
Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis.
Int. J. Parallel Program.
Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker
2009 Misc conf
An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects.
VTS
Nicolas Houarche, Mariane Comte, Michel Renovell, Alejandro Czutro, Piet Engelke, Ilia Polian, Bernd Becker
2009 — conf
Dynamic Compaction in SAT-Based ATPG.
Asian Test Symposium
Alejandro Czutro, Ilia Polian, Piet Engelke, Sudhakar M. Reddy, Bernd Becker
2009 — —
Resistive bridging faults - defect-oriented modeling and efficient testing (Resistive bridging faults - defektorientierte Modellierung und effizienter Test)
Piet Engelke
2009 J jnl
SUPERB: Simulator utilizing parallel evaluation of resistive bridges.
ACM Trans. Design Autom. Electr. Syst.
Piet Engelke, Bernd Becker, Michel Renovell, Jürgen Schlöffel, Bettina Braitling, Ilia Polian
2009 Misc conf
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis.
VLSI Design
Alejandro Czutro, Ilia Polian, Matthew Lewis, Piet Engelke, Sudhakar M. Reddy, Bernd Becker
2008 B conf
A Simulator of Small-Delay Faults Caused by Resistive-Open Defects.
ETS
Alejandro Czutro, Nicolas Houarche, Piet Engelke, Ilia Polian, Mariane Comte, Michel Renovell, Bernd Becker
2008 Misc conf
Automatic Test Pattern Generation for Interconnect Open Defects.
VTS
Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng
2008 C conf
Diagnosis of Realistic Defects Based on the X-Fault Model.
DDECS
Ilia Polian, Kohei Miyase, Yusuke Nakamura, Seiji Kajihara, Piet Engelke, Bernd Becker, Stefan Spinner, Xiaoqing Wen
2008 A conf
Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model.
ITC
Stefan Hillebrecht, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng
2008 J jnl
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Piet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker
2008 A conf
Resistive Bridging Fault Simulation of Industrial Circuits.
DATE
Piet Engelke, Ilia Polian, Jürgen Schlöffel, Bernd Becker
2007 — conf
SUPERB: Simulator Utilizing Parallel Evaluation of Resistive Bridges.
ATS
Piet Engelke, Bettina Braitling, Ilia Polian, Michel Renovell, Bernd Becker
2007 — conf
Simulating Open-Via Defects.
ATS
Stefan Spinner, Jie Jiang, Ilia Polian, Piet Engelke, Bernd Becker
2006 — conf
A Specific ATPG technique for Resistive Open with Sequence Recursive Dependency.
ATS
Michel Renovell, Mariane Comte, Ilia Polian, Piet Engelke, Bernd Becker
2006 J jnl
Automatic Test Pattern Generation for Resistive Bridging Faults.
J. Electron. Test.
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
2006 — conf
Delta-IDDQ Testing of Resistive Short Defects.
ATS
Piet Engelke, Ilia Polian, Hans Manhaeve, Michel Renovell, Bernd Becker
2006 J jnl
Simulating Resistive-Bridging and Stuck-At Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
2006 J jnl
X-masking during logic BIST and its impact on defect coverage.
IEEE Trans. Very Large Scale Integr. Syst.
Yuyi Tang, Hans-Joachim Wunderlich, Piet Engelke, Ilia Polian, Bernd Becker, Jürgen Schlöffel, Friedrich Hapke, Michael Wittke
2005 B conf
A unified fault model and test generation procedure for interconnect opens and bridges.
ETS
Gang Chen, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski, Piet Engelke, Bernd Becker
2005 J jnl
Modeling Feedback Bridging Faults with Non-Zero Resistance.
J. Electron. Test.
Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker
2005 — conf
On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing.
Asian Test Symposium
Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker
2005 Misc conf
Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies.
VTS
Ilia Polian, Sandip Kundu, Jean-Marc Gallière, Piet Engelke, Michel Renovell, Bernd Becker
2004 B conf
Automatic test pattern generation for resistive bridging faults.
ETS
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
2004 Misc conf
The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults.
VTS
Piet Engelke, Ilia Polian, Michel Renovell, Bharath Seshadri, Bernd Becker
2004 A conf
X-Masking During Logic BIST and Its Impact on Defect Coverage.
ITC
Yuyi Tang, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Piet Engelke, Ilia Polian, Bernd Becker
2003 — conf
Modeling feedback bridging faults with non-zero resistance.
ETW
Ilia Polian, Piet Engelke, Michel Renovell, Bernd Becker
2003 A conf
Simulating Resistive Bridging and Stuck-At Faults.
ITC
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
2002 — conf
Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics.
ISMVL
Ilia Polian, Piet Engelke, Bernd Becker
2000 — conf
A parameterizable fault simulator for bridging faults.
ETW
Piet Engelke, Bernd Becker, Martin Keim