Piero Olivo

70 papers A 10C 4Misc 2Journal 36Unranked 17
YearRankTypeTitle / Venue / Authors
2025 — conf
Leveraging Large-Scale TLC 3D NAND Flash Characterization to Investigate Early Lifetime Reliability of SSDs through Extreme Value Statistics.
IRPS
Rino Micheloni, Luca Crippa, Alessia Marelli, Lorenzo Zuolo, Piero Olivo, Cristian Zambelli
2022 C conf
End-to-end modeling of variability-aware neural networks based on resistive-switching memory arrays.
VLSI-SoC
Artem Glukhov, Nicola Lepri, Valerio Milo, Andrea Baroni, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Christian Wenger, Daniele Ielmini
2022 C conf
Experimental verification and benchmark of in-memory principal component analysis by crosspoint arrays of resistive switching memory.
ISCAS
Piergiulio Mannocci, Andrea Baroni, Enrico Melacarne, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Christian Wenger, Daniele Ielmini
2022 — conf
Statistical model of program/verify algorithms in resistive-switching memories for in-memory neural network accelerators.
IRPS
Artem Glukhov, Valerio Milo, Andrea Baroni, Nicola Lepri, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Christian Wenger, Daniele Ielmini
2021 — conf
Optimized programming algorithms for multilevel RRAM in hardware neural networks.
IRPS
Valerio Milo, Francesco Anzalone, Cristian Zambelli, Eduardo Pérez, Mamathamba Kalishettyhalli Mahadevaiah, Oscar Gonzalez Ossorio, Piero Olivo, Christian Wenger, Daniele Ielmini
2019 J jnl
Enabling Computational Storage Through FPGA Neural Network Accelerator for Enterprise SSD.
IEEE Trans. Circuits Syst. II Express Briefs
Cristian Zambelli, Riccardo Bertaggia, Lorenzo Zuolo, Rino Micheloni, Piero Olivo
2019 J jnl
LDPC Soft Decoding with Improved Performance in 1X-2X MLC and TLC NAND Flash-Based Solid State Drives.
IEEE Trans. Emerg. Top. Comput.
Lorenzo Zuolo, Cristian Zambelli, Alessia Marelli, Rino Micheloni, Piero Olivo
2019 — conf
Low-energy inference machine with multilevel HfO2 RRAM arrays.
ESSDERC
Valerio Milo, Cristian Zambelli, Piero Olivo, Eduardo Pérez, Oscar Gonzalez Ossorio, Christian Wenger, Daniele Ielmini
2019 — conf
Reliability of CMOS Integrated Memristive HfO2 Arrays with Respect to Neuromorphic Computing.
IRPS
Mamathamba Kalishettyhalli Mahadevaiah, Eduardo Pérez, Christian Wenger, Alessandro Grossi, Cristian Zambelli, Piero Olivo, Finn Zahari, Hermann Kohlstedt, Martin Ziegler
2018 J jnl
An Automated Test Equipment for Characterization of Emerging MRAM and RRAM Arrays.
IEEE Trans. Emerg. Top. Comput.
Alessandro Grossi, Cristian Zambelli, Piero Olivo, Paolo Pellati, Michele Ramponi, Christian Wenger, Jérémy Alvarez-Herault, Ken Mackay
2018 — conf
Correlating Power Efficiency and Lifetime to Programming Strategies in RRAM-Based FPGAs.
NGCAS
Cristian Zambelli, Marco Castellari, Piero Olivo, Davide Bertozzi
2018 J jnl
Experimental Investigation of 4-kb RRAM Arrays Programming Conditions Suitable for TCAM.
IEEE Trans. Very Large Scale Integr. Syst.
Alessandro Grossi, Elisa Vianello, Cristian Zambelli, Pablo Royer, Jean-Philippe Noel, Bastien Giraud, Luca Perniola, Piero Olivo, Etienne Nowak
2018 J jnl
Is Consumer Electronics Redesigning Our Cars?: Challenges of Integrated Technologies for Sensing, Computing, and Storage.
IEEE Consumer Electron. Mag.
Francesco Pieri, Cristian Zambelli, Andrea Nannini, Piero Olivo, Sergio Saponara
2017 J jnl
Architectural and Integration Options for 3D NAND Flash Memories.
Comput.
Rino Micheloni, Luca Crippa, Cristian Zambelli, Piero Olivo
2017 J jnl
Solid-State Drives (SSDs) [Scanning the Issue].
Proc. IEEE
Rino Micheloni, Piero Olivo
2017 J jnl
Solid-State Drives: Memory Driven Design Methodologies for Optimal Performance.
Proc. IEEE
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Piero Olivo
2016 — ch.
Reliability of 3D NAND Flash Memories.
3D Flash Memories
Alessandro Grossi, Cristian Zambelli, Piero Olivo
2015 — conf
Automated characterization of TAS-MRAM test arrays.
DTIS
Alessandro Grossi, Cristian Zambelli, Piero Olivo, Paolo Pellati, Michele Ramponi, Jérémy Alvarez-Herault, Ken Mackay
2015 — conf
Design space exploration of latency and bandwidth in RRAM-based solid state drives.
NVMTS
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Stephen Bates, Piero Olivo
2015 J jnl
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers.
ACM Trans. Embed. Comput. Syst.
Davide Bertozzi, Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Piero Olivo, Paolo Prinetto, Cristian Zambelli
2015 — conf
RRAM Reliability/Performance Characterization through Array Architectures Investigations.
ISVLSI
Cristian Zambelli, Alessandro Grossi, Piero Olivo, Christian Walczyk, Christian Wenger
2015 — conf
Reliability and cell-to-cell variability of TAS-MRAM arrays under cycling conditions.
NVMTS
Alessandro Grossi, Cristian Zambelli, Piero Olivo, Jérémy Alvarez-Herault, Ken Mackay
2015 J jnl
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Davide Bertozzi, Piero Olivo
2014 J jnl
FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories.
ACM Trans. Archit. Code Optim.
Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto, Davide Bertozzi, Piero Olivo, Cristian Zambelli
2014 A conf
SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives.
DATE
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi
2013 — conf
System interconnect extensions for fully transparent demand paging in low-cost MMU-less embedded systems.
ISSoC
Lorenzo Zuolo, Gabriele Miorandi, Cristian Zambelli, Piero Olivo, Davide Bertozzi
2012 A conf
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories.
DATE
Cristian Zambelli, Marco Indaco, Michele Fabiano, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi
2012 J jnl
Modeling of SET seasoning effects in Phase Change Memory arrays.
Microelectron. Reliab.
Cristian Zambelli, Andrea Chimenton, Piero Olivo
2011 J jnl
Nonvolatile Memory Partitioning Scheme for Technology-Based Performance-Reliability Tradeoff.
IEEE Embed. Syst. Lett.
Cristian Zambelli, Davide Bertozzi, Andrea Chimenton, Piero Olivo
2006 J jnl
Improving performance and reliability of NOR-Flash arrays by using pulsed operation.
Microelectron. Reliab.
Andrea Chimenton, Fernanda Irrera, Piero Olivo
2005 J jnl
Reliability of erasing operation in NOR-Flash memories.
Microelectron. Reliab.
Andrea Chimenton, Piero Olivo
2003 J jnl
Overerase phenomena: an insight into flash memory reliability.
Proc. IEEE
Andrea Chimenton, Paolo Pellati, Piero Olivo
2001 J jnl
Automated test equipment for research on nonvolatile memories.
IEEE Trans. Instrum. Meas.
Paolo Pellati, Piero Olivo
1998 J jnl
A Bist Scheme for Non-Volatile Memories.
J. Electron. Test.
Piero Olivo, Marcello Dalpasso
1997 J jnl
Flash memory cells-an overview.
Proc. IEEE
Paolo Pavan, Roberto Bez, Piero Olivo, Enrico Zanoni
1997 J jnl
On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
1996 J jnl
Modeling and simulation of broken connections in CMOS IC's.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michele Favalli, Marcello Dalpasso, Piero Olivo
1996 A conf
Self-Learning Signature Analysis for Non-Volatile Memory Testing.
ITC
Piero Olivo, Marcello Dalpasso
1995 — conf
Correlation between I
ED&TC
Marcello Dalpasso, Michele Favalli, Piero Olivo
1995 J jnl
Design of CMOS checkers with improved testability of bridging and transistor stuck-on faults.
J. Electron. Test.
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
1995 Misc conf
Reliability evaluation of combinational logic circuits by symbolic simulation.
VTS
Alessandro Bogliolo, Maurizio Damiani, Piero Olivo, Bruno Riccò
1995 Misc conf
Test pattern generation for I
VTS
Marcello Dalpasso, Michele Favalli, Piero Olivo
1994 — conf
Modeling of Broken Connections Faults in CMOS ICs.
EDAC-ETC-EUROASIC
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
1993 — conf
A Highly Testable 1-out-of-3 CMOS Checker.
DFT
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
1993 J jnl
An experimental study of testing techniques for bridging faults in CMOS ICs.
IEEE J. Solid State Circuits
Massimo Lanzoni, Michele Favalli, M. Ambanelli, Piero Olivo, Bruno Riccò
1993 J jnl
Analysis of resistive bridging fault detection in BiCMOS digital ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
1993 A conf
Analyss of Dynamic Effects of Resistive Bridging Faults in CMOS and BiCMOS Digital ICs.
ITC
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
1993 — conf
Design Rules for CMOS Self Checking Circuits with Parametric Faults in the Functional Block.
DFT
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
1993 J jnl
Fault simulation of parametric bridging faults in CMOS IC's.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
1992 J jnl
A probabilistic fault model for 'analog' faults in digital CMOS circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michele Favalli, Piero Olivo, Bruno Riccò
1992 A conf
Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs.
ITC
Michele Favalli, Marcello Dalpasso, Piero Olivo, Bruno Riccò
1992 A conf
CMOS Checkers with Testable Bridging and Transistor Stuck-on Faults.
ITC
Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò
1992 J jnl
Dynamic effects in the detection of bridging faults in CMOS ICs.
J. Electron. Test.
Michele Favalli, Piero Olivo, Bruno Riccò
1992 A conf
Parametric Bridging Fault Characterization for the Fault Simulation of Library-Based ICs.
ITC
Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò
1992 J jnl
Testability measures in pseudorandom testing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò
1991 J jnl
A novel critical path heuristic for fast fault grading.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michele Favalli, Piero Olivo, Bruno Riccò
1991 — conf
A probabilistic fault model for analog faults.
EURO-DAC
Michele Favalli, Piero Olivo, Bruno Riccò
1991 J jnl
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing.
IEEE Trans. Computers
Maurizio Damiani, Piero Olivo, Bruno Riccò
1991 — conf
Detection of PLA multiple crosspoint faults.
EURO-DAC
M. Ambanelli, Michele Favalli, Piero Olivo, Bruno Riccò
1991 J jnl
Fault simulation for general FCMOS ICs.
J. Electron. Test.
Michele Favalli, Piero Olivo, Bruno Riccò, Fabio Somenzi
1991 J jnl
Fault simulation of unconventional faults in CMOS circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
1990 J jnl
Aliasing in signature analysis testing with multiple input shift registers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Maurizio Damiani, Piero Olivo, Michele Favalli, Silvia Ercolani, Bruno Riccò
1990 J jnl
Novel design for testability schemes for CMOS ICs.
IEEE J. Solid State Circuits
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
1990 J jnl
Testing of E
Eur. Trans. Telecommun.
Massimo Lanzoni, Roberto Menozzi, Piero Olivo, Bruno Riccò, Andrea Haardt
1989 A conf
A Testing Technique to Characterize E^2PROM's Aging and Endurance.
ITC
Massimo Lanzoni, Piero Olivo, Bruno Riccò
1989 J jnl
An analytical model for the aliasing probability in signature analysis testing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò
1989 A conf
CMOS Design for Improved IC Testability.
ITC
Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò
1989 C conf
Improved testability evaluations in combinational logic networks.
ICCD
Silvia Ercolani, Michele Favalli, Maurizio Damiani, Piero Olivo, Bruno Riccò
1989 A conf
On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing.
ITC
Piero Olivo, Maurizio Damiani, Bruno Riccò
1988 C conf
Aliasing errors in signature analysis testing of integrated circuits.
ICCD
Maurizio Damiani, Piero Olivo, Michele Favalli, Bruno Riccò