Philippe Maurine

152 papers A* 1A 8B 1C 34Misc 1Journal 43Unranked 63

Year	Rank	Type	Title / Venue / Authors
2025	C	`conf`	Body Bias Injection on the FLASH Memory Accelerator of a 32-Bit Microcontroller. IOLTS Ziling Liao, Florent Bruguier, Philippe Maurine
2025	C	`conf`	Fault Analysis through Body Bias Injection on the FLASH Memory Accelerator of a Microcontroller. FDTC Ziling Liao, Florent Bruguier, Philippe Maurine
2025	—	`conf`	Improving Leakage Exploitability in Horizontal Side Channel Attacks Through Anomaly Mitigation with Unsupervised Neural Networks. CASCADE Gauthier Cler, Sébastien Ordas, Philippe Maurine
2025	C	`conf`	PLL Over-Clocking Through Repeated Fault Injections. IOLTS Louis Dubois, Philippe Maurine
2025	—	`conf`	Towards Package Opening Detection at Power-up by Monitoring Thermal Dissipation. CASCADE Julien Toulemont, Geoffrey Chancel, Frédérick Mailly, Philippe Maurine, Pascal Nouet
2024	—	`conf`	Butterfly probes: estimating the derivative of the magnetic flux. EMC Compo Anselme Mouette, Julien Toulemont, Jérémy Raoult, Philippe Maurine
2024	J	`jnl`	Towards package opening detection at power-up by monitoring thermal dissipation. IACR Cryptol. ePrint Arch. Julien Toulemont, Geoffrey Chancel, Frédérick Mailly, Philippe Maurine, Pascal Nouet
2023	J	`jnl`	(Adversarial) Electromagnetic Disturbance in the Industry. IEEE Trans. Computers Arthur Beckers, Sylvain Guilley, Philippe Maurine, Colin O'Flynn, Stjepan Picek
2023	C	`conf`	A better practice for Body Biasing Injection. FDTC Geoffrey Chancel, Jean-Marc Gallière, Philippe Maurine
2023	C	`conf`	Bernoulli at the Root of Horizontal Side Channel Attacks. CARDIS Gauthier Cler, Sébastien Ordas, Philippe Maurine
2023	J	`jnl`	Revisiting Mutual Information Analysis: Multidimensionality, Neural Estimation and Optimality Proofs. J. Cryptol. Valence Cristiani, Maxime Lecomte, Philippe Maurine
2023	J	`jnl`	Spatial dependency analysis to extract information from side-channel mixtures: extended version. J. Cryptogr. Eng. Aurélien Vasselle, Hugues Thiebeauld, Philippe Maurine
2023	Misc	`conf`	The EVIL Machine: Encode, Visualize and Interpret the Leakage. SAC Valence Cristiani, Maxime Lecomte, Philippe Maurine
2022	C	`conf`	Body Biasing Injection: Impact of substrate types on the induced disturbancesƒ. FDTC Geoffrey Chancel, Jean Marc Gallière, Philippe Maurine
2022	—	`conf`	Body Biasing Injection: To Thin or Not to Thin the Substrate? COSADE Geoffrey Chancel, Jean Marc Gallière, Philippe Maurine
2022	J	`jnl`	Checking Robustness Against EM Side-Channel Attacks Prior to Manufacturing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Davide Poggi, Thomas Ordas, Alexandre Sarafianos, Philippe Maurine
2022	J	`jnl`	Fit The Joint Moments. IACR Cryptol. ePrint Arch. Valence Cristiani, Maxime Lecomte, Thomas Hiscock, Philippe Maurine
2022	J	`jnl`	Fit the Joint Moments: How to Attack Any Masking Scheme. IEEE Access Valence Cristiani, Maxime Lecomte, Thomas Hiscock, Philippe Maurine
2022	J	`jnl`	The EVIL Machine: Encode, Visualize and Interpret the Leakage. IACR Cryptol. ePrint Arch. Valence Cristiani, Maxime Lecomte, Philippe Maurine
2021	—	`conf`	Exploring flexible and 3D printing technologies for the design of high spatial resolution EM probes. NEWCAS Julien Toulemont, Frédérick Mailly, Philippe Maurine, Pascal Nouet
2021	—	`conf`	Iterative Method for Performance Prediction Improvement of Integrated Circuits. DCIS Gwenael Chaillou, Philippe Maurine, Jean-Marc Gallière, Nadine Azémard
2021	J	`jnl`	Modeling and Simulating Electromagnetic Fault Injection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mathieu Dumont, Mathieu Lisart, Philippe Maurine
2021	C	`conf`	On the scaling of EMFI probes. FDTC Julien Toulemont, Geoffrey Chancel, Jean Marc Gallière, Frédérick Mailly, Pascal Nouet, Philippe Maurine
2021	—	`conf`	Protecting Secure ICs Against Side-Channel Attacks by Identifying and Quantifying Potential EM and Leakage Hotspots at Simulation Stage. COSADE Davide Poggi, Philippe Maurine, Thomas Ordas, Alexandre Sarafianos
2021	J	`jnl`	Revisiting Mutual Information Analysis: Multidimensionality, Neural Estimation and Optimality Proofs. IACR Cryptol. ePrint Arch. Valence Cristiani, Maxime Lecomte, Philippe Maurine
2021	—	`conf`	Spatial Dependency Analysis to Extract Information from Side-Channel Mixtures. ASHES@CCS Aurélien Vasselle, Hugues Thiebeauld, Philippe Maurine
2021	J	`jnl`	Spatial Dependency Analysis to Extract Information from Side-Channel Mixtures. IACR Cryptol. ePrint Arch. Aurélien Vasselle, Hugues Thiebeauld, Philippe Maurine
2020	J	`jnl`	A Simple Protocol to Compare EMFI Platforms. IACR Cryptol. ePrint Arch. Julien Toulemont, N. Ouldei-Tebina, Jean Marc Gallière, Pascal Nouet, E. Bourbao, Philippe Maurine
2020	J	`jnl`	Finding EM leakages at design stage: a simulation methodology. IACR Cryptol. ePrint Arch. Davide Poggi, Philippe Maurine, Thomas Ordas, Alexandre Sarafianos, Jérémy Raoult
2020	—	`conf`	Leakage Assessment Through Neural Estimation of the Mutual Information. ACNS Workshops Valence Cristiani, Maxime Lecomte, Philippe Maurine
2020	J	`jnl`	Simulation and Experimental Demonstration of the Importance of IR-Drops During Laser Fault Injection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Raphael Andreoni Camponogara Viera, Philippe Maurine, Jean-Max Dutertre, Rodrigo Possamai Bastos
2019	—	`conf`	Breaking Mobile Firmware Encryption through Near-Field Side-Channel Analysis. ASHES@CCS Aurélien Vasselle, Philippe Maurine, Maxime Cozzi
2019	C	`conf`	Electromagnetic Fault Injection : How Faults Occur. FDTC Mathieu Dumont, Mathieu Lisart, Philippe Maurine
2019	J	`jnl`	From theory to practice: horizontal attacks on protected implementations of modular exponentiations. J. Cryptogr. Eng. Ibrahima Diop, Yanis Linge, Thomas Ordas, Pierre-Yvan Liardet, Philippe Maurine
2018	C	`conf`	Electromagnetic Activity vs. Logical Activity: Near Field Scans for Reverse Engineering. CARDIS Marc Lacruche, Philippe Maurine
2018	J	`jnl`	Estimating the Signal-to-Noise Ratio Under Repeated Sampling of the Same Centered Signal: Applications to Side-Channel Attacks on a Cryptoprocessor. IEEE Trans. Inf. Theory Gilles R. Ducharme, Philippe Maurine
2018	C	`conf`	Exploiting Phase Information in Thermal Scans for Stealthy Trojan Detection. DSD Maxime Cozzi, Jean-Marc Gallière, Philippe Maurine
2018	—	`conf`	Standard CAD Tool-Based Method for Simulation of Laser-Induced Faults in Large-Scale Circuits. ISPD Raphael Andreoni Camponogara Viera, Jean-Max Dutertre, Philippe Maurine, Rodrigo Possamai Bastos
2018	C	`conf`	The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators. FDTC Maxime Madau, Michel Agoyan, Josep Balasch, Milos Grujic, Patrick Haddad, Philippe Maurine, Vladimir Rozic, Dave Singelée, Bohan Yang, Ingrid Verbauwhede
2018	—	`conf`	Thermal Scans for Detecting Hardware Trojans. COSADE Maxime Cozzi, Jean-Marc Gallière, Philippe Maurine
2017	C	`conf`	An EM Fault Injection Susceptibility Criterion and Its Application to the Localization of Hotspots. CARDIS Maxime Madau, Michel Agoyan, Philippe Maurine
2017	J	`jnl`	An On-Chip Technique to Detect Hardware Trojans and Assist Counterfeit Identification. IEEE Trans. Very Large Scale Integr. Syst. Maxime Lecomte, Jacques Fournier, Philippe Maurine
2017	J	`jnl`	Electromagnetic fault injection: the curse of flip-flops. J. Cryptogr. Eng. Sébastien Ordas, Ludovic Guillaume-Sage, Philippe Maurine
2017	—	`conf`	Impacts of Technology Trends on Physical Attacks? COSADE Philippe Maurine, Sylvain Guilley
2017	—	`conf`	Importance of IR drops on the modeling of laser-induced transient faults. SMACD Raphael Andreoni Camponogara Viera, Philippe Maurine, Jean-Max Dutertre, Rodrigo Possamai Bastos
2017	J	`jnl`	Method for evaluation of transient-fault detection techniques. Microelectron. Reliab. Raphael Andreoni Camponogara Viera, Rodrigo Possamai Bastos, Jean-Max Dutertre, Philippe Maurine, Rodrigo Iga Jadue
2017	J	`jnl`	Mutual information analysis: higher-order statistical moments, efficiency and efficacy. J. Cryptogr. Eng. Mathieu Carbone, Yannick Teglia, Gilles R. Ducharme, Philippe Maurine
2017	C	`conf`	Role of Laser-Induced IR Drops in the Occurrence of Faults: Assessment and Simulation. DSD Raphael Andreoni Camponogara Viera, Jean-Max Dutertre, Rodrigo Possamai Bastos, Philippe Maurine
2016	A	`conf`	A fully-digital EM pulse detector. DATE David El-Baze, Jean-Baptiste Rigaud, Philippe Maurine
2016	C	`conf`	An Embedded Digital Sensor against EM and BB Fault Injection. FDTC David El-Baze, Jean-Baptiste Rigaud, Philippe Maurine
2016	—	`conf`	Body Biasing Injection Attacks in Practice. CS2@HiPEAC Noemie Beringuier-Boher, Marc Lacruche, David El-Baze, Jean-Max Dutertre, Jean-Baptiste Rigaud, Philippe Maurine
2016	—	`conf`	Granularity and detection capability of an adaptive embedded Hardware Trojan detection system. HOST Maxime Lecomte, Jacques J. A. Fournier, Philippe Maurine
2016	A	`conf`	On-chip fingerprinting of IC topology for integrity verification. DATE Maxime Lecomte, Jacques J. A. Fournier, Philippe Maurine
2015	C	`conf`	Collision Based Attacks in Practice. DSD Ibrahima Diop, Pierre-Yvan Liardet, Yanis Linge, Philippe Maurine
2015	C	`conf`	Collision for Estimating SCA Measurement Quality and Related Applications. CARDIS Ibrahima Diop, Mathieu Carbone, Sébastien Ordas, Yanis Linge, Pierre-Yvan Liardet, Philippe Maurine
2015	C	`conf`	EM Injection: Fault Model and Locality. FDTC Sébastien Ordas, Ludovic Guillaume-Sage, Philippe Maurine
2015	J	`jnl`	Extraction of intrinsic structure for Hardware Trojan detection. IACR Cryptol. ePrint Arch. Maxime Lecomte, Jacques Fournier, Philippe Maurine
2015	—	`conf`	Interest of MIA in frequency domain? CS2@HiPEAC Mathieu Carbone, Yannick Teglia, Philippe Maurine, Gilles R. Ducharme
2015	—	`conf`	Thoroughly analyzing the use of ring oscillators for on-chip hardware trojan detection. ReConFig Maxime Lecomte, Jacques J. A. Fournier, Philippe Maurine
2015	J	`jnl`	Vertical and horizontal correlation attacks on RNS-based exponentiations. J. Cryptogr. Eng. Guilherme Perin, Laurent Imbert, Philippe Maurine, Lionel Torres
2014	—	`conf`	A frequency leakage model for SCA. HOST Sébastien Tiran, Sébastien Ordas, Yannick Teglia, Michel Agoyan, Philippe Maurine
2014	J	`jnl`	A model of the leakage in the frequency domain and its application to CPA and DPA. J. Cryptogr. Eng. Sébastien Tiran, Sébastien Ordas, Yannick Teglia, Michel Agoyan, Philippe Maurine
2014	J	`jnl`	Analysis Of Variance and CPA in SCA. IACR Cryptol. ePrint Arch. Sébastien Tiran, Guillaume Reymond, Jean-Baptiste Rigaud, Driss Aboulkassimi, Benedikt Gierlichs, Mathieu Carbone, Gilles R. Ducharme, Philippe Maurine
2014	—	`conf`	Attacking Randomized Exponentiations Using Unsupervised Learning. COSADE Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine
2014	J	`jnl`	Dynamic Variability Monitoring Using Statistical Tests for Energy Efficient Adaptive Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Lionel Vincent, Edith Beigné, Suzanne Lesecq, Julien Mottin, David Coriat, Philippe Maurine
2014	A	`conf`	Efficiency of a glitch detector against electromagnetic fault injection. DATE Loïc Zussa, Amine Dehbaoui, Karim Tobich, Jean-Max Dutertre, Philippe Maurine, Ludovic Guillaume-Sage, Jessy Clédière, Assia Tria
2014	C	`conf`	Electromagnetic analysis and fault injection onto secure circuits. VLSI-SoC Paolo Maistri, Régis Leveugle, Lilian Bossuet, Alain Aubert, Viktor Fischer, Bruno Robisson, Nicolas Moro, Philippe Maurine, Jean-Max Dutertre, Mathieu Lisart
2014	C	`conf`	Electromagnetic analysis, deciphering and reverse engineering of integrated circuits (E-MATA HARI). VLSI-SoC Laurent Chusseau, Rachid Omarouayache, Jérémy Raoult, Sylvie Jarrix, Philippe Maurine, Karim Tobich, Alexandre Boyer, Bertrand Vrignon, John Shepherd, Thanh-Ha Le, Maël Berthier, Lionel Rivière, Bruno Robisson, Anne-Lise Ribotta
2014	C	`conf`	Evidence of a Larger EM-Induced Fault Model. CARDIS Sébastien Ordas, Ludovic Guillaume-Sage, Karim Tobich, Jean-Max Dutertre, Philippe Maurine
2014	—	`conf`	On Adaptive Bandwidth Selection for Efficient MIA. COSADE Mathieu Carbone, Sébastien Tiran, Sébastien Ordas, Michel Agoyan, Yannick Teglia, Gilles R. Ducharme, Philippe Maurine
2013	J	`jnl`	A Frequency Leakage Model and its application to CPA and DPA. IACR Cryptol. ePrint Arch. Sébastien Tiran, Sébastien Ordas, Yannick Teglia, Michel Agoyan, Philippe Maurine
2013	—	`conf`	An evaluation of an AES implementation protected against EM analysis. ACM Great Lakes Symposium on VLSI Paolo Maistri, Sébastien Tiran, Philippe Maurine, Israel Koren, Régis Leveugle
2013	—	`conf`	Countermeasures against EM analysis for a secured FPGA-based AES implementation. ReConFig Paolo Maistri, Sébastien Tiran, Philippe Maurine, Israel Koren, Régis Leveugle
2013	C	`conf`	Electromagnetic Analysis on RSA Algorithm Based on RNS. DSD Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine
2013	C	`conf`	Practical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks. CARDIS Guilherme Perin, Laurent Imbert, Lionel Torres, Philippe Maurine
2013	C	`conf`	Voltage Spikes on the Substrate to Obtain Timing Faults. DSD Karim Tobich, Philippe Maurine, Pierre-Yvan Liardet, Mathieu Lisart, Thomas Ordas
2012	A	`conf`	Amplitude demodulation-based EM analysis of different RSA implementations. DATE Guilherme Perin, Lionel Torres, Pascal Benoit, Philippe Maurine
2012	—	`conf`	Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator. COSADE Pierre Bayon, Lilian Bossuet, Alain Aubert, Viktor Fischer, François Poucheret, Bruno Robisson, Philippe Maurine
2012	J	`jnl`	Delay-correlation-aware SSTA based on conditional moments. Microelectron. J. Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme
2012	A*	`conf`	Embedding statistical tests for on-chip dynamic voltage and temperature monitoring. DAC Lionel Vincent, Philippe Maurine, Suzanne Lesecq, Edith Beigné
2012	J	`jnl`	Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. Very Large Scale Integr. Syst. Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert, Philippe Maurine
2012	J	`jnl`	Injection of transient faults using electromagnetic pulses -Practical results on a cryptographic system-. IACR Cryptol. ePrint Arch. Amine Dehbaoui, Jean-Max Dutertre, Bruno Robisson, P. Orsatelli, Philippe Maurine, Assia Tria
2012	C	`conf`	Local Condition Monitoring in integrated circuits using a set of Kolmogorov-Smirnov tests. CCA Lionel Vincent, Suzanne Lesecq, Philippe Maurine, Edith Beigné
2012	J	`jnl`	Magnitude Squared Coherence based SCA. IACR Cryptol. ePrint Arch. Sébastien Tiran, Philippe Maurine
2012	C	`conf`	SCA with Magnitude Squared Coherence. CARDIS Sébastien Tiran, Philippe Maurine
2012	J	`jnl`	Secure D flip-flop against side channel attacks. IET Circuits Devices Syst. Bruno Vaquie, Sébastien Tiran, Philippe Maurine
2012	—	`conf`	Statistical timing characterization. ISSoC Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme
2012	C	`conf`	Techniques for EM Fault Injection: Equipments and Experimental Results. FDTC Philippe Maurine
2011	B	`conf`	A New Process Characterization Method for FPGAs Based on Electromagnetic Analysis. FPL Florent Bruguier, Pascal Benoit, Philippe Maurine, Lionel Torres
2011	J	`jnl`	A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines. IEEE Des. Test Comput. Rafael Iankowski Soares, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Philippe Maurine, Lionel Torres
2011	—	`conf`	A Secure D Flip-Flop against Side Channel Attacks. PATMOS Bruno Vaquie, Sébastien Tiran, Philippe Maurine
2011	C	`conf`	Local and Direct EM Injection of Power Into CMOS Integrated Circuits. FDTC François Poucheret, Karim Tobich, Mathieu Lisart, Laurent Chusseau, Bruno Robisson, Philippe Maurine
2011	J	`jnl`	Spectral Coherence Analysis - First Experimental Results -. IACR Cryptol. ePrint Arch. Amine Dehbaoui, Sébastien Tiran, Philippe Maurine, François-Xavier Standaert, Nicolas Veyrat-Charvillon
2011	J	`jnl`	Timing slack monitoring under process and environmental variations: Application to a DSP performance optimization. Microelectron. J. Bettina Rebaud, Marc Belleville, Edith Beigné, Christian Bernard, Michel Robert, Philippe Maurine, Nadine Azémard
2010	—	`conf`	A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks. SBCCI Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres
2010	A	`conf`	Differential Power Analysis enhancement with statistical preprocessing. DATE Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
2010	—	`conf`	Modeling Time Domain Magnetic Emissions of ICs. PATMOS Victor Lomné, Philippe Maurine, Lionel Torres, Thomas Ordas, Mathieu Lisart, Jérome Toublanc
2010	J	`jnl`	On-Chip Process Variability Monitoring Flow. J. Low Power Electron. Nabila Moubdi, Philippe Maurine, Robin Wilson, Sylvain Engels, Nadine Azémard, Vincent Dumettier, Pierre Busson
2010	C	`conf`	Spatial EM jamming: A countermeasure against EM Analysis? VLSI-SoC François Poucheret, Lyonel Barthe, Pascal Benoit, Lionel Torres, Philippe Maurine, Michel Robert
2009	—	`conf`	Digital Timing Slack Monitors and Their Specific Insertion Flow for Adaptive Compensation of Variabilities. PATMOS Bettina Rebaud, Marc Belleville, Edith Beigné, Christian Bernard, Michel Robert, Philippe Maurine, Nadine Azémard
2009	C	`conf`	Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
2009	A	`conf`	Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2009	—	`conf`	Interpreting SSTA Results with Correlation. PATMOS Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme
2009	—	`conf`	Product On-Chip Process Compensation for Low Power and Yield Enhancement. PATMOS Nabila Moubdi, Philippe Maurine, Robin Wilson, Nadine Azémard, Vincent Dumettier, Abhishek Bansal, Sebastien Barasinski, Alain Tournier, Guy Durieu, David Meyer, Pierre Busson, Sarah Verhaeren, Sylvain Engels
2009	J	`jnl`	Timing margin evaluation with a simple statistical timing analysis flow. J. Embed. Comput. Vincent Migairou, Robin Wilson, Sylvain Engels, Zeqin Wu, Nadine Azémard, Philippe Maurine
2008	—	`conf`	A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM. DELTA Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert
2008	J	`jnl`	Editorial. Integr. Nadine Azémard, Philippe Maurine, Johan Vounckx
2008	—	`conf`	Evaluating the robustness of secure triple track logic through prototyping. SBCCI Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
2008	—	`conf`	Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits. PATMOS Thomas Ordas, Mathieu Lisart, Etienne Sicard, Philippe Maurine, Lionel Torres
2008	—	`conf`	SSTA considering switching process induced correlations. APCCAS Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme
2008	—	`conf`	Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier. ISVLSI Bettina Rebaud, Marc Belleville, Christian Bernard, Zeqin Wu, Michel Robert, Philippe Maurine, Nadine Azémard
2008	—	`conf`	Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects. ISVLSI Michael Yap San Min, Philippe Maurine, Magali Bastian, Michel Robert
2008	—	`conf`	Triple Rail Logic Robustness against DPA. ReConFig Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2007	—	`conf`	A Model of DPA Syndrome and Its Application to the Identification of Leaking Gates. PATMOS Alin Razafindraibe, Philippe Maurine
2007	—	`conf`	A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation. PATMOS Vincent Migairou, Robin Wilson, Sylvain Engels, Zeqin Wu, Nadine Azémard, Philippe Maurine
2007	—	`conf`	Analysis and Improvement of Dual Rail Logic as a Countermeasure Against DPA. PATMOS Alin Razafindraibe, Michel Robert, Philippe Maurine
2007	C	`conf`	Improvement of dual rail logic as a countermeasure against DPA. VLSI-SoC Alin Razafindraibe, Michel Robert, Philippe Maurine
2007	J	`jnl`	Low Power Oriented CMOS Circuit Optimization Protocol CoRR Alexandre Verle, Xavier Michel, Nadine Azémard, Philippe Maurine, Daniel Auvergne
2007	A	`conf`	Temperature and voltage aware timing analysis: application to voltage drops. DATE B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine
2007	J	`jnl`	Temperature- and Voltage-Aware Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine
2006	J	`jnl`	A comprehensive performance macro-modeling of on-chip RC interconnects considering line shielding effects. Integr. Sylvain Engels, Robin Wilson, Nadine Azémard, Philippe Maurine
2006	C	`conf`	Circuit sizing method under delay constraint. ISCAS Alexandre Verle, A. Landrault, Philippe Maurine, Nadine Azémard
2006	—	`conf`	Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks. PATMOS Alin Razafindraibe, Michel Robert, Philippe Maurine
2006	—	`ed.`	Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings PATMOS Johan Vounckx, Nadine Azémard, Philippe Maurine
2006	J	`jnl`	Logical effort model extension to propagation delay representation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. B. Lasbouygues, Sylvain Engels, Robin Wilson, Philippe Maurine, Nadine Azémard, Daniel Auvergne
2006	—	`conf`	Request-skip adders : CMOS standard cell data dependent adders. ICECS Robin Perrot, Nadine Azémard, Philippe Maurine
2006	C	`conf`	Security evaluation of dual rail logic against DPA attacks. VLSI-SoC Alin Razafindraibe, Philippe Maurine, Michel Robert, Marc Renaudin
2006	—	`conf`	Statistical Characterization of Library Timing Performance. PATMOS Vincent Migairou, Robin Wilson, Sylvain Engels, Nadine Azémard, Philippe Maurine
2006	—	`conf`	Timing analysis in presence of supply voltage and temperature variations. ISPD B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine
2005	—	`conf`	A Method to Design Compact Dual-rail Asynchronous Primitives. PATMOS Alin Razafindraibe, Michel Robert, Marc Renaudin, Philippe Maurine
2005	—	`conf`	Circuit optimization based on speed indicators. ICECS Alexandre Verle, A. Landrault, Philippe Maurine, Nadine Azémard
2005	J	`jnl`	Compact and Secured Primitives for the Design of Asynchronous Circuits. J. Low Power Electron. Alin Razafindraibe, Michel Robert, Philippe Maurine
2005	A	`conf`	Low Power Oriented CMOS Circuit Optimization Protocol. DATE Alexandre Verle, Xavier Michel, Nadine Azémard, Philippe Maurine, Daniel Auvergne
2005	—	`conf`	Speed Indicators for Circuit Optimization. PATMOS Alexandre Verle, A. Landrault, Philippe Maurine, Nadine Azémard
2005	—	`conf`	Temperature Dependency in UDSM Process. PATMOS B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine
2004	—	`conf`	Delay bound based CMOS gate sizing technique. ISCAS (5) Alexandre Verle, Xavier Michel, Philippe Maurine, Nadine Azémard, Daniel Auvergne
2004	—	`conf`	Design Optimization with Automated Cell Generation. PATMOS A. Landrault, Nadine Azémard, Philippe Maurine, Michel Robert, Daniel Auvergne
2004	—	`conf`	Performance Metric Based Optimization Protocol. PATMOS Xavier Michel, Alexandre Verle, Philippe Maurine, Nadine Azémard, Daniel Auvergne
2004	—	`conf`	Physical Extension of the Logical Effort Model. PATMOS B. Lasbouygues, Robin Wilson, Philippe Maurine, Nadine Azémard, Daniel Auvergne
2004	—	`conf`	Temperature Dependence in Low Power CMOS UDSM Process. PATMOS B. Lasbouygues, Robin Wilson, Philippe Maurine, Nadine Azémard, Daniel Auvergne
2003	—	`conf`	CMOS Gate Sizing under Delay Constraint. PATMOS Alexandre Verle, Xavier Michel, Philippe Maurine, Nadine Azémard, Daniel Auvergne
2003	—	`conf`	Continuous representation of the performance of a CMOS library. ESSCIRC B. Lasbouygues, Joel Schindler, Sylvain Engels, Philippe Maurine, Nadine Azémard, Daniel Auvergne
2003	—	`conf`	Metric Definition for Circuit Speed Optimization. PATMOS Xavier Michel, Alexandre Verle, Nadine Azémard, Philippe Maurine, Daniel Auvergne
2003	—	`conf`	Statistic Implementation of QDI Asynchronous Primitives. PATMOS Philippe Maurine, Jean-Baptiste Rigaud, G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
2002	—	`conf`	Gate speed improvement at minimal power dissipation. APCCAS (2) Philippe Maurine, Xavier Michel, Nadine Azémard, Daniel Auvergne
2002	—	`conf`	Structure Independent Representation of Output Transition Time for CMOS Library. PATMOS Philippe Maurine, Nadine Azémard, Daniel Auvergne
2002	J	`jnl`	Transition time modeling in deep submicron CMOS. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Philippe Maurine, Mustapha Rezzoug, Nadine Azémard, Daniel Auvergne
2001	C	`conf`	Feasible Delay Bound Definition. VLSI-SOC Nadine Azémard, M. Aline, Philippe Maurine, Daniel Auvergne
2001	C	`conf`	Gate Sizing for Low Power Design. VLSI-SOC Philippe Maurine, Nadine Azémard, Daniel Auvergne
2001	—	`conf`	Output transition time modeling of CMOS structures. ISCAS (5) Philippe Maurine, Mustapha Rezzoug, Daniel Auvergne
2000	—	`conf`	Internal Power Dissipation Modeling and Minimization for Submicronic CMOS Design. PATMOS Philippe Maurine, Mustapha Rezzoug, Daniel Auvergne
2000	—	`conf`	Second Generation Delay Model for Submicron CMOS Process. PATMOS Mustapha Rezzoug, Philippe Maurine, Daniel Auvergne