Philippe Marquet

45 papers A* 1A 3B 3C 10Misc 2Journal 9Unranked 17

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	How to Integrate Environmental Challenges in Computing Curricula? SIGCSE (1) Anne-Laure Ligozat, Kevin Marquet, Aurélie Bugeau, Julien Lefèvre, Pierre Boulet, Sylvain Bouveret, Philippe Marquet, Olivier Ridoux, Olivier Michel
2019	J	`jnl`	SCAC: Weakly-coupled execution model for massively parallel systems. Microprocess. Microsystems Hana Krichene, Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid
2016	C	`conf`	SCAC-Net: Reconfigurable Interconnection Network in SCAC Massively Parallel SoC. PDP Hana Krichene, Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid
2015	J	`jnl`	FPGA-based many-core System-on-Chip design. Microprocess. Microsystems Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid
2013	C	`conf`	Master-Slave Control Structure for Massively Parallel System on Chip. DSD Hana Krichene, Mouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser
2012	J	`jnl`	A fast MPSoC virtual prototyping for intensive signal processing applications. Microprocess. Microsystems Rabie Ben Atitallah, Éric Piel, Smaïl Niar, Philippe Marquet, Jean-Luc Dekeyser
2012	—	`conf`	Broadcast with mask on a massively parallel processing on a chip. HPCS Hana Krichene, Mouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser
2011	J	`jnl`	A Model-Driven Design Framework for Massively Parallel Embedded Systems. ACM Trans. Embed. Comput. Syst. Abdoulaye Gamatié, Sébastien Le Beux, Éric Piel, Rabie Ben Atitallah, Anne Etien, Philippe Marquet, Jean-Luc Dekeyser
2011	C	`conf`	A model-driven based framework for rapid parallel SoC FPGA prototyping. International Symposium on Rapid System Prototyping Mouna Baklouti, Manel Ammar, Philippe Marquet, Mohamed Abid, Jean-Luc Dekeyser
2010	B	`conf`	IP Based Configurable SIMD Massively Parallel SoC. FPL Mouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser
2010	—	`conf`	Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip. ARC Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid
2010	J	`jnl`	Scalable mpNoC for massively parallel systems - Design and implementation on FPGA. J. Syst. Archit. Mouna Baklouti, Yassine Aydi, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid
2009	C	`conf`	Study and integration of a parametric neighbouring interconnection network in a massively parallel architecture on FPGA. AICCSA Mouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser
2007	B	`conf`	A Design Flow to Map Parallel Applications onto FPGAs. FPL Sébastien Le Beux, Philippe Marquet, Jean-Luc Dekeyser
2007	—	`conf`	Massively parallel processing on a chip. Conf. Computing Frontiers Philippe Marquet, Simon Duquennoy, Sébastien Le Beux, Samy Meftali, Jean-Luc Dekeyser
2007	—	`conf`	Model Transformations for the Compilation of Multi-processor Systems-on-Chip. GTTSE Éric Piel, Philippe Marquet, Jean-Luc Dekeyser
2007	—	`conf`	Multilevel MPSOC simulation using an MDE approach. SoCC Rabie Ben Atitallah, Éric Piel, Smaïl Niar, Philippe Marquet, Jean-Luc Dekeyser
2007	—	`conf`	Multiple Abstraction Views of FPGA to Map Parallel Applications. ReCoSoC Sébastien Le Beux, Philippe Marquet, Jean-Luc Dekeyser
2007	C	`conf`	Repetitive Allocation Modelling with MARTE. FDL Pierre Boulet, Philippe Marquet, Éric Piel, Julien Taillard
2006	C	`conf`	FPGA Implementation of Embedded Cruise Control and Anti-Collision Radar. DSD Sébastien Le Beux, Philippe Marquet, Ouassila Labbani, Jean-Luc Dekeyser
2006	A	`conf`	Real-time systems for multiprocessor architectures. IPDPS Éric Piel, Philippe Marquet, Julien Soula, Jean-Luc Dekeyser
2005	Misc	`conf`	Asymmetric Scheduling and Load Balancing for Real-Time on Linux SMP. PPAM Éric Piel, Philippe Marquet, Julien Soula, Jean-Luc Dekeyser
2005	C	`conf`	SOAP Based Distributed Simulation Environment for SoC Design. FDL Samy Meftali, Anouar Dziri, Luc Charest, Philippe Marquet, J. Deskeyser
2005	A	`conf`	Towards UML 2 Extensions for Compact Modeling of Regular Complex Topologies. MoDELS Arnaud Cuccuru, Jean-Luc Dekeyser, Philippe Marquet, Pierre Boulet
2004	Misc	`conf`	Design of a Real-Time Scheduler for Kahn Process Networks on Multiprocessor Systems. PDPTA Javed Dulloo, Philippe Marquet
2004	—	`conf`	UML2 as an ADL Hierarchichal Hardware Modeling. IFIP-WADL Arnaud Cuccuru, Philippe Marquet, Jean-Luc Dekeyser
2003	C	`conf`	MDA for SoC Design, Intensive Signal Processing Experiment. FDL Pierre Boulet, Jean-Luc Dekeyser, Cédric Dumoulin, Philippe Marquet
2002	A	`conf`	An Asymmetric Real-Time Scheduling for Linux. IPDPS Momtchil Momtchev, Philippe Marquet
2002	—	`conf`	GASPARD - A Visual Parallel Programming Environment. PARELEC Florent Devin, Pierre Boulet, Jean-Luc Dekeyser, Philippe Marquet
2001	B	`conf`	Compilation Principle of a Specification Language Dedicated to Signal Processing. PaCT Julien Soula, Philippe Marquet, Alain Demeure, Jean-Luc Dekeyser
2001	C	`conf`	Visual Data-Parallel Programming for Signal Processing Applications. PDP Pierre Boulet, Jean-Luc Dekeyser, Jean-Luc Levaire, Philippe Marquet, Julien Soula, Alain Demeure
1998	—	`conf`	DPFS: A Data-Parallel File System Environment. HPCN Europe Dominique Sueur, Jean-Luc Dekeyser, Philippe Marquet
1998	J	`jnl`	Data-Parallel Load Balancing Strategies. Parallel Comput. Cyril Fonlupt, Philippe Marquet, Jean-Luc Dekeyser
1996	—	`conf`	Irregular Data-Parallel Objects in C++. VECPAR Jean-Luc Dekeyser, Boris Kokoszko, Jean-Luc Levaire, Philippe Marquet
1996	—	`conf`	Mixed synchronous-asynchronous approach for real-time image processing: a MPEG-like coder. ICIP (2) David Galinec, Jean-Luc Dekeyser, Philippe Marquet
1996	—	`conf`	Supporting Irregular and Dynamic Computations in Data Parallel Languages. The Data Parallel Programming Model Jean-Luc Dekeyser, Philippe Marquet
1995	—	`conf`	Analysis of Synchronous Dynamic Load Balancing Algorithms. PARCO Cyril Fonlupt, Philippe Marquet, Jean-Luc Dekeyser
1994	—	`conf`	A Data-Parallel View of the Load Balancing - Experimental Results on MasPar MP-1. HPCN Cyril Fonlupt, Philippe Marquet, Jean-Luc Dekeyser
1994	J	`jnl`	A Geometrical Data-Parallel Language. ACM SIGPLAN Notices Jean-Luc Dekeyser, Dominique Lazure, Philippe Marquet
1994	—	`conf`	Dynamic Load Balancing on SIMD Data-Parallel Computers. EUROSIM Cyril Fonlupt, Jean-Luc Dekeyser, Philippe Marquet
1993	C	`conf`	HELP for parallel scientific programming. PDP J.-L. Dekeyseer, Dominique Lazure, Philippe Marquet
1993	—	`conf`	HelpDraw Graphical Environment: A Step Beyond Data Parallel Programming Languages. HCI (2) Akram-Djellal Benalia, Jean-Luc Dekeyser, Philippe Marquet
1992	A*	`conf`	Performance improvement for vector pipeline multiprocessor systems using a disordered execution model. ISCA M. Tahar Kechadi, Jean-Luc Dekeyser, Philippe Marquet, Philippe Preux
1990	J	`jnl`	EVA: an explicit vector language. ACM SIGPLAN Notices Jean-Luc Dekeyser, Philippe Marquet, Philippe Preux
1990	J	`jnl`	Vector addressing processor for direct and indirect accesses. Microprocessing and Microprogramming Jean-Luc Dekeyser, Philippe Marquet, Philippe Preux