Philippe Magarshack

21 papers A* 5A 3Misc 1Journal 4Unranked 8
YearRankTypeTitle / Venue / Authors
2015 — conf
Breakthrough technologies and reference designs for new IoT applications.
VLSIC
Philippe Magarshack
2014 — conf
27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking.
ISSCC
Robin Wilson, Edith Beigné, Philippe Flatresse, Alexandre Valentian, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Ivan Miro Panades, Jean-Philippe Noël, Bertrand Pelloux-Prayer, Philippe Roche, Olivier Thomas, Yvain Thonnart, David Turgis, Fabien Clermidy, Philippe Magarshack
2014 J jnl
A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization.
IEEE J. Solid State Circuits
David Jacquet, Frederic Hasbani, Philippe Flatresse, Robin Wilson, Franck Arnaud, Giorgio Cesana, Thierry Di Gilio, Christophe Lecocq, Tanmoy Roy, Amit Chhabra, Chiranjeev Grover, Olivier Minez, Jacky Uginet, Guy Durieu, Cyril Adobati, Davide Casalotto, Frederic Nyer, Patrick Menut, Andreia Cathelin, Indavong Vongsavady, Philippe Magarshack
2014 A conf
Panel: Emerging vs. established technologies, a two sphinxes' riddle at the crossroads?
DATE
Marco Casale-Rossi, Giovanni De Micheli, Rob Aitken, Antun Domic, Manfred Horstmann, Robert Hum, Philippe Magarshack
2013 A conf
UTBB FD-SOI: a process/design symbiosis for breakthrough energy-efficiency.
DATE
Philippe Magarshack, Philippe Flatresse, Giorgio Cesana
2012 — conf
Gaining 10x in energy efficiency in the next decade in consumer products.
VLSI-DAT
Philippe Magarshack, Andreia Cathelin
2011 — conf
Beyond the horizon: The next 10x reduction in power - Challenges and solutions.
ISSCC
Jan M. Rabaey, Hugo De Man, Mark Horowitz, Takayasu Sakurai, Jack Sun, Dan Dobberpuhl, Kiyoo Itoh, Philippe Magarshack, Asad A. Abidi, Hermann Eul
2010 A* conf
3-D stacked die: now or future?
DAC
Samta Bansal, Juan C. Rey, Andrew Yang, Myung-Soo Jang, L. C. Lu, Philippe Magarshack, Pol Marchal, Riko Radojcic
2009 J jnl
Low-Power Design Solutions forWireless Multimedia SoCs.
IEEE Des. Test Comput.
Jean-Pierre Schoellkopf, Philippe Magarshack
2007 A conf
DFM/DFY: should you trust the surgeon or the family doctor?
DATE
Marco Casale-Rossi, Andrzej J. Strojwas, Robert C. Aitken, Antun Domic, Carlo Guardiani, Philippe Magarshack, Douglas Pattullo, Joseph Sawicki
2007 — conf
Design challenges in 45nm and below: DFM, low-power and design for reliability.
ACM Great Lakes Symposium on VLSI
Philippe Magarshack
2006 A* conf
"The IC nanometer race -- what will it take to win?".
DAC
Gadi Singer, Philippe Magarshack, Dennis Buss, Fu-Chieh Hsu, Ho-Kyu Kang
2004 J jnl
Guest Editors' Introduction: Design for Yield and Reliability.
IEEE Des. Test Comput.
Yervant Zorian, Dimitris Gizopoulos, Cary Vandenberg, Philippe Magarshack
2003 A* conf
Fast, cheap and under control: the next implementation fabric.
DAC
Abbas El Gamal, Ivo Bolsens, Andy Broom, Christopher Hamlin, Philippe Magarshack, Zvi Or-Bach, Lawrence T. Pileggi
2003 Misc conf
Invited Keynote: Building Yield into Systems-on-Chips for Nanometer Technologies.
VTS
Philippe Magarshack
2003 A* conf
System-on-chip beyond the nanometer wall.
DAC
Philippe Magarshack, Pierre G. Paulin
2002 J jnl
Improving SoC Design Quality through a Reproducible Design Flow.
IEEE Des. Test Comput.
Philippe Magarshack
2002 — conf
SoC's Trends and Challenges going to 0.10µm.
MTDT
Philippe Magarshack
2002 — conf
Systems-on-chip needs for embedded software development: an industrial perspective.
LCTES-SCOPES
Philippe Magarshack
2001 A* conf
Panel: When Will the Analog Design Flow Catch Up with Digital Methodology?
DAC
Georges G. E. Gielen, Mike Sottak, Mike Murray, Linda Kaye, Maria del Mar Hershenson, Kenneth S. Kundert, Philippe Magarshack, Akria Matsuzawa, Ronald A. Rohrer, Ping Yang
2001 — conf
Quality of SoC Designs through Quality of the Design Flow: Status and Needs.
ISQED
Philippe Magarshack