Philippe Galy

39 papers C 1Journal 18Unranked 20
YearRankTypeTitle / Venue / Authors
2025 — conf
28 nm FD-SOI 4 K RF LNA Design Using DC Transistor Characterization Measurements.
LATS
Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Jose Lugo, Joao Azevedo, Sebastien Sadlo, Quentin Berlingard, Mickael Casse, Philippe Galy
2024 — conf
LUT-Based Design of a Cryogenic Cascode LNA with Simultaneous Noise and Power Matching.
NewCAS
Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Jose Lugo, Joao Azevedo, Sebastien Sadlo, Quentin Berlingard, Mikaël Cassé, Philippe Galy
2023 J jnl
A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses.
CoRR
Joao Henrique Quintino Palhares, Yann Beilliard, Jury Sandrini, Franck Arnaud, Kevin Garello, Guillaume Prenat, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy
2023 C conf
Noise modeling using look-up tables and DC measurements for cryogenic applications.
VLSI-SoC
Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Quentin Berlingard, Mikaël Cassé, Philippe Galy
2022 — conf
Fast Measurement of BTI on 28nm Fully Depleted Silicon-On-Insulator MOSFETs at Cryogenic Temperature down to 4K.
IRPS
Lauriane Contamin, Mikaël Cassé, Xavier Garros, Fred Gaillard, Maud Vinet, Philippe Galy, André Juge, Emmanuel Vincent, Silvano De Franceschi, Tristan Meunier
2020 — conf
7-mm low-latency inter-chiplet serial link with silicon interposer.
MWSCAS
Mohammed Tmimi, Stefano D'Amico, Jean-Marc Duchamp, Philippe Ferrari, Philippe Galy
2019 — conf
10Gbps Length adaptive on-chip RF serial link for Network on Chips and Multiprocessor chips applications.
ICICDT
Mohammed Tmimi, Stefano D'Amico, Jean-Marc Duchamp, Philippe Ferrari, Philippe Galy
2019 — conf
1T1C Ultra low power relative Thermal-Voltage sensor in 28nm UTBB FD-SOI CMOS technology for standard, spatial and quantum applications.
ICICDT
Philippe Galy, R. Lethiecq, Maryline Bawedin
2019 — conf
Compact MOS Structure & Design for Ion-Ioff Thermal control in 28nm UTBB FD-SOI CMOS technology.
ICICDT
R. Lethiecq, Maryline Bawedin, Philippe Galy
2019 J jnl
On the Low-Frequency Noise Characterization of Z
IEEE Access
Carlos Marquez, Carlos Navarro, Santiago Navarro, José Luis Padilla, Luca Donetti, Carlos Sampedro, Philippe Galy, Yong-Tae Kim, Francisco Gámiz
2019 — conf
Temperature and Gate Leakage Influence on the Z
ESSDERC
Carlos Marquez, Santiago Navarro, Carlos Navarro, Norberto Salazar, Philippe Galy, Sorin Cristoloveanu, Francisco Gámiz
2019 — conf
Thin-Film FD-SOI BIMOS Topologies for ESD Protection.
IRPS
Louise De Conti, Sorin Cristoloveanu, Maud Vinet, Philippe Galy
2018 — conf
Optimized in situ heating control on a new MOS device structure in 28nm UTBB FD-SOI CMOS technology.
ICICDT
Philippe Galy, R. Lethiecq, Maryline Bawedin
2018 J jnl
Simulation, characterization and implementation of a new SCR-based device with a turn-off capability for EOS-immune ESD power supply clamps in advanced CMOS technology nodes.
Microelectron. Reliab.
Jorge Loayza, Nicolas Guitard, Bruno Allard, Luong-Viêt Phung, Blaise Jacquier, Philippe Galy
2017 J jnl
Exploration of robustness limits and ESD EMI impact in a protection device for advanced CMOS technology.
Microelectron. Reliab.
Philippe Galy, Wim Schoenmaker
2017 — conf
Toward Gated-Diode-BIMOS for thin silicon ESD protection in advanced FD-SOI CMOS technologies.
ICICDT
Louise De Conti, Thomas Bedecarrats, Maud Vinet, Sorin Cristoloveanu, Philippe Galy
2016 J jnl
On the need for a new ESD verification methodology to improve the reliability of ICs in advanced 28nm UTBB FD-SOI technology.
Microelectron. Reliab.
Benjamin Viale, Mathieu Fer, Lionel Courau, Philippe Galy, Bruno Allard
2016 — conf
Preliminary results on TFET - Gated diode in thin silicon film for IO design & ESD protection in 28nm UTBB FD-SOI CMOS technology.
ICICDT
Philippe Galy, S. Athanasiou
2015 J jnl
Coupled electro-magnetic field & Lorentz force effects in silicon and metal for ESD investigation in transient and harmonic regimes.
Microelectron. Reliab.
Philippe Galy, Wim Schoenmaker
2015 — conf
Integrated front-end/back-end simulation of electromagnetic fields, Lorentz force effects and fast current surges in microelectronic protection devices.
ICICDT
Wim Schoenmaker, Philippe Galy
2015 — conf
Preliminary 3D TCAD electro-thermal simulations of BIMOS transistor in thin silicon film for ESD protection in FDSOI UTBB CMOS technology.
ICICDT
S. Athanasiou, Sorin Cristoloveanu, Philippe Galy
2014 J jnl
Computation of Self-Induced Magnetic Field Effects Including the Lorentz Force for Fast-Transient Phenomena in Integrated-Circuit Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wim Schoenmaker, Quan Chen, Philippe Galy
2014 — conf
New modular bi-directional power-switch and self ESD protected in 28nm UTBB FDSOI advanced CMOS technology.
ICICDT
Philippe Galy, J. Bourgeat, D. Marin-Cudraz
2013 — conf
6T SRAM performance and power gain using double gate MOS in 28nm FDSOI technology.
ICICDT
Vivek Asthana, Malathi Kar, Jean Jimenez, Sébastien Haendler, Philippe Galy
2013 — conf
Circuit optimization of 4T, 6T, 8T, 10T SRAM bitcells in 28nm UTBB FD-SOI technology using back-gate bias control.
ESSCIRC
Vivek Asthana, Malathi Kar, Jean Jimenez, Jean-Philippe Noel, Sébastien Haendler, Philippe Galy
2013 — conf
ESD protection using BIMOS transistor in 100 GHz RF application for advanced CMOS technology.
ICICDT
Philippe Galy, T. Lim, Jean Jimenez, Boris Heitz, Ph. Benech, J. M. Fournier, D. Marin-Cudraz
2013 J jnl
Symmetrical ESD protection for advanced CMOS technology dedicated to 100 GHz RF application.
Microelectron. Reliab.
Philippe Galy, T. Lim, J. Bourgeat, Jean Jimenez, Boris Heitz, D. Marin-Cudraz, Ph. Benech, J. M. Fournier
2012 — conf
BIMOS transistor and its applications in ESD protection in advanced CMOS technology.
ICICDT
Philippe Galy, Jean Jimenez, Johan Bourgeat, A. Dray, Ghislain Troussier, Boris Heitz, Nicolas Guitard, David Marin-Cudraz, H. Beckrich-Ros
2012 — conf
High swing low capacitance ESD RF protections in advanced CMOS technologies.
ICICDT
Jean Jimenez, Philippe Galy, Johan Bourgeat, Boris Heitz
2012 J jnl
Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology.
Microelectron. Reliab.
Philippe Galy, Johan Bourgeat, Jean Jimenez, Nicolas Guitard, Alexandre Dray, Ghislain Troussier, Blaise Jacquier, David Marin-Cudraz
2011 J jnl
A full characterization of single pitch IO ESD protection based on silicon controlled rectifier and dynamic trigger circuit in CMOS 32 nm node.
Microelectron. Reliab.
J. Bourgeat, Philippe Galy, A. Dray, Jean Jimenez, D. Marin-Cudraz, Blaise Jacquier
2011 J jnl
Reliability impact due to high current, lattice and hot carriers temperatures on β
Microelectron. Reliab.
Philippe Galy, J. Bourgeat, Jean Jimenez, Blaise Jacquier, D. Marin-Cudraz, Sylvain Dudit
2010 J jnl
Evaluation of the ESD performance of local protections based on SCR or bi-SCR with dynamic or static trigger circuit in 32 nm.
Microelectron. Reliab.
J. Bourgeat, Christophe Entringer, Philippe Galy, Marise Bafleur, D. Marin-Cudraz
2010 J jnl
Inventory of silicon signatures induced by CDM event on deep sub-micronic CMOS-BICMOS technologies.
Microelectron. Reliab.
Philippe Galy, Sylvain Dudit, Michel Vallet, Ph. Larre, M. Bilinski, E. Petit, J. Beltritti, A. Dray, Jean Jimenez, Frank Jezequel, R. Chevallier, C. Boutonnat, V. Varo
2009 J jnl
Impact and damage on deep sub-micron CMOS technology induced by substrate current due to ESD stress.
Microelectron. Reliab.
Philippe Galy, Sylvain Dudit, Michel Vallet, Corinne Richier, Christophe Entringer, Frank Jezequel, E. Petit, J. Beltritti
2006 J jnl
Electro-thermal short pulsed simulation for SOI technology.
Microelectron. Reliab.
Christophe Entringer, Philippe Flatresse, Philippe Galy, Florence Azaïs, Pascal Nouet
2004 J jnl
Experimental measurements and 3D simulation of the parasitic lateral bipolar transistor triggering within a single finger gg-nMOS under ESD.
Microelectron. Reliab.
Philippe Galy, V. Berland, A. Guilhaume, F. Blanc, J. P. Chante
2002 J jnl
Experimental and 3D simulation correlation of a gg-nMOS transistor under high current pulse.
Microelectron. Reliab.
Philippe Galy, V. Berland, B. Foucher, A. Guilhaume, J. P. Chante, S. Bardy, F. Blanc
2001 J jnl
Simulation and experimental comparison of GGNMOS and LVTSCR protection cells under ElectroStatic Discharges.
Microelectron. Reliab.
A. Guilhaume, Philippe Galy, J. P. Chante, B. Foucher, F. Blanc