Philippe Bénabès

37 papers C 6Journal 3Unranked 28

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Parallel TIADC calibration for intermittent signal conversion. PRIME Grégoire Lapert, Gerald Charbonnier, Caroline Lelandais-Perrault, Philippe Bénabès
2023	—	`conf`	Design of an ECG front-end considering ST segment distortion. LASCAS Béatrice Guénégo, Caroline Lelandais-Perrault, Emilie Avignon-Meseldzija, Gérard Sou, Philippe Bénabès
2020	—	`conf`	A CMOS readout circuit for a low shunt resistance IR photo-detector. ICECS Saman Fatima, Emilie Avignon-Meseldzija, Caroline Lelandais-Perrault, Mohamed Ben Chouikha, Philippe Bénabès
2020	J	`jnl`	Design of integrated all-pass filters with linear group delay for analog signal processing applications. Int. J. Circuit Theory Appl. João Alberto de França Ferreira, Emilie Avignon-Meseldzija, Pietro Maris Ferreira, Julien Sarrazin, Philippe Bénabès
2019	—	`conf`	A new algorithm for an incremental sigma-delta converter reconstruction filter. SBCCI Li Huang, Caroline Lelandais-Perrault, Anthony Kolar, Philippe Bénabès
2018	—	`conf`	Design and Synthesis of Arbitrary Group Delay Filters for Integrated Analog Signal Processing. ICECS João Alberto de França Ferreira, Emilie Avignon-Meseldzija, Pietro Maris Ferreira, Philippe Bénabès
2017	—	`conf`	A 14-b two-step inverter-based ΣΔ ADC for CMOS image sensor. NEWCAS Pierre Bisiaux, Caroline Lelandais-Perrault, Anthony Kolar, Philippe Bénabès, Filipe Vinci dos Santos
2017	C	`conf`	Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology. ISCAS Alexandre Mas, Eric Andre, Caroline Lelandais-Perrault, Filipe Vinci dos Santos, Philippe Bénabès
2017	—	`conf`	Delay estimation and measurement circuit for a high-speed CMOS clocked comparator. ECCTD L. Cron, P. Laugier, Pietro Maris Ferreira, Filipe Vinci dos Santos, Philippe Bénabès
2016	—	`conf`	A new two-step ΣΔ architecture column-parallel ADC for CMOS image sensor. SBCCI Pierre Bisiaux, Caroline Lelandais-Perrault, Anthony Kolar, Philippe Bénabès, Filipe Vinci dos Santos
2015	—	`conf`	Optimization Methodology for a 460-MHz-GBW and 80-dB-SNR Low-Power Current-Mode Amplifier. SBCCI Pietro Maris Ferreira, Anthony Kolar, Philippe Bénabès
2014	—	`conf`	22.5 A 1.62GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS. ISSCC Nicolas Le Dortz, Jean-Pierre Blanc, Thierry Simon, Sarah Verhaeren, Emmanuel Rouat, Pascal Urard, Stéphane Le Tual, Dimitri Goguet, Caroline Lelandais-Perrault, Philippe Bénabès
2014	—	`conf`	Mismatch calibration methods for high-speed time-interleaved ADCs. NEWCAS Philippe Bénabès, Caroline Lelandais-Perrault, Nicolas Le Dortz
2013	—	`conf`	A Nano quiescent Current Power Management for Autonomous Wireless Sensor Network. ICECS Fabien Todeschini, Christophe Planat, Patrizia Milazzo, Salvatore Tricomi, Pascal Urard, Philippe Bénabès
2013	—	`conf`	A design methodology for delta-sigma converters based on solid-state passive filters. NEWCAS Philippe Bénabès
2013	J	`jnl`	High-loop-delay sixth-order bandpass continuoustime Sigma-Delta modulators. IET Circuits Devices Syst. Mohammad Javidan, Jérôme Juillard, Philippe Bénabès
2012	—	`conf`	Efficient optimization methodology for CT functions based on a modified bayesian kriging approach. ICECS Catalin-Adrian Tugui, R. Benassi, S. Apostol, Philippe Bénabès
2011	C	`conf`	Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures. ISCAS Philippe Bénabès, Catalin-Adrian Tugui
2011	C	`conf`	Generalized multi-stage closed loop sigma delta modulator. ISCAS Van Tam Nguyen, Hussein Fakhoury, Patrick Loumeau, Philippe Bénabès
2011	—	`conf`	Optimization of bandpass charge sampling filters in hybrid filter banks converters for cognitive radio applications. ECCTD Alban Gruget, Morgan Roger, Van Tam Nguyen, Caroline Lelandais-Perrault, Philippe Bénabès, Patrick Loumeau
2010	C	`conf`	Synthesis of Subband Hybrid Filter Banks ADCs with finite word-length coefficients using adaptive equalization. ISCAS Zhiguo Song, Caroline Lelandais-Perrault, Daniel Poulton, Philippe Bénabès
2009	J	`jnl`	Accurate Time-Domain Simulation of Continuous-Time Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. Philippe Bénabès
2009	—	`conf`	Adaptive equalization for calibration of subband hybrid filter banks A/D converters. ECCTD Zhiguo Song, Caroline Lelandais-Perrault, Daniel Poulton, Philippe Bénabès
2009	—	`conf`	Completely first order and tone free partitioned data weighted averaging technique used in a multibit delta sigma modulator. ECCTD Esmaeil Najafi Aghdam, Philippe Bénabès, Javad Abbasszadeh
2009	—	`conf`	Synthesis of complex subband Hybrid Filter Banks A/D converters using adaptive filters. ICECS Zhiguo Song, Caroline Lelandais-Perrault, Philippe Bénabès
2008	—	`conf`	Band-pass continuous-time delta-sigma modulators employing LWR resonators. ICECS Mohammad Javidan, Philippe Bénabès
2008	C	`conf`	Fixed-step simulation of Continuous-Time SigmaDelta modulators. ISCAS Philippe Bénabès, Ali Beydoun
2007	—	`conf`	A Sigma-Delta Converter with Adjustable Tradeoff between Resolution and Consumption. ICECS Philippe Bénabès, Sylvie Guessab
2006	C	`conf`	A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz. ISCAS Esmaeil Najafi Aghdam, Philippe Bénabès
2006	—	`conf`	Bandpass / wideband ADC architecture using parallel delta sigma modulators. EUSIPCO Ali Beydoun, Philippe Bénabès
2005	—	`conf`	Higher order dynamic element matching by shortened tree-structure in delta-sigma modulators. ECCTD Esmaeil Najafi Aghdam, Philippe Bénabès
2003	—	`conf`	A Manchester code generator running at 1 GHz. ICECS Philippe Bénabès, Alain Gauthier, Jacques Oksman
2003	—	`conf`	A new mixed stable DEM algorithm for bandpass multibit delta sigma ADC. ICECS Esmaeil Najafi Aghdam, Philippe Bénabès
2003	—	`conf`	A parallel structure of a continuous-time filter for band-pass sigma-delta A/D converters. ICECS Caroline Lelandais-Perrault, Philippe Bénabès, Jean-Luc De Gouy, Richard Kielbasa
2001	—	`conf`	Bandpass Delta-Sigma modulators synthesis with high loop delay. ISCAS (1) Abdeljalil Yahias, Philippe Bénabès, Richard Kielbasa
1999	—	`conf`	Design of an optoelectronic crossbar based on 0.6 μm CMOS process with a 1 Tbit/s optical input. ICECS Philippe Bénabès, Alain Gauthier, Richard Kielbasa, M. Goetz, M. G. Forbes, Marc P. Y. Desmulliez, A. C. Walker
1997	—	`conf`	A methodology for designing continuous-time sigma-delta modulators. ED&TC Philippe Bénabès, Mansour Keramat, Richard Kielbasa