| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2018 | J | jnl |
IEEE Trans. Emerg. Top. Comput.
|
| 2018 | J | jnl |
State of the art and challenges for test and reliability of emerging nonvolatile resistive memories.
Int. J. Circuit Theory Appl.
|
| 2017 | C | conf |
IOLTS
|
| 2017 | J | jnl |
J. Low Power Electron.
|
| 2017 | C | conf |
EDUCON
|
| 2017 | — | conf |
ATS
|
| 2016 | — | conf |
NEWCAS
|
| 2016 | — | conf |
PATMOS
|
| 2015 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2015 | — | conf |
NANOARCH
|
| 2015 | — | conf |
ECCTD
|
| 2015 | — | conf |
DTIS
|
| 2014 | — | conf |
ISQED
|
| 2013 | A | conf |
DATE
|
| 2012 | Misc | conf |
VTS
|
| 2011 | — | conf |
ECCTD
|
| 2011 | C | conf |
IOLTS
|