Pey-Chang Kent Lin

11 papers A* 2A 1C 3Journal 1Unranked 4

Year	Rank	Type	Title / Venue / Authors
2015	A	`conf`	Efficient Transistor-Level Symbolic Timing Simulation Using Cached Partial Circuit States. ICCAD Clayton B. McDonald, Hsinwei Chou, Vijay Durairaj, Pey-Chang Kent Lin
2013	C	`conf`	Noise-based algorithms for functional equivalence and tautology checking. ICCD Pey-Chang Kent Lin, Sunil P. Khatri
2012	A*	`conf`	Application of logic synthesis to the understanding and cure of genetic diseases. DAC Pey-Chang Kent Lin, Sunil P. Khatri
2012	A*	`conf`	Boolean satisfiability using noise based logic. DAC Pey-Chang Kent Lin, Ayan Mandal, Sunil P. Khatri
2012	—	`conf`	Determining gene function in boolean networks using boolean satisfiability. GENSiPS Pey-Chang Kent Lin, Sunil P. Khatri
2012	C	`conf`	Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening. ICCD Subramanian Poothamkurissi Swaminathan, Pey-Chang Kent Lin, Sunil P. Khatri
2011	C	`conf`	A novel cryptographic key exchange scheme using resistors. ICCD Pey-Chang Kent Lin, Alex Ivanov, Bradley Johnson, Sunil P. Khatri
2011	J	`jnl`	Boolean Satisfiability using Noise Based Logic CoRR Pey-Chang Kent Lin, Ayan Mandal, Sunil P. Khatri
2011	—	`conf`	Efficient cancer therapy using Boolean networks and Max-SAT-based ATPG. GENSiPS Pey-Chang Kent Lin, Sunil P. Khatri
2010	—	`conf`	Inference of gene predictor set using Boolean satisfiability. GENSiPS Pey-Chang Kent Lin, Sunil P. Khatri
2010	—	`conf`	VLSI implementation of a non-linear feedback shift register for high-speed cryptography applications. ACM Great Lakes Symposium on VLSI Pey-Chang Kent Lin, Sunil P. Khatri