Peter Verplaetse

11 papers C 1Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2003 J jnl
A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Joni Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout
2003 — conf
Hardware implementation of an EAN-13 bar code decoder.
ASP-DAC
Jeroen De Maeyer, Harald Devos, Wim Meeus, Peter Verplaetse, Dirk Stroobandt
2002 — conf
Getting more out of Donath's hierarchical model for interconnect prediction.
SLIP
Joni Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout
2001 J jnl
A stochastic model for the interconnection topology of digital circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Peter Verplaetse, Dirk Stroobandt, Jan M. Van Campenhout
2001 — conf
On partitioning vs. placement rent properties.
SLIP
Peter Verplaetse, Joni Dambre, Dirk Stroobandt, Jan Van Campenhout
2001 — conf
On rent's rule for rectangular regions.
SLIP
Joni Dambre, Peter Verplaetse, Dirk Stroobandt, Jan Van Campenhout
2001 — conf
Refinements of Rent's Rule Allowing Accurate Interconnect Complexity Modeling.
ISQED
Peter Verplaetse
2000 J jnl
Generating synthetic benchmark circuits for evaluating CAD tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dirk Stroobandt, Peter Verplaetse, Jan M. Van Campenhout
2000 C conf
On synthetic benchmark generation methods.
ISCAS
Peter Verplaetse, Jan Van Campenhout, Dirk Stroobandt
1999 — conf
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools.
ISPD
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenhout
1998 — conf
ESCAPE: environment for the simulation of computer architectures for the purpose of education.
WCAE@ISCA
Jan Van Campenhout, Peter Verplaetse, Henk Neefs