Peter Deaville

11 papers A* 1Journal 4Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Fully Row/Column-Parallel MRAM in-Memory Computing Macro With Memory-Resistance Boosting and Weighted Multi-Column ADC Readout.
IEEE J. Solid State Circuits
Peter Deaville, Bonan Zhang, Naveen Verma
2025 J jnl
Compute SNDR-Boosted 22-nm MRAM-Based In-Memory Computing Macro Using Statistical Error Compensation.
IEEE J. Solid State Circuits
Saion K. Roy, Han-Mo Ou, Mostafa Gamal Ahmed, Peter Deaville, Bonan Zhang, Naveen Verma, Pavan Kumar Hanumolu, Naresh R. Shanbhag
2024 J jnl
A Fully Row/Column-Parallel In-Memory Computing Macro in Foundry MRAM With Differential Readout for Noise Rejection.
IEEE J. Solid State Circuits
Peter Deaville, Bonan Zhang, Naveen Verma
2023 — conf
A 256-kb Fully Row/Column-parallel 22nm MRAM In-Memory-Computing Macro with Differential Readout for Robust Parallelization and Scale-up.
ESSCIRC
Peter Deaville, Bonan Zhang, Naveen Verma
2023 — conf
Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation.
ESSCIRC
Saion K. Roy, Han-Mo Ou, Mostafa Gamal Ahmed, Peter Deaville, Bonan Zhang, Naveen Verma, Pavan Kumar Hanumolu, Naresh R. Shanbhag
2022 — conf
A 22nm 128-kb MRAM Row/Column-Parallel In-Memory Computing Macro with Memory-Resistance Boosting and Multi-Column ADC Readout.
VLSI Technology and Circuits
Peter Deaville, Bonan Zhang, Naveen Verma
2022 A* conf
Statistical computing framework and demonstration for in-memory computing systems.
DAC
Bonan Zhang, Peter Deaville, Naveen Verma
2021 — conf
A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area.
ESSCIRC
Peter Deaville, Bonan Zhang, Lung-Yen Chen, Naveen Verma
2021 — conf
A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area.
ESSDERC
Peter Deaville, Bonan Zhang, Lung-Yen Chen, Naveen Verma
2019 — conf
A Framework for Design and Implementation of Adaptive Digital Predistortion Systems.
AICAS
Lin Li, Peter Deaville, Adrian E. Sapio, Lauri Anttila, Mikko Valkama, Marilyn Wolf, Shuvra S. Bhattacharyya
2019 J jnl
MADS: A Framework for Design and Implementation of Adaptive Digital Predistortion Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Lin Li, Peter Deaville, Adrian E. Sapio, Lauri Anttila, Mikko Valkama, Marilyn Wolf, Shuvra S. Bhattacharyya