Peter B. Denyer

25 papers A* 1A 3C 1Misc 10Journal 4Unranked 5

Year	Rank	Type	Title / Venue / Authors
1998	J	`jnl`	A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device. IEEE J. Solid State Circuits Stewart G. Smith, J. E. D. Hurwitz, Mairi J. Torrie, Donald J. Baxter, Andrew A. Murray, Paul Likoudis, Andrew J. Holmes, Mark J. Panaghiston, Robert K. Henderson, Stuart Anderson, Peter B. Denyer, David Renshaw
1997	—	`conf`	Java ASP-DAC Peter B. Denyer, Jean Brouwers
1992	A	`conf`	A Comparison of Vector Quantization Codebook Generation Algorithms Applied to Automatic Face Recognition. BMVC C. S. Ramsay, K. Sutherland, David Renshaw, Peter B. Denyer
1992	—	`ed.`	VLSI 91, Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration, Edinburgh, Scotland, 20-22 August, 1991 VLSI Arne Halaas, Peter B. Denyer
1991	—	`conf`	Address Generation for array access based on modulus m counters. EURO-DAC Douglas M. Grant, Peter B. Denyer
1991	—	`conf`	On-Chip CMOS Sensors for VLSI Imaging Systems. VLSI Peter B. Denyer, David Renshaw, Gouyu Wang, Ming Ying Lu, Stuart Anderson
1990	—	`conf`	A new approach to pipeline optimisation. EURO-DAC David J. Mallon, Peter B. Denyer
1990	A*	`conf`	Memory, Control and Communications Synthesis for Scheduled Algorithms. DAC Douglas M. Grant, Peter B. Denyer
1989	A	`conf`	Synthesis of address generators. ICCAD Douglas M. Grant, Peter B. Denyer, I. Finlay
1988	J	`jnl`	A WSI approach towards defect/fault-tolerant reconfigurable serial systems. IEEE J. Solid State Circuits Wei Chen, John Mavor, Peter B. Denyer, David Renshaw
1988	J	`jnl`	Advanced Serial-Data Computation. J. Parallel Distributed Comput. Steven G. Smith, Peter B. Denyer
1988	J	`jnl`	SECOND: synthesis of elementary circuits on demand. IEEE J. Solid State Circuits Stewart G. Smith, Michael Keightley, Peter B. Denyer, Shigenori Nagara
1987	Misc	`conf`	Full-span structural compilation of DSP hardware. ICASSP Steven G. Smith, Peter B. Denyer, David Renshaw, K. Asada, K. P. Coplan, Michael Keightley, Javeed I. Mhar
1987	Misc	`conf`	Serial/Parallel architectures for area-efficient vector multiplication. ICASSP Steven G. Smith, Peter B. Denyer
1987	C	`conf`	Synthesis of area-efficient VLSI architectures for vector and matrix multiplication. IEEE Symposium on Computer Arithmetic Steven G. Smith, Peter B. Denyer
1987	Misc	`conf`	Techniques to increase the computational throughput of bit-serial architectures. ICASSP Steven G. Smith, M. S. McGregor, Peter B. Denyer
1986	Misc	`conf`	A comparison of micro-DSP and Silicon compiler implementations of a polyphase network filter bank. ICASSP Steven G. Smith, A. Fitzgerald, Peter B. Denyer, David Renshaw, N. P. Wootton, R. Creasey
1986	—	`conf`	Advanced Microelectronics as a Foundation for Future Computers (Panel). IFIP Congress Peter B. Denyer
1986	Misc	`conf`	Efficient bit-serial complex multiplication and sum-of-products computation using distributed arithmetic. ICASSP Steven G. Smith, Peter B. Denyer
1984	Misc	`conf`	A bit serial LDI recursive digital filter. ICASSP Laurence E. Turner, Peter B. Denyer, David Renshaw
1984	Misc	`conf`	A bit serial linear array DFT. ICASSP Gregory H. Allen, Peter B. Denyer, David Renshaw
1983	Misc	`conf`	Case studies in VLSI signal processing using a silicon compiler. ICASSP Peter B. Denyer, David Renshaw
1983	Misc	`conf`	Design and realisation of adaptive lattice filters. ICASSP Malcolm J. Rutter, Peter M. Grant, David Renshaw, Peter B. Denyer
1983	A	`conf`	Self-Testing in Bit Serial VLSI Parts: High Coverage at Low Cost. ITC Alan F. Murray, Peter B. Denyer, David Renshaw
1980	Misc	`conf`	Miniature CCD-based analog adaptive filters. ICASSP Colin F. N. Cowan, H. Martin Reekie, John Mavor, John W. Arthur, Peter B. Denyer