Peter Athanas - RankMe

67 papers A 5B 7C 2Misc 5Journal 15Unranked 32

Year	Rank	Type	Title / Venue / Authors
2022	—	`conf`	Kalman Filter Driven Estimation of Community Structure in Time Varying Graphs. HPEC Lisa J. K. Durbeck, Peter Athanas
2021	—	`conf`	DPGS Graph Summarization Preserves Community Structure. HPEC Lisa J. K. Durbeck, Peter Athanas
2020	J	`jnl`	A practical application of game theory to optimize selection of hardware Trojan detection strategies. J. Hardw. Syst. Secur. Jonathan Graf, Whitney Batchelor, Scott J. Harper, Ryan Marlow, Edward Carlisle IV, Peter Athanas
2020	—	`conf`	Incremental Streaming Graph Partitioning. HPEC Lisa J. K. Durbeck, Peter Athanas
2019	J	`jnl`	Data staging for efficient high throughput stream processing. Parallel Comput. Thaddeus Koehn, Peter Athanas
2019	A	`conf`	Scheduling Data in Neural Network Applications. FPGA Thaddeus Koehn, Peter Athanas
2018	—	`conf`	Query language for large-scale P4 network debugging. ANCS Jehandad Khan, Peter Athanas
2018	—	`conf`	p4pktgen: Automated Test Case Generation for P4 Programs. SOSR Andres Nötzli, Jehandad Khan, Andy Fingerhut, Clark W. Barrett, Peter Athanas
2017	J	`jnl`	Hardware accelerated SAT solvers - A survey. J. Parallel Distributed Comput. Ali Asgar Sohanghpurwala, Mohamed W. Hassan, Peter Athanas
2017	J	`jnl`	On the Evaluation of Different High-Performance Computing Platforms for Hyperspectral Imaging: An OpenCL-Based Approach. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. Raúl Guerra, Ernestina Martel, Jehandad Khan, Sebastián López, Peter Athanas, Roberto Sarmiento
2017	—	`conf`	OpenCL-based design pattern for line rate packet processing. ASAP Jehandad Khan, Peter Athanas, Skip Booth, John Marshall
2016	—	`conf`	Automating structured matrix-matrix multiplication for stream processing. ReConFig Thaddeus Koehn, Peter Athanas
2016	J	`jnl`	Introduction to the Special Section on FPGAs Technology and Applications. Comput. Electr. Eng. René Cumplido, Peter Athanas, Eduardo de la Torre
2015	—	`conf`	An efficient structure for run-time configuration of synthesis and channelizer filter banks. ReConFig Thaddeus Koehn, Matthew Carrick, Peter Athanas
2015	—	`conf`	Buffering strategies for ultra high-throughput stream processing. ReConFig Thaddeus Koehn, Peter Athanas
2015	—	`conf`	Energy interactions between multicast and content distribution within data communication networks. ICIT Lisa J. K. Durbeck, Peter Athanas, Nicholas J. Macias
2015	—	`conf`	In-system testing of Xilinx 7-Series FPGAs: Part 1-logic. MILCOM Harmish Modi, Peter Athanas
2015	—	`conf`	Shape exploration for modules in rapid assembly workflows. ReConFig Kevin Lee, Peter Athanas
2014	—	`conf`	A global perspective on energy conservation in large data networks. PATMOS Lisa J. K. Durbeck, Peter Athanas
2014	—	`conf`	A hardware generator for factor graph applications. ReConFig James Demma, Peter Athanas
2014	B	`conf`	An enhanced and embedded GNU radio flow. FPL Ryan Marlow, Chris Dobson, Peter Athanas
2014	J	`jnl`	Introduction to the special issue on FPGA Technology and Applications. Comput. Electr. Eng. Peter Athanas, René Cumplido, Eduardo de la Torre
2014	—	`conf`	On the performance and energy efficiency of FPGAs and GPUs for polyphase channelization. ReConFig Vignesh Adhinarayanan, Thaddeus Koehn, Krzysztof Kepa, Wu-chun Feng, Peter Athanas
2013	—	`conf`	An FPGA Router for Alternative Reconfiguration Flows. IPDPS Workshops Wenwei Zha, Peter Athanas
2013	—	`conf`	Enabling development of OpenCL applications on FPGA platforms. ASAP Kavya Shagrithaya, Krzysztof Kepa, Peter Athanas
2013	—	`conf`	Enhancing productivity with back-end similarity matching of digital circuits for IP reuse. ReConFig Kevin Zeng, Peter Athanas
2013	A	`conf`	FPGA meta-data management system for accelerating implementation time with incremental compilation (abstract only). FPGA Andrew Love, Peter Athanas
2013	A	`conf`	FPGA-based HPC application design for non-experts (abstract only). FPGA David Uliana, Krzysztof Kepa, Peter Athanas
2013	—	`conf`	FPGA-based HPC application design for non-experts. ASAP David Uliana, Krzysztof Kepa, Peter Athanas
2013	C	`conf`	FPGA-based HPC application design for non-experts. RSP David Uliana, Krzysztof Kepa, Peter Athanas
2013	—	`conf`	Fine-Grained Manipulation of FPGA Configuration for Incremental Design. IPDPS Workshops Wenwei Zha, Peter Athanas
2013	B	`conf`	In pursuit of instant gratification for FPGA design. FPL Andrew Love, Wenwei Zha, Peter Athanas
2013	—	`conf`	RAW Introduction. IPDPS Workshops Jürgen Becker, Ramachandran Vaidyanathan, Peter Athanas, Marco D. Santambrogio, René Cumplido, Oliver Sander
2013	B	`conf`	Rapid modular assembly of Xilinx FPGA designs. FPL Andrew Love, Peter Athanas
2013	J	`jnl`	Selected Papers from the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2011). Int. J. Reconfigurable Comput. René Cumplido, Peter Athanas, Jürgen Becker
2012	—	`conf`	A Modular-Based Assembly Framework for Autonomous Reconfigurable Systems. ARC Tannous Frangieh, Richard Stroop, Peter Athanas, Teresa Cervero
2012	—	`conf`	A design assembly framework for FPGA back-end acceleration. ReConFig Tannous Frangieh, Peter Athanas
2012	J	`jnl`	RapidRadio: Signal Classification and Radio Deployment Framework. ACM Trans. Embed. Comput. Syst. Jorge Alberto Surís, Adolfo Recio, Peter Athanas
2011	—	`conf`	An Analysis of Implanted Antennas in Xilinx FPGAs. ReConFig Jacob Couch, Peter Athanas
2011	B	`conf`	ERDB: An Embedded Routing Database for Reconfigurable Systems. FPL Krzysztof Kepa, Fearghal Morgan, Peter Athanas
2011	A	`conf`	Exploration of FPGA interconnect for the design of unconventional antennas. FPGA Abhay Tavaragiri, Jacob Couch, Peter Athanas
2011	—	`conf`	OpenPR: An Open-Source Partial-Reconfiguration Toolkit for Xilinx FPGAs. IPDPS Workshops Ali Asgar Sohanghpurwala, Peter Athanas, Tannous Frangieh, Aaron Wood
2011	—	`conf`	Scalable Models for Autonomous Self-Assembled Reconfigurable Systems. ReConFig Teresa Cervero, Sebastián López, Roberto Sarmiento, Tannous Frangieh, Peter Athanas
2011	—	`conf`	Spectral Method Characterization on FPGA and GPU Accelerators. ReConFig Karl Pereira, Peter Athanas, Heshan Lin, Wu Feng
2011	A	`conf`	Torc: towards an open-source tool flow. FPGA Neil Steiner, Aaron Wood, Hamid Shojaei, Jacob Couch, Peter Athanas, Matthew French
2010	C	`conf`	Automatic modulation classification for rapid radio deployment. International Symposium on Rapid System Prototyping Adolfo Recio, Jorge Alberto Surís, Peter Athanas
2010	J	`jnl`	Guest Editorial ARC 2009. ACM Trans. Reconfigurable Technol. Syst. Roger F. Woods, Jürgen Becker, Peter Athanas, Fearghal Morgan
2010	J	`jnl`	MetaWire: Using FPGA configuration circuitry to emulate a network-on-chip. IET Comput. Digit. Tech. Matthew Shelburne, Cameron D. Patterson, Peter Athanas, Mark Jones, Brian S. Martin, Ryan Fong
2010	—	`ed.`	Proceedings of the International Conference on Field-Programmable Technology, FPT 2010, 8-10 December 2010, Tsinghua University, Beijing, China FPT Jinian Bian, Qiang Zhou, Peter Athanas, Yajun Ha, Kang Zhao
2009	—	`conf`	Element CXI: Exploring Element Computing in Academia. ERSA Peter Athanas
2009	—	`conf`	Enhancing the Productivity of Radio Designers with RapidRadio. ReConFig Jorge Surís, Adolfo Recio, Peter Athanas
2009	B	`conf`	In search of agile hardware. FPL Peter Athanas
2009	J	`jnl`	Slotless module-based reconfiguration of embedded FPGAs. ACM Trans. Embed. Comput. Syst. Cameron D. Patterson, Peter Athanas, Matthew Shelburne, John W. Bowen, Jorge Surís, T. Dunham, J. Rice
2008	B	`conf`	An efficient run-time router for connecting modules in FPGAS. FPL Jorge Surís, Cameron D. Patterson, Peter Athanas
2008	B	`conf`	Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip. FPL Matthew Shelburne, Cameron D. Patterson, Peter Athanas, Mark Jones, Brian S. Martin, Ryan Fong
2007	—	`conf`	Autonomous Computing Systems: A Proposed Roadmap. ERSA Neil Steiner, Peter Athanas
2007	J	`jnl`	Examining the Viability of FPGA Supercomputing. EURASIP J. Embed. Syst. Stephen D. Craven, Peter Athanas
2004	—	`conf`	VTSim: A Virtex-II Device Simulator. ERSA Jesse Hunter, Peter Athanas, Cameron D. Patterson
2003	—	`conf`	A JBits-Based Incremental Design Environment with Non-Preemptive Refinement for Multi-Million Gate FPGAs. Engineering of Reconfigurable Systems and Algorithms Jing Ma, Peter Athanas
2003	Misc	`conf`	A Run-Time Reconfigurable System for Gene-Sequence Searching. VLSI Design Kiran Puttegowda, William Worek, Nicholas Pappas, Anusha Dandapani, Peter Athanas, Allan Dickerman
2003	J	`jnl`	An overview of configurable computing machines for software radio handsets. IEEE Commun. Mag. Srikathyayani Srikanteswara, Ramesh Chembil Palat, Jeffrey H. Reed, Peter Athanas
2003	Misc	`conf`	RSA encryption using Extended Modular Arithmetic on the Quicksilver COSM Adaptive Computing Machine. FCCM Kiran Puttegowda, Peter Athanas
2000	J	`jnl`	A soft radio architecture for reconfigurable platforms. IEEE Commun. Mag. Srikathyayani Srikanteswara, Jeffrey H. Reed, Peter Athanas, Robert J. Boyle
2000	J	`jnl`	Guest Editors' Introduction: Configurable Computing. IEEE Des. Test Comput. Fadi J. Kurdahi, Nader Bagherzadeh, Peter Athanas, Jose L. Muñoz
2000	Misc	`conf`	Hardware-Software Codesign and Parallel Implementation of a Golomb Ruler Derivation Engine. FCCM Euripides Sotiriades, Apostolos Dollas, Peter Athanas
1999	Misc	`conf`	Implementing an API for Distributed Adaptive Computing Systems. FCCM Mark Jones, Luke Scharf, Jonathan Scott, Chris Twaddle, Matthew Yaconis, Kuan Yao, Peter Athanas, Brian Schott
1998	Misc	`conf`	A Scalable FIR Filter Using 32-bit Floating-Point Complex Arithmetic on a Configurable Computing Machine. FCCM Al Walters, Peter Athanas