Per Bjesse

19 papers A* 4A 7B 3Journal 2Unranked 2
YearRankTypeTitle / Venue / Authors
2011 B ed.
International Conference on Formal Methods in Computer-Aided Design, FMCAD '11, Austin, TX, USA, October 30 - November 02, 2011
FMCAD
Per Bjesse, Anna Slobodová
2009 J jnl
Word level bitwidth reduction for unbounded hardware model checking.
Formal Methods Syst. Des.
Per Bjesse
2008 A* conf
A Practical Approach to Word Level Model Checking of Industrial Netlists.
CAV
Per Bjesse
2008 B conf
Word-Level Sequential Memory Abstraction for Model Checking.
FMCAD
Per Bjesse
2007 A conf
A compositional approach to the combination of combinational and sequential equivalence checking of circuits without known reset states.
DATE
In-Ho Moon, Per Bjesse, Carl Pixley
2006 — conf
Practical Issues in Sequential Equivalence Checking through Alignability: Handling Don't Cares and Generating Debug Traces.
HLDVT
In-Ho Moon, Per Bjesse, Carl Pixley
2005 A conf
Automatic generalized phase abstraction for formal verification.
ICCAD
Per Bjesse, James H. Kukula
2004 A conf
DAG-aware circuit compression for formal verification.
ICCAD
Per Bjesse, Arne Borälv
2004 A conf
Using Counter Example Guided Abstraction Refinement to Find Complex Bugs.
DATE
Per Bjesse, James H. Kukula
2003 J jnl
Design automation with mixtures of proof strategies for propositional logic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gunnar Andersson, Per Bjesse, Byron Cook, Ziyad Hanna
2003 A conf
Guiding SAT Diagnosis with Tree Decompositions.
SAT
Per Bjesse, James H. Kukula, Robert F. Damiano, Ted Stanion, Yunshan Zhu
2002 A* conf
A proof engine approach to solving combinational design automation problems.
DAC
Gunnar Andersson, Per Bjesse, Byron Cook, Ziyad Hanna
2002 — conf
Industrial Model Checking Based on Satisfiability Solvers.
SPIN
Per Bjesse
2001 A* conf
Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers.
CAV
Per Bjesse, Tim Leonard, Abdel Mokkedem
2001 — —
Gate Level Description of Synchronous Hardware and Automatic Verification Based on Theorem Proving.
Per Bjesse
2000 B conf
SAT-Based Verification without State Space Traversal.
FMCAD
Per Bjesse, Koen Claessen
2000 A conf
Symbolic Reachability Analysis Based on SAT-Solvers.
TACAS
Parosh Aziz Abdulla, Per Bjesse, Niklas Eén
1999 A* conf
Automatic Verification of Combinatorial and Pipelined FFT.
CAV
Per Bjesse
1998 A conf
Lava: Hardware Design in Haskell.
ICFP
Per Bjesse, Koen Claessen, Mary Sheeran, Satnam Singh