Peng Cao

69 papers A* 1A 5B 3C 2Journal 39Unranked 19
YearRankTypeTitle / Venue / Authors
2026 J jnl
StatCHAR: Statistical Timing Characterization Framework via Heterogeneous Graph Attention Network and Active Learning With Parasitic RC Reduction.
IEEE Trans. Circuits Syst. I Regul. Pap.
Peng Cao, Zeyuan Deng, Yuhan Dong, Xu Cheng, Yuyang Ye, Jun Yang
2025 J jnl
An On-Chip-Training Keyword-Spotting Chip Using Interleaved Pipeline and Computation-in-Memory Cluster in 28-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Junyi Qian, Cai Li, Long Chen, Ruidong Li, Tuo Li, Peng Cao, Xin Si, Weiwei Shan
2025 J jnl
An Optimization-Aware Prerouting Timing Prediction Framework Based on Multimodal Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Peng Cao, Yusen Qin, Guoqing He, Wenjie Ding, Xu Cheng, Zhanhua Zhang, Yuyang Ye
2025 J jnl
Cell Library Characterization for Composite Current Source Models Based on Gaussian Process Regression and Active Learning.
CoRR
Tao Bai, Junzhuo Zhou, Zeyuan Deng, Ting-Jung Lin, Wei W. Xing, Peng Cao, Lei He
2025 A* conf
Late Breaking Results: BLAST: Bisection-Free Learning Approach for Statistical Timing Characterization.
DAC
Kai Jing, Tao Bai, Zeyuan Deng, Junming Jiao, Peng Cao
2024 A conf
A Physical and Timing Aware Placement Optimization Framework Based on Graph Neural Network.
ICCAD
Wenjie Ding, Zhanhua Zhang, Guoqing He, Peng Cao
2024 B conf
An Optimization-aware Pre-Routing Timing Prediction Framework Based on Heterogeneous Graph Learning.
ASPDAC
Guoqing He, Wenjie Ding, Yuyang Ye, Xu Cheng, Qianqian Song, Peng Cao
2024 — conf
Cell Library Characterization for Composite Current Source Models Based on Gaussian Process Regression and Active Learning.
MLCAD
Tao Bai, Zeyuan Deng, Peng Cao
2024 B conf
Heterogeneous Graph Attention Network Based Statistical Timing Library Characterization with Parasitic RC Reduction.
ASPDAC
Xu Cheng, Yuyang Ye, Guoqing He, Qianqian Song, Peng Cao
2024 A conf
LAG-Sizer: A Novel Gate Sizer Based on Leak Generative Adversarial Network with Feature Fusion.
ICCAD
Zhanhua Zhang, Wenjie Ding, Guoqing He, Peng Cao
2024 J jnl
Ultra-low-power one-hot transmission-gate multiplexer (OTG-MUX) scalable into large fan-in circuits in 28 nm CMOS.
Integr.
Yuqiang Cui, Weiwei Shan, Peng Cao
2023 J jnl
A Timing Yield Model for SRAM Cells at Sub/Near-Threshold Voltages Based on a Compact Drain Current Model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shan Shen, Peng Cao, Ming Ling, Longxing Shi
2023 J jnl
An efficient path delay variability model for wide-voltage-range digital circuits.
Sci. China Inf. Sci.
Weiwei Shan, Yuqiang Cui, Wentao Dai, Xinning Liu, Jingjing Guo, Peng Cao, Jun Yang
2023 J jnl
Efficient and Accurate ECO Leakage Optimization Framework With GNN and Bidirectional LSTM.
IEEE Trans. Very Large Scale Integr. Syst.
Peng Cao, Guoqing He, Wenjie Ding, Zhanhua Zhang, Kai Wang, Jun Yang
2023 J jnl
TF-Predictor: Transformer-Based Prerouting Path Delay Prediction Framework.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Peng Cao, Guoqing He, Tai Yang
2023 J jnl
Topology-Aided Multicorner Timing Predictor for Wide Voltage Design.
IEEE Des. Test
Peng Cao, Tai Yang, Kai Wang, Wei Bao, Hao Yan
2022 — conf
A Graph Neural Network Method for Fast ECO Leakage Power Optimization.
ASP-DAC
Kai Wang, Peng Cao
2022 J jnl
A Timing Yield Model for SRAM Cells in Sub/Near-threshold Voltages Based on A Compact Drain Current Model.
CoRR
Shan Shen, Peng Cao, Ming Ling, Longxing Shi
2022 — conf
Pre-Routing Path Delay Estimation Based on Transformer and Residual Framework.
ASP-DAC
Tai Yang, Guoqing He, Peng Cao
2021 — conf
A Timing Prediction Framework for Wide Voltage Design with Data Augmentation Strategy.
ASP-DAC
Peng Cao, Wei Bao, Kai Wang, Tai Yang
2021 — conf
An Adaptive Delay Model for Timing Yield Estimation under Wide-Voltage Range.
ASP-DAC
Hao Yan, Xiao Shi, Chengzhen Xuan, Peng Cao, Longxing Shi
2021 — conf
Analytical Delay Model in Near-Threshold Domain Considering Transition Time.
ICTA
Haiyang Jiang, Bingqian Xu, Peng Cao, Hao Cai
2021 J jnl
Semi-Analytical Path Delay Variation Model With Adjacent Gates Decorrelation for Subthreshold Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jingjing Guo, Peng Cao, Mengxiao Li, Yu Gong, Zhiyuan Liu, Geng Bai, Jun Yang
2020 — conf
A Learning-Based Timing Prediction Framework for Wide Supply Voltage Design.
ACM Great Lakes Symposium on VLSI
Wei Bao, Peng Cao, Hao Cai, Aiguo Bu
2020 C conf
Statistical Timing Model for Subthreshold Circuit with Correlated Variation Consideration.
ISCAS
Jingjing Guo, Peng Cao, Mengxiao Li, Zhiyuan Liu, Jun Yang
2019 — conf
A Statistical Current and Delay Model Based on Log-Skew-Normal Distribution for Low Voltage Region.
ACM Great Lakes Symposium on VLSI
Peng Cao, Jiangping Wu, Zhiyuan Liu, Jingjing Guo, Jun Yang, Longxing Shi
2019 — conf
A Statistical Timing Model for CMOS Inverter in Near-threshold Region Considering Input Transition Time.
ICECS
Peng Cao, Zhiyuan Liu, Bingqian Xu, Jingjing Guo
2019 A conf
A Statistical Timing Model for Low Voltage Design Considering Process Variation.
ICCAD
Peng Cao, Zhiyuan Liu, Jiangping Wu, Jingjing Guo, Jun Yang, Longxing Shi
2019 — conf
Accurate and Efficient Interdependent Timing Model for Flip-Flop in Wide Voltage Region.
NEWCAS
Peng Cao, Zhiyuan Liu, Jingjing Guo, Haoyu Pang, Jiangping Wu, Jun Yang
2019 J jnl
An Analytical Gate Delay Model in Near/Subthreshold Domain Considering Process Variation.
IEEE Access
Peng Cao, Zhiyuan Liu, Jingjing Guo, Jiangping Wu
2017 J jnl
Coarse-grained reconfigurable architecture with hierarchical context cache structure and management approach.
IEICE Electron. Express
Chao Wang, Peng Cao, Bo Liu, Jun Yang
2017 J jnl
Context Management Scheme Optimization of Coarse-Grained Reconfigurable Architecture for Multimedia Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Peng Cao, Bo Liu, Jinjiang Yang, Jun Yang, Meng Zhang, Longxing Shi
2017 J jnl
Efficient AES cipher on coarse-grained reconfigurable architecture.
IEICE Electron. Express
Chao Wang, Peng Cao, Jun Yang
2016 J jnl
An area-efficient design of reconfigurable S-box for parallel implementation of block ciphers.
IEICE Electron. Express
Jinjiang Yang, Ge Wei, Peng Cao, Jun Yang
2016 J jnl
Image Arbitrary-Ratio Down- and Up-Sampling Scheme Exploiting DCT Low Frequency Components and Sparsity in High Frequency Components.
IEICE Trans. Inf. Syst.
Meng Zhang, Tinghuan Chen, Xuchao Shi, Peng Cao
2016 J jnl
Timing monitoring paths selection for wide voltage IC.
IEICE Electron. Express
Weiwei Shan, Wentao Dai, Youhua Shi, Peng Cao, Xiaoyan Xiang
2015 J jnl
A GPS Bit Synchronization Method Based on Frequency Compensation.
IEICE Trans. Commun.
Xinning Liu, Yuxiang Niu, Jun Yang, Peng Cao
2015 J jnl
An Energy-Efficient Coarse-Grained Reconfigurable Processing Unit for Multiple-Standard Video Decoding.
IEEE Trans. Multim.
Leibo Liu, Dong Wang, Min Zhu, Yansheng Wang, Shouyi Yin, Peng Cao, Jun Yang, Shaojun Wei
2015 J jnl
Configuration Approaches to Enhance Computing Efficiency of Coarse-Grained Reconfigurable Array.
J. Circuits Syst. Comput.
Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei
2015 J jnl
Correction to "An Energy-Efficient Coarse-Grained Reconfigurable Processing Unit for Multiple-Standard Video Decoding".
IEEE Trans. Multim.
Leibo Liu, Dong Wang, Min Zhu, Yansheng Wang, Shouyi Yin, Peng Cao, Jun Yang, Shaojun Wei
2014 — conf
A Configuration Compression Approach for Coarse-Grain Reconfigurable Architecture for Radar Signal Processing.
CyberC
Bo Liu, Wan-Yu Zhu, Yang Liu, Peng Cao
2014 J jnl
A parallel arithmetic array for accelerating compute-intensive applications.
IEICE Electron. Express
Dong Wang, Peng Cao, Yang Xiao
2014 B conf
Configuration approaches to improve computing efficiency of coarse-grained reconfigurable multimedia processor.
FPL
Chen Yang, Leibo Liu, Yansheng Wang, Shouyi Yin, Peng Cao, Shaojun Wei
2014 — conf
Hierarchical Pipeline Optimization of Coarse Grained Reconfigurable Processor for Multimedia Applications.
IPDPS Workshops
Chen Mei, Peng Cao, Yang Zhang, Bo Liu, Leibo Liu
2014 J jnl
Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor.
Sci. China Inf. Sci.
Leibo Liu, Yingjie Victor Chen, Dong Wang, Shouyi Yin, Xing Wang, Long Wang, Hao Lei, Peng Cao, Shaojun Wei
2014 J jnl
On-Chip Memory Hierarchy in One Coarse-Grained Reconfigurable Architecture to Compress Memory Space and to Reduce Reconfiguration Time and Data-Reference Time.
IEEE Trans. Very Large Scale Integr. Syst.
Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei
2014 J jnl
Reduced-error constant correction truncated multiplier.
IEICE Electron. Express
Dong Wang, Peng Cao, Yang Xiao
2014 J jnl
VLSI design of a reconfigurable S-box based on memory sharing method.
IEICE Electron. Express
Weiwei Shan, Xiao Zhang, Xingyuan Fu, Peng Cao
2013 — conf
A Robust and Efficient Minutia-Based Fingerprint Matching Algorithm.
ACPR
Wen Wen, Zhi Qi, Zhi Li, Junhao Zhang, Yu Gong, Peng Cao
2013 — conf
An energy-efficient coarse-grained dynamically reconfigurable fabric for multiple-standard video decoding applications.
CICC
Leibo Liu, Chenchen Deng, Dong Wang, Min Zhu, Shouyi Yin, Peng Cao, Shaojun Wei
2013 J jnl
An improved timing monitor for deep dynamic voltage scaling system.
IEICE Electron. Express
Weiwei Shan, Haolin Gu, Bo Li, Xiaoqing Wu, Haikun Jin, Yintao Guo, Peng Cao
2013 J jnl
Evaluation of Correlation Power Analysis Resistance and Its Application on Asymmetric Mask Protected Data Encryption Standard Hardware.
IEEE Trans. Instrum. Meas.
Weiwei Shan, Xin Chen, Bo Li, Peng Cao, Jie Li, Gugang Gao, Longxing Shi
2013 J jnl
Exploration of Full HD Media Decoding on a Software Defined Radio Baseband Processor.
IEEE Trans. Signal Process.
Chen Mei, Min Li, Peng Cao, Amir Amin, Chunshu Li, Jun Yang, Antoine Dejonghe, Liesbet Van der Perre, Longxing Shi, Sofie Pollin
2013 J jnl
Hardware Software Co-design of H.264 Baseline Encoder on Coarse-Grained Dynamically Reconfigurable Computing System-on-Chip.
IEICE Trans. Inf. Syst.
Hung K. Nguyen, Peng Cao, Xuexiang Wang, Jun Yang, Longxing Shi, Min Zhu, Leibo Liu, Shaojun Wei
2013 J jnl
Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture.
Sci. China Inf. Sci.
Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei
2013 C conf
Implementation of multi-standard video decoding algorithms on a coarse-grained reconfigurable multimedia processor.
ISCAS
Leibo Liu, Yingjie Victor Chen, Shouyi Yin, Dong Wang, Xing Wang, Shaojun Wei, Li Zhou, Hao Lei, Peng Cao
2013 J jnl
Parallelism Analysis of H.264 Decoder and Realization on a Coarse-Grained Reconfigurable SoC.
IEICE Trans. Inf. Syst.
Gugang Gao, Peng Cao, Jun Yang, Longxing Shi
2013 J jnl
The Organization of On-Chip Data Memory in One Coarse-Grained Reconfigurable Architecture.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yansheng Wang, Leibo Liu, Shouyi Yin, Min Zhu, Peng Cao, Jun Yang, Shaojun Wei
2012 — conf
A New Approach to Implement Discrete Wavelet Transform on Coarse-Grained Reconfigurable Architecture.
CyberC
Jie Li, Xinxiang Ke, Peng Cao, Weiwei Shan
2012 — conf
Configuration Cache Management for Coarse-Grained Reconfigurable Architecture with Multi-Array.
CyberC
Peng Cao, Yong Cai, Bo Liu, Weiwei Shan
2012 J jnl
Date Flow Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications.
IEICE Trans. Inf. Syst.
Xinning Liu, Chen Mei, Peng Cao, Min Zhu, Longxing Shi
2012 — conf
Exploration of Full HD Media Decoding on SDR Baseband Processor.
SiPS
Chen Mei, Min Li, Peng Cao, Amir Amin, Chunshu Li, Sofie Pollin, Jun Yang
2012 — conf
Hybrid-Priority Configuration Cache Supervision Method for Coarse Grained Reconfigurable Architecture.
CyberC
Bo Liu, Peng Cao, Jinjiang Yang
2012 — conf
Memory Bandwidth Optimization Strategy of Coarse-Grained Reconfigurable Architecture.
CyberC
Peng Cao, Huiyan Jiang, Bo Liu, Weiwei Shan
2012 J jnl
Reconfiguration Process Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications.
IEICE Trans. Inf. Syst.
Bo Liu, Peng Cao, Min Zhu, Jun Yang, Leibo Liu, Shaojun Wei, Longxing Shi
2010 J jnl
Memory-Efficient and High-Speed VLSI Implementation of Two-Dimensional Discrete Wavelet Transform Using Decomposed Lifting Scheme.
J. Signal Process. Syst.
Peng Cao, Chao Wang, Longxing Shi
2009 A conf
Area-efficient line-based two-dimensional discrete wavelet transform architecture without data buffer.
ICME
Peng Cao, Chao Wang, Jun Yang, Longxing Shi
2009 J jnl
Memory-Efficient and High-Performance Two-Dimensional Discrete Wavelet Transform Architecture Based on Decomposed Lifting Algorithm.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Peng Cao, Chao Wang, Longxing Shi
2007 A conf
An Efficient VLSI Architecture for Lifting-Based Discrete Wavelet Transform.
ICME
Chao Wang, Wu Zhilin, Peng Cao, Li Jie