Pekka Jääskeläinen

137 papers A 1B 8C 10Misc 7Journal 45Unranked 64

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Pareto-Conditioned Diffusion Models for Offline Multi-Objective Optimization. CoRR Jatan Shrestha, Santeri Heiskanen, Kari Hepola, Severi Rissanen, Pekka Jääskeläinen, Joni Pajarinen
2026	—	`conf`	RGB ReSTIR: Decorrelating Spatiotemporal Importance Resampling with Per-Channel Reservoirs. GRIVAPP Markku Mäkitalo, Saku Haikio, Julius Ikkala, Alessandro Foi, Pekka Jääskeläinen
2025	J	`jnl`	Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions. IEEE Trans. Very Large Scale Integr. Syst. Kari Hepola, Tharaka Ranasinghe Arachchige, Joonas Multanen, Pekka Jääskeläinen
2025	J	`jnl`	CV-Cast: Computer Vision-Oriented Linear Coding and Transmission. IEEE Trans. Mob. Comput. Jakub Zádník, Michel Kieffer, Anthony Trioux, Markku J. Mäkitalo, Pekka Jääskeläinen
2025	J	`jnl`	Correction to "CV-Cast: Computer Vision-Oriented Linear Coding and Transmission". IEEE Trans. Mob. Comput. Jakub Zádník, Michel Kieffer, Anthony Trioux, Markku J. Mäkitalo, Pekka Jääskeläinen
2025	J	`jnl`	Dynamic load balancing for real-time multiview path tracing on multi-GPU architectures. Virtual Real. Intell. Hardw. Erwan Leria, Markku Mäkitalo, Julius Ikkala, Pekka Jääskeläinen
2025	B	`conf`	Open Software Stack for Compression-Aware Adaptive Edge Offloading. WCNC Jakub Zádník, Robin Bijl, Jan Solanti, Erno Joensuu, Markku J. Mäkitalo, Pekka Jääskeläinen
2025	J	`jnl`	PoCL-R: An open standard based heterogeneous offloading layer with server side scalability. Int. J. High Perform. Comput. Appl. Jan Solanti, Michal Babej, Julius Ikkala, Pekka Jääskeläinen
2024	J	`jnl`	Bitstream Database-Driven FPGA Programming Flow Based on Standard OpenCL. IEEE Trans. Very Large Scale Integr. Syst. Topi Leppänen, Leevi Leppänen, Joonas Multanen, Pekka Jääskeläinen
2024	—	`conf`	Cycle Count Estimation of VLIW Processors Using Machine Learning. NorCAS Kari Hepola, Jatan Shrestha, Joonas Multanen, Vivienne Wang, Joni Pajarinen, Pekka Jääskeläinen
2024	J	`jnl`	Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode. IEEE Trans. Computers Kari Hepola, Joonas Multanen, Pekka Jääskeläinen
2024	J	`jnl`	Energy-efficient instruction compression with programmable dictionaries. Des. Autom. Embed. Syst. Joonas Multanen, Barry de Bruin, Henk Corporaal, Pekka Jääskeläinen
2024	—	`conf`	Fully Automatic Compiler Retargeting and CV-X-IF Hardware Interface Generation for RISC-V Custom Instructions. NorCAS Kari Hepola, Tharaka Ranasinghe Arachchige, Joonas Multanen, Pekka Jääskeläinen
2024	—	`conf`	Hierarchical Bitmask Implicit Grids for Efficient Point-in-Volume Queries on the GPU. VISIGRAPP (1): GRAPP, HUCAPP, IVAPP Julius Ikkala, Tuomas Lauttia, Pekka Jääskeläinen, Markku J. Mäkitalo
2024	B	`conf`	Interactive Multi-GPU Light Field Path Tracing Using Multi-Source Spatial Reprojection. VRST Erwan Leria, Markku J. Mäkitalo, Pekka Jääskeläinen, Mårten Sjöström, Tingting Zhang
2024	B	`conf`	Performance of Linear Coding and Transmission in Low-Latency Computer Vision Offloading. WCNC Jakub Zádník, Anthony Trioux, Michel Kieffer, Markku J. Mäkitalo, François-Xavier Coudoux, Patrick Corlay, Pekka Jääskeläinen
2024	J	`jnl`	R-Blocks: an Energy-Efficient, Flexible, and Programmable CGRA. ACM Trans. Reconfigurable Technol. Syst. Barry de Bruin, Kanishkan Vadivel, Mark Wijtvliet, Pekka Jääskeläinen, Henk Corporaal
2024	—	`conf`	Towards Efficient OpenCL Pipe Specification for Hardware Accelerators. IWOCL Topi Leppänen, Joonas Multanen, Leevi Leppänen, Pekka Jääskeläinen
2024	—	`conf`	k-DOP Clipping: Robust Ghosting Mitigation in Temporal Antialiasing. SIGGRAPH Asia Technical Communications Julius Ikkala, Tuomas Lauttia, Pekka Jääskeläinen, Markku J. Mäkitalo
2023	J	`jnl`	AEx: Automated High-Level Synthesis of Compiler Programmable Co-Processors. J. Signal Process. Syst. Alex Hirvonen, Topi Leppänen, Kari Hepola, Joonas Multanen, Joost Hoozemans, Pekka Jääskeläinen
2023	—	`conf`	AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management. NorCAS Topi Leppänen, Joonas Multanen, Leevi Leppänen, Pekka Jääskeläinen
2023	C	`conf`	BrainTTA: A 28.6 TOPS/W Compiler Programmable Transport-Triggered NN SoC. ICCD Maarten J. Molendijk, Floran A. M. de Putter, Manil Dev Gomony, Pekka Jääskeläinen, Henk Corporaal
2023	J	`jnl`	Efficient OpenCL system integration of non-blocking FPGA accelerators. Microprocess. Microsystems Topi Leppänen, Atro Lotvonen, Panagiotis Mousouliotis, Joonas Multanen, Georgios Keramidas, Pekka Jääskeläinen
2023	—	`conf`	On the OpenCL Support for Streaming Fixed-Function Accelerators on Embedded SoC FPGAs. ARC Panagiotis Mousouliotis, Topi Leppänen, Pekka Jääskeläinen, Nikos Petrellis, Panagiotis Christakos, Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros
2023	—	`conf`	Open Standard Software Stack for Low Latency Offloading from Lightweight Devices to Remote Heterogeneous Platforms. IWOCL Jan Solanti, Topi Leppänen, Pekka Jääskeläinen
2023	J	`jnl`	PoCL-R: An Open Standard Based Offloading Layer for Heterogeneous Multi-Access Edge Computing with Server Side Scalability. CoRR Jan Solanti, Michal Babej, Julius Ikkala, Pekka Jääskeläinen
2023	J	`jnl`	TauBench 1.1: A Dynamic Benchmark for Graphics Rendering. CoRR Erfan Momeni Yazdi, Markku J. Mäkitalo, Julius Ikkala, Pekka Jääskeläinen
2022	J	`jnl`	BrainTTA: A 35 fJ/op Compiler Programmable Mixed-Precision Transport-Triggered NN SoC. CoRR Maarten Molendijk, Floran de Putter, Manil Dev Gomony, Pekka Jääskeläinen, Henk Corporaal
2022	J	`jnl`	Cross-vendor programming abstraction for diverse heterogeneous platforms. Frontiers Comput. Sci. Topi Leppänen, Atro Lotvonen, Pekka Jääskeläinen
2022	—	`conf`	Dual-IS: Instruction Set Modality for Efficient Instruction Level Parallelism. ARCS Kari Hepola, Joonas Multanen, Pekka Jääskeläinen
2022	J	`jnl`	Energy-Efficient Instruction Delivery in Embedded Systems With Domain Wall Memory. IEEE Trans. Computers Joonas Multanen, Kari Hepola, Asif Ali Khan, Jerónimo Castrillón, Pekka Jääskeläinen
2022	J	`jnl`	Image and Video Coding Techniques for Ultra-low Latency. ACM Comput. Surv. Jakub Zádník, Markku J. Mäkitalo, Jarno Vanne, Pekka Jääskeläinen
2022	—	`conf`	OpenASIP 2.0: Co-Design Toolset for RISC-V Application-Specific Instruction-Set Processors. ASAP Kari Hepola, Joonas Multanen, Pekka Jääskeläinen
2022	C	`conf`	Prebypass: Software Register File Bypassing for Reduced Interconnection Architectures. DSD Kanishkan Vadivel, Barry de Bruin, Roel Jordans, Henk Corporaal, Pekka Jääskeläinen
2022	C	`conf`	Pruned Lightweight Encoders for Computer Vision. MMSP Jakub Zádník, Markku J. Mäkitalo, Pekka Jääskeläinen
2022	J	`jnl`	Pruned Lightweight Encoders for Computer Vision. CoRR Jakub Zádník, Markku J. Mäkitalo, Pekka Jääskeläinen
2022	C	`conf`	Real-Time Light Field Path Tracing. CGI Markku J. Mäkitalo, Erwan Leria, Julius Ikkala, Pekka Jääskeläinen
2022	J	`jnl`	Real-Time Rendering of Point Clouds With Photorealistic Effects: A Survey. IEEE Access Petrus E. J. Kivi, Markku J. Mäkitalo, Jakub Zádník, Julius Ikkala, Vinod Kumar Malamal Vadakital, Pekka Jääskeläinen
2022	—	`conf`	TauBench: Dynamic Benchmark for Graphics Rendering. VISIGRAPP (1: GRAPP) Joel Alanko, Markku J. Mäkitalo, Pekka Jääskeläinen
2022	—	`conf`	Tauray: A Scalable Real-Time Open-Source Path Tracer for Stereo and Light Field Displays. SIGGRAPH Asia Technical Communications Julius Ikkala, Markku J. Mäkitalo, Tuomas Lauttia, Erwan Leria, Pekka Jääskeläinen
2021	C	`conf`	DDISH-GI: Dynamic Distributed Spherical Harmonics Global Illumination. CGI Julius Ikkala, Petrus E. J. Kivi, Joel Alanko, Markku J. Mäkitalo, Pekka Jääskeläinen
2021	J	`jnl`	Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project. Microprocess. Microsystems Carlo Sau, Claudia Rinaldi, Luigi Pomante, Francesca Palumbo, Giacomo Valente, Tiziana Fanni, Marcos Martinez de Alejandro, Frank van der Linden, Twan Basten, Marc Geilen, Geran Peeren, Jirí Kadlec, Pekka Jääskeläinen, Lubomír Bulej, Francisco Barranco, Jukka Saarinen, Tero Säntti, Maria Katiuscia Zedda, Victor Sanchez, Shayan Tabatabaei Nikkhah, Dip Goswami, Guillermo Amat, Lukás Marsík, Mark van Helvoort, Luis Medina, Zaid Al-Ars, Ad de Beer
2021	—	`conf`	Energy Efficient Multistandard Decompressor ASIP. ICCDE Joost Hoozemans, Kati Tervo, Pekka Jääskeläinen, Zaid Al-Ars
2021	J	`jnl`	Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments. Int. J. Parallel Program. Sven Gesper, Moritz Weißbrich, Tobias Stuckenberg, Pekka Jääskeläinen, Holger Blume, Guillermo Payá-Vayá
2021	—	`conf`	Performance of Texture Compression Algorithms in Low-Latency Computer Vision Tasks. EUVIP Jakub Zádník, Markku J. Mäkitalo, Jussi Iho, Pekka Jääskeläinen
2021	—	`conf`	PoCL-R: A Scalable Low Latency Distributed OpenCL Runtime. SAMOS Jan Solanti, Michal Babej, Julius Ikkala, Vinod Kumar Malamal Vadakital, Pekka Jääskeläinen
2021	—	`conf`	Unified OpenCL Integration Methodology for FPGA Designs. NorCAS Topi Leppänen, Panagiotis Mousouliotis, Georgios Keramidas, Joonas Multanen, Pekka Jääskeläinen
2020	—	`conf`	CPSoSaware: Cross-Layer Cognitive Optimization Tools & Methods for the Lifecycle Support of Dependable CPSoS. ISVLSI Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros, Pekka Jääskeläinen, Marisa Catalán Cid, Evangelia I. Zacharaki, Apostolos P. Fournaris, Aris S. Lalos
2020	C	`conf`	Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project. DSD Luigi Pomante, Francesca Palumbo, Claudia Rinaldi, Giacomo Valente, Carlo Sau, Tiziana Fanni, Frank van der Linden, Twan Basten, Marc Geilen, Geran Peeren, Jirí Kadlec, Pekka Jääskeläinen, Marcos Martinez de Alejandro, Jukka Saarinen, Tero Säntti, Maria Katiuscia Zedda, Victor Sanchez, Dip Goswami, Zaid Al-Ars, Ad de Beer
2020	J	`jnl`	Energy Efficient Low Latency Multi-issue Cores for Intelligent Always-On IoT Applications. J. Signal Process. Syst. Joonas Multanen, Heikki Kultala, Kati Tervo, Pekka Jääskeläinen
2020	—	`conf`	HIPCL: Tool for Porting CUDA Applications to Advanced OpenCL Platforms Through HIP. IWOCL Michal Babej, Pekka Jääskeläinen
2020	Misc	`conf`	Machine Learning is the Solution Also for Foveated Path Tracing Reconstruction. VISIGRAPP (1: GRAPP) Atro Lotvonen, Matias Koskela, Pekka Jääskeläinen
2020	—	`conf`	POCL-R: Distributed OpenCL Runtime for Low Latency Remote Offloading. IWOCL Jan Solanti, Michal Babej, Julius Ikkala, Pekka Jääskeläinen
2020	C	`conf`	Programmable Dictionary Code Compression for Instruction Stream Energy Efficiency. ICCD Joonas Multanen, Kari Hepola, Pekka Jääskeläinen
2020	—	`conf`	System Simulation of Memristor Based Computation in Memory Platforms. SAMOS Ali BanaGozar, Kanishkan Vadivel, Joonas Multanen, Pekka Jääskeläinen, Sander Stuijk, Henk Corporaal
2020	J	`jnl`	Systematic Evaluation of the Quality Benefits of Spatiotemporal Sample Reprojection in Real-Time Stereoscopic Path Tracing. IEEE Access Markku J. Mäkitalo, Petrus E. J. Kivi, Pekka Jääskeläinen
2020	B	`conf`	TTA-SIMD Soft Core Processors. FPL Kati Tervo, Samawat Malik, Topi Leppänen, Pekka Jääskeläinen
2019	C	`conf`	AEx: Automated Customization of Exposed Datapath Soft-Cores. DSD Alex Hirvonen, Kati Tervo, Heikki Kultala, Pekka Jääskeläinen
2019	J	`jnl`	ALMARVI System Solution for Image and Video Processing in Healthcare, Surveillance and Mobile Applications. J. Signal Process. Syst. Zaid Al-Ars, Steven van der Vlugt, Pekka Jääskeläinen, Frank van der Linden
2019	J	`jnl`	Blockwise Multi-Order Feature Regression for Real-Time Path-Tracing Reconstruction. ACM Trans. Graph. Matias Koskela, Kalle Immonen, Markku J. Mäkitalo, Alessandro Foi, Timo Viitanen, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
2019	—	`conf`	Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments. SAMOS Sven Gesper, Moritz Weißbrich, Stephan Nolting, Tobias Stuckenberg, Pekka Jääskeläinen, Holger Blume, Guillermo Payá-Vayá
2019	J	`jnl`	Exploiting Task Parallelism with OpenCL: A Case Study. J. Signal Process. Syst. Pekka Jääskeläinen, Ville Korhonen, Matias Koskela, Jarmo Takala, Karen O. Egiazarian, Aram Danielyan, Cristóvão Cruz, James Price, Simon McIntosh-Smith
2019	—	`conf`	Foveated Real-Time Path Tracing in Visual-Polar Space. EGSR (DL/I) Matias Koskela, Atro Lotvonen, Markku J. Mäkitalo, Petrus E. J. Kivi, Timo Viitanen, Pekka Jääskeläinen
2019	J	`jnl`	LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor. IEEE Trans. Very Large Scale Integr. Syst. Heikki Kultala, Timo Viitanen, Heikki Berg, Pekka Jääskeläinen, Joonas Multanen, Mikko Kokkonen, Kalle Raiskila, Tommi Zetterman, Jarmo Takala
2019	J	`jnl`	Programmable and Scalable Architecture for Graphics Processing Units. Trans. High Perform. Embed. Archit. Compil. Carlos S. de La Lama, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
2019	—	`conf`	Reducing Computational Complexity of Real-Time Stereoscopic Ray Tracing with Spatiotemporal Sample Reprojection. VISIGRAPP (1: GRAPP) Markku J. Mäkitalo, Petrus E. J. Kivi, Matias Koskela, Pekka Jääskeläinen
2019	A	`conf`	SHRIMP: Efficient Instruction Delivery with Domain Wall Memory. ISLPED Joonas Multanen, Pekka Jääskeläinen, Asif Ali Khan, Fazal Hameed, Jerónimo Castrillón
2019	—	`conf`	The FitOptiVis ECSEL project: highly efficient distributed embedded image/video processing in cyber-physical systems. CF Zaid Al-Ars, Twan Basten, Ad de Beer, Marc Geilen, Dip Goswami, Pekka Jääskeläinen, Jirí Kadlec, Marcos Martinez de Alejandro, Francesca Palumbo, Geran Peeren, Luigi Pomante, Frank van der Linden, Jukka Saarinen, Tero Säntti, Carlo Sau, Maria Katiuscia Zedda
2019	C	`conf`	Towards Efficient Code Generation for Exposed Datapath Architectures. SCOPES Kanishkan Vadivel, Roel Jordans, Sander Stuijk, Henk Corporaal, Pekka Jääskeläinen, Heikki Kultala
2018	—	`conf`	AivoTTA: an energy efficient programmable accelerator for CNN-based object recognition. SAMOS Jos IJzerman, Timo Viitanen, Pekka Jääskeläinen, Heikki Kultala, Lasse Lehtonen, Maurice Peemen, Henk Corporaal, Jarmo Takala
2018	—	`conf`	Energy-Delay Trade-Offs in Instruction Register File Design. NORCAS Joonas Multanen, Heikki Kultala, Pekka Jääskeläinen
2018	J	`jnl`	Instantaneous foveated preview for progressive Monte Carlo rendering. Comput. Vis. Media Matias Koskela, Kalle Immonen, Timo Viitanen, Pekka Jääskeläinen, Joonas Multanen, Jarmo H. Takala
2018	J	`jnl`	Instruction Fetch Energy Reduction with Biased SRAMs. J. Signal Process. Syst. Joonas Multanen, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2018	—	`conf`	LoTTA: Energy-Efficient Processor for Always-On Applications. SiPS Joonas Multanen, Heikki Kultala, Pekka Jääskeläinen, Timo Viitanen, Aleksi Tervo, Jarmo Takala
2018	—	`conf`	Offloading C++17 Parallel STL on System Shared Virtual Memory Platforms. ISC Workshops Pekka Jääskeläinen, John Glossner, Martin Jambor, Aleksi Tervo, Matti Rintala
2018	J	`jnl`	PLOCTree: A Fast, High-Quality Hardware BVH Builder. Proc. ACM Comput. Graph. Interact. Tech. Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Aleksi Tervo, Jarmo Takala
2018	J	`jnl`	Software Defined Radio Implementation of a Digital Self-interference Cancellation Method for Inband Full-Duplex Radio Using Mobile Processors. J. Signal Process. Syst. Mona Aghababaeetafreshi, Dani Korpi, Matias Koskela, Pekka Jääskeläinen, Mikko Valkama, Jarmo Takala
2018	—	`conf`	Sparse Sampling for Real-time Ray Tracing. VISIGRAPP (1: GRAPP) Timo Viitanen, Matias Koskela, Kalle Immonen, Markku J. Mäkitalo, Pekka Jääskeläinen, Jarmo Takala
2018	—	`conf`	Transport Triggered Polar Decoders. ISTC Mathieu Léonardon, Camille Leroux, Pekka Jääskeläinen, Christophe Jégo, Yvon Savaria
2018	—	`conf`	Transport-Triggered Soft Cores. IPDPS Workshops Pekka Jääskeläinen, Aleksi Tervo, Guillermo Payá Vayá, Timo Viitanen, Nicolai Behmann, Jarmo Takala, Holger Blume
2018	J	`jnl`	Variable Length Instruction Compression on Transport Triggered Architectures. Int. J. Parallel Program. Timo Viitanen, Janne Helkala, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Tommi Zetterman, Heikki Berg
2017	—	`ch.`	Codesign Case Study on Transport-Triggered Architectures. Handbook of Hardware/Software Codesign Jarmo Takala, Pekka Jääskeläinen, Teemu Pitkänen
2017	—	`conf`	Exposed datapath optimizations for loop scheduling. SAMOS Heikki O. Kultala, Pekka Jääskeläinen, Johannes IJzerman, Lasse Lehtonen, Timo Viitanen, Markku J. Mäkitalo, Jarmo H. Takala
2017	J	`jnl`	Fast Hardware Construction and Refitting of Quantized Bounding Volume Hierarchies. Comput. Graph. Forum Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Kalle Immonen, Jarmo Takala
2017	—	`conf`	Foveated instant preview for progressive rendering. SIGGRAPH Asia Technical Briefs Matias Koskela, Kalle Immonen, Timo Viitanen, Pekka Jääskeläinen, Joonas Multanen, Jarmo Takala
2017	J	`jnl`	MergeTree: A Fast Hardware HLBVH Constructor for Animated Ray Tracing. ACM Trans. Graph. Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
2016	—	`conf`	Aggressively bypassing list scheduler for transport triggered architectures. SAMOS Heikki O. Kultala, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2016	—	`conf`	Customized high performance low power processor for binaural speaker localization. ICECS Nicolai Behmann, Christopher Seifert, Guillermo Payá-Vayá, Holger Blume, Pekka Jääskeläinen, Joonas Multanen, Heikki Kultala, Jarmo Takala, Joachim Thiemann, Steven van de Par
2016	—	`conf`	Foveated Path Tracing - A Literature Review and a Performance Gain Analysis. ISVC (1) Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2016	—	`conf`	Half-precision Floating-point Ray Traversal. VISIGRAPP (1: GRAPP) Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2016	J	`jnl`	Improving Code Density with Variable Length Encoding Aware Instruction Scheduling. J. Signal Process. Syst. Heikki Kultala, Timo Viitanen, Pekka Jääskeläinen, Janne Helkala, Jarmo Takala
2016	J	`jnl`	Integer Linear Programming-Based Scheduling for Transport Triggered Architectures. ACM Trans. Archit. Code Optim. Tomi Äijö, Pekka Jääskeläinen, Tapio Elomaa, Heikki Kultala, Jarmo Takala
2016	—	`conf`	Multi bounding volume hierarchies for ray tracing pipelines. SIGGRAPH Asia Technical Briefs Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Jarmo Takala
2016	—	`conf`	OpenCL programmable exposed datapath high performance low-power image signal processor. NORCAS Joonas Multanen, Heikki Kultala, Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala, Aram Danielyan, Cristóvão Cruz
2016	—	`conf`	Software defined radio implementation of adaptive nonlinear digital self-interference cancellation for mobile inband full-duplex radio. GlobalSIP Mona Aghababaeetafreshi, Matias Koskela, Dani Korpi, Pekka Jääskeläinen, Mikko Valkama, Jarmo Takala
2016	—	`conf`	Xor-Masking: A Novel Statistical Method for Instruction Read Energy Reduction in Contemporary SRAM Technologies. SiPS Joonas Multanen, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2016	J	`jnl`	pocl: A Performance-Portable OpenCL Implementation. CoRR Pekka Jääskeläinen, Carlos Sánchez de La Lama, Erik Schnetter, Kalle Raiskila, Jarmo Takala, Heikki Berg
2015	J	`jnl`	Code Density and Energy Efficiency of Exposed Datapath Architectures. J. Signal Process. Syst. Pekka Jääskeläinen, Heikki Kultala, Timo Viitanen, Jarmo Takala
2015	J	`jnl`	Data Intensive Computing: From Modeling to Implementation. J. Signal Process. Syst. Pekka Jääskeläinen, Jani Boutellier
2015	J	`jnl`	Embedded Multi-Core Systems Dedicated to Dynamic Dataflow Programs. J. Signal Process. Syst. Hervé Yviquel, Alexandre Sanchez, Pekka Jääskeläinen, Jarmo Takala, Mickaël Raulet, Emmanuel Casseau
2015	—	`conf`	MergeTree: a HLBVH constructor for mobile systems. SIGGRAPH Asia Technical Briefs Timo Viitanen, Matias Koskela, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
2015	Misc	`conf`	Parallel processing intensive digital front-end for IEEE 802.11ac receiver. ACSSC Mona Aghababaee Tafreshi, Juha Yli-Kaakinen, Toni Levanen, Ville Korhonen, Pekka Jääskeläinen, Markku Renfors, Mikko Valkama, Jarmo Takala
2015	—	`conf`	Power optimizations for transport triggered SIMD processors. SAMOS Joonas Multanen, Timo Viitanen, Henry Linjamaki, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Lauri Koskinen, Jesse Simonsson, Heikki Berg, Kalle Raiskila, Tommi Zetterman
2015	—	`conf`	Rapid customization of image processors using Halide. GlobalSIP Ville Korhonen, Pekka Jääskeläinen, Matias Koskela, Timo Viitanen, Jarmo Takala
2015	J	`jnl`	pocl: A Performance-Portable OpenCL Implementation. Int. J. Parallel Program. Pekka Jääskeläinen, Carlos Sánchez de La Lama, Erik Schnetter, Kalle Raiskila, Jarmo Takala, Heikki Berg
2014	Misc	`conf`	A high throughput LDPC decoder using a mid-range GPU. ICASSP Xie Wen, Xianjun Jiao, Pekka Jääskeläinen, Heikki Kultala, Canfeng Chen, Heikki Berg, Zhisong Bie
2014	—	`conf`	Compiler optimizations for code density of variable length instructions. SiPS Heikki Kultala, Timo Viitanen, Pekka Jääskeläinen, Janne Helkala, Jarmo Takala
2014	Misc	`conf`	Efficient software synthesis of dynamic dataflow programs. ICASSP Hervé Yviquel, Alexandre Sanchez, Pekka Jääskeläinen, Jarmo Takala, Mickaël Raulet, Emmanuel Casseau
2014	B	`conf`	Grover: Looking for Performance Improvement by Disabling Local Memory Usage in OpenCL Kernels. ICPP Jianbin Fang, Henk J. Sips, Pekka Jääskeläinen, Ana Lucia Varbanescu
2014	Misc	`conf`	Heuristics for greedy transport triggered architecture interconnect exploration. CASES Timo Viitanen, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala
2014	Misc	`conf`	Parallel programming of a symmetric transport-triggered architecture with applications in flexible LDPC encoding. ICASSP Blaine Rister, Pekka Jääskeläinen, Olli Silvén, Jari Hannuksela, Joseph R. Cavallaro
2014	—	`conf`	Programmable in-loop deblock filter processor for video decoders. SiPS Janne Janhunen, Pekka Jääskeläinen, Jari Hannuksela, Tero Rintaluoma, Aki Kuusela
2014	—	`conf`	Variable length instruction compression on Transport Triggered Architectures. ICSAMOS Janne Helkala, Timo Viitanen, Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala, Tommi Zetterman, Heikki Berg
2013	B	`conf`	A 122Mb/s Turbo decoder using a mid-range GPU. IWCMC Xianjun Jiao, Canfeng Chen, Pekka Jääskeläinen, Vladimír Guzma, Heikki Berg
2013	—	`conf`	Inexpensive correctly rounded floating-point division and square root with input scaling. SiPS Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala
2013	—	`conf`	Low-power application-specific FFT processor for LTE applications. ICSAMOS Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala
2013	Misc	`conf`	Simplified floating-point division and square root. ICASSP Timo Viitanen, Pekka Jääskeläinen, Otto Esko, Jarmo Takala
2013	—	`conf`	Special session on "Exposed data path architectures: Recent advances and applications". ICSAMOS Jani Boutellier, Pekka Jääskeläinen
2013	C	`conf`	Towards run-time actor mapping of dynamic dataflow programs onto multi-core platforms. ISPA Hervé Yviquel, Emmanuel Casseau, Mickaël Raulet, Pekka Jääskeläinen, Jarmo Takala
2013	B	`conf`	Turbo decoding on tailored OpenCL processor. IWCMC Heikki Kultala, Otto Esko, Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala, Xianjun Jiao, Tommi Zetterman, Heikki Berg
2012	—	`—`	From Parallel Programs to Customized Parallel Processors. Pekka Jääskeläinen
2011	—	`conf`	Customizable Datapath Integrated Lock Unit. SoC Pekka Jääskeläinen, Erno Salminen, Otto Esko, Jarmo Takala
2011	J	`jnl`	Design Methodology for Offloading Software Executions to FPGA. J. Signal Process. Syst. Tomasz Patyk, Perttu Salmela, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala
2011	—	`conf`	Operation set customization in retargetable compilers. ACSCC Heikki Kultala, Pekka Jääskeläinen, Jarmo Takala
2011	—	`conf`	TCEMC: A co-design flow for application-specific multicores. ICSAMOS Pekka Jääskeläinen, Erno Salminen, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez
2010	B	`conf`	Customized Exposed Datapath Soft-Core Design Flow with Compiler Support. FPL Otto Esko, Pekka Jääskeläinen, Pablo Huerta, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez
2010	—	`conf`	OpenCL-based design methodology for application-specific processors. ICSAMOS Pekka Jääskeläinen, Carlos S. de La Lama, Pablo Huerta, Jarmo Takala
2009	—	`conf`	Programmable Accelerators for Reconfigurable Video Decoder. SAMOS Tero Rintaluoma, Timo Reinikka, Joona Rouvinen, Jani Boutellier, Pekka Jääskeläinen, Olli Silvén
2009	—	`conf`	Programmable and Scalable Architecture for Graphics Processing Units. SAMOS Carlos S. de La Lama, Pekka Jääskeläinen, Jarmo Takala
2009	—	`conf`	Reconfigurable video decoder with transform acceleration. SiPS Lassi Nurmi, Perttu Salmela, Pertti Kellomäki, Pekka Jääskeläinen, Jarmo Takala
2008	—	`conf`	Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic. SAMOS Vladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala
2008	—	`conf`	Reducing Context Switch Overhead with Compiler-Assisted Threading. EUC (2) Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala, Heikki Kultala, Mikael Lepistö
2008	J	`jnl`	Resource conflict detection in simulation of function unit pipelines. J. Syst. Archit. Pekka Jääskeläinen, Vladimír Guzma, Viljami Korhonen
2007	—	`conf`	Resource Conflict Detection in Simulation of Function Unit Pipelines. SAMOS Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala
2007	—	`conf`	Run-Time Scheduled Hardware Acceleration of MPEG-4 Video Decoding. SoC Jani Boutellier, Pekka Jääskeläinen, Olli Silvén
2006	—	`conf`	Loop Scheduling for Transport Triggered Architecture Processors. SoC Perttu Salmela, Risto Mäkinen, Pekka Jääskeläinen, Jarmo Takala
2006	—	`conf`	Software Pipelining Support for Transport Triggered Architecture Processors. SAMOS Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala