Peiyuan Wan

37 papers C 1Journal 17Unranked 19
YearRankTypeTitle / Venue / Authors
2026 J jnl
A high-linearity wide-input-range current-source-based VTC using bottom-plate charge-reset technique.
Microelectron. J.
Bingjie Li, Peiyuan Wan, Chengyu Liu, Zhijie Chen, Xu Liu, Sujuan Liu, Yongzhe Zhang
2026 J jnl
FPGA Implementation of Sparsity Adaptive Atomic Correlation Difference Pursuit Algorithm for Compressed Sensing.
IEEE Trans. Very Large Scale Integr. Syst.
Sujuan Liu, Zixing Zhang, Yichen Liang, Peiyuan Wan
2025 J jnl
A 45-nW 10-b 20-kS/s SAR ADC Based on Single-Capacitor Switching Scheme in 180-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Bingjie Li, Peiyuan Wan, Zihang Zhang, Qinghua Wang, Xu Liu, Zhijie Chen, Dezhen Yang, Ming Liu, Sujuan Liu, Yongzhe Zhang
2025 J jnl
A Novel Energy Efficient Single-Capacitor Switching Scheme for SAR ADCs.
IEEE Signal Process. Lett.
Bingjie Li, Peiyuan Wan, Xu Liu, Zhijie Chen, Sujuan Liu
2025 J jnl
A PN-complementary current-enhancement structure LDO with fast transient response and frequency compensation capability.
Microelectron. J.
Sujuan Liu, Aoran Ge, Xudong Sun, Junchao Zhao, Kun Liu, Peiyuan Wan
2025 J jnl
FPGA Implementation of Staged Projection Refining Multiple Orthogonal Matching Pursuit Algorithm for Compressed Sensing.
IEEE Trans. Very Large Scale Integr. Syst.
Sujuan Liu, Yichen Liang, Zixing Zhang, Peiyuan Wan
2025 J jnl
PttAcc: Pipeline-Based Taylor Expansion Fitting Arctangent Angle Hardware Accelerator Design for Descriptor Duty in ORB-SLAM System.
IEEE Embed. Syst. Lett.
Meng Liu, Fei Xiao, Ruijie Wang, Peiyuan Wan, Zhijie Chen, Dejian Li, Chongfei Shen
2024 — conf
A 4x16 Arrayed Current Sensing Front-End Chip for DNA Sequencing.
ICTA
Xu Liu, Yuzhou Huang, Qiumeng Fan, Yunao Chen, Zhijie Chen, Peiyuan Wan
2024 C conf
A Capacitor-Less LDO Regulator Compensated by Adaptive Zero for Zero-Load Stability Enhancement.
ISCAS
Shengping Lv, Zhijie Chen, Peng Zhang, Peiyuan Wan, Liuxin Lv, Hanjun Jiang
2024 J jnl
A fast-response RBCOT buck converter with second-order differential and integrator compensation based on FVF.
Microelectron. J.
Sujuan Liu, Kun Liu, Zifeng Xing, Aoran Ge, Peiyuan Wan
2023 J jnl
A 1.9-ps 8× phase interpolation TDC for time-based analog-to-digital converter with capacitance compensation self-calibration.
IEICE Electron. Express
Zhijie Chen, Xiaoyu Zhang, Yongkuo Ma, Xitong Liang, Xinyu Du, Peiyuan Wan
2023 J jnl
A 4-Channel Neural Stimulation IC Design With Charge Balancing and Multiple Current Output Modes.
IEEE Trans. Biomed. Circuits Syst.
Juzhe Li, Weijian Chen, Xu Liu, Peiyuan Wan, Zhijie Chen
2023 — conf
A Bio-Impedance Measurement Chip Design with AC Current Outputs.
ICTA
Xu Liu, Yukun Jiao, Zeyu Lu, Weijian Chen, Peiyuan Wan, Zhijie Chen
2023 — conf
A Fast Bioimpedance Measurement Chip Design Using Dynamic Current.
ICTA
Xu Liu, Yukun Jiao, Zeyu Lu, Weijian Chen, Peiyuan Wan, Zhijie Chen
2023 J jnl
A Low Noise Neural Recording Frontend IC With Power Management for Closed-Loop Brain-Machine Interface Application.
IEEE Trans. Biomed. Circuits Syst.
Weijian Chen, Weisong Liang, Xu Liu, Zeyu Lu, Peiyuan Wan, Zhijie Chen
2023 J jnl
Design of analog front-end integrated circuit of tactile sensor for human-machine interface.
Integr.
Zheng Wang, Xu Liu, Yunao Chen, Qiumeng Fan, Zhijie Chen, Peiyuan Wan
2022 — conf
A 4-Channel Neural Stimulation IC Design with Charge Balancing and Exponential Current Output.
APCCAS
Juzhe Li, Xu Liu, Peiyuan Wan, Zhijie Chen
2022 J jnl
A 8-bit, 1-GHz coarse-fine time-based ADC with split-CDAC residue transfer.
IEICE Electron. Express
Peiyuan Wan, Yucheng Bao, Boyong Jin, Zhijie Chen
2022 — conf
A Low-Noise Neural Signal Amplifier Achieving 1.6 NEF and 2.56 PEF for Brain-Machine Interface.
APCCAS
Weijian Chen, Xu Liu, Weisong Liang, Zeyu Lu, Peiyuan Wan, Zhijie Chen
2022 — conf
A Neural Recording IC Design with on-chip CMOS Electrode Array for Brain-machine Interface.
APCCAS
Ronghao Zhang, Xu Liu, Zhijie Chen, Peiyuan Wan, Tao Chen
2022 — conf
A Wireless Power Design with High PCE and Fast Transient Response over a Large Loading Range for Multi-channel Neural Stimulators.
APCCAS
Weisong Liang, Xu Liu, Weijian Chen, Zeyu Lu, Peiyuan Wan, Zhijie Chen
2022 J jnl
Energy-efficient Fe-based FET logic in LUT circuit with transistor reduction technique.
IEICE Electron. Express
Zhijie Chen, Yu Zhang, Zhiyuan Gao, Peiyuan Wan
2021 — conf
A 1.65 mW 2.8 GHz Dual-Loops Class-C VCO Achieving 189 dBc/Hz FoM.
ICTA
Qianshui Yu, Chuankai Wang, Zijing Yuan, Xu Liu, Peiyuan Wan, Zhijie Chen
2021 — conf
A 4.39ps, 1.5GS/s Time-to-Digital Converter with 4× Phase Interpolation Technique and a 2-D Quantization Array.
A-SSCC
Yongkuo Ma, Peiyuan Wan, Hongda Zhang, Zhi Wan, Xiaoyu Zhang, Xu Liu, Zhijie Chen
2021 — conf
A 4x folding voltage-to-time converter with adjustable conversion gain and offset for time-based ADC.
ASICON
Yucheng Bao, Zhijie Chen, Boyong Jin, Peiyuan Wan
2021 — conf
Design of an Exponential Current Generator for Neural Stimulation.
ICTA
Juzhe Li, Xu Liu, Peiyuan Wan, Zhijie Chen
2019 J jnl
Non-Ideal Issues Analysis in a Fully Passive Noise Shaping SAR ADC.
IEICE Trans. Electron.
Zhijie Chen, Peiyuan Wan, Ning Li
2015 — conf
A digitally calibrated low-power ring oscillator.
ASICON
Ming Li, Haibin Yin, Peiyuan Wan
2015 — conf
DCPG: Double-control power gating technique for a 28 nm Cortex™-A9 MPCore Quad-core processor.
ASICON
Qian Liang, Jinhui Wang, Peiyuan Wan, Ligang Hou, Na Gong
2015 — conf
Design and testing of CMOS compatible EEPROM.
ASICON
Haibin Yin, Xiaohong Peng, Peiyuan Wan, Jinhui Wang, Ligang Hou
2013 J jnl
A 0.8 V 48 μW 82 dB SNDR 10-kHz BANDWIDTH ΣΔ MODULATOR IN 0.13-μM CMOS.
J. Circuits Syst. Comput.
Wei Lang, Peiyuan Wan, Pingfen Lin
2011 — conf
A 1.2-V 250-MS/s 8-bit pipelined ADC in 0.13-µm CMOS.
ASICON
Peiyuan Wan, Wei Lang, Di Fang, Wei Cui, Pingfen Lin
2011 — conf
A 48-mW, 12-bit, 150-MS/s pipelined ADC with digital calibration in 65nm CMOS.
CICC
Bei Peng, Guanzhong Huang, Hao Li, Peiyuan Wan, Pingfen Lin
2011 J jnl
SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration.
IEEE J. Solid State Circuits
Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu
2010 — conf
A 5.8-mW, 20-MHz, 4th-order programmable elliptic filter achieving over -80-dB IM3.
CICC
Peiyuan Wan, Yun Chiu, Pingfen Lin
2010 — conf
A High Linearity 6
APCCAS
Di Zhu, Jiacheng Wang, Chaoli Zhong, Jie Tian, Yiming Tang, Peiyuan Wan, Ping Lin
2010 — conf
SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration.
CICC
Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu