Pedro J. Gil - RankMe

61 papers A 4B 9C 6Misc 10Journal 9Unranked 23

Year	Rank	Type	Title / Venue / Authors
2018	—	`conf`	Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes. LADC Joaquin Gracia-Moran, Luis J. Saiz-Adalid, Juan-Carlos Baraza-Calvo, Pedro J. Gil
2016	—	`conf`	Speeding-Up Simulation-Based Fault Injection of Complex HDL Models. LADC Ilya Tuzov, Juan Carlos Ruiz, David de Andrés, Pedro J. Gil
2016	Misc	`conf`	Ultrafast Error Correction Codes for Double Error Detection/Correction. EDCC Luis J. Saiz-Adalid, Pedro J. Gil, Juan Carlos Ruiz, Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan-Carlos Baraza-Calvo
2015	Misc	`conf`	Increasing the Dependability of VLSI Systems through Early Detection of Fugacious Faults. EDCC Jaime Espinosa, David de Andrés, Pedro J. Gil
2015	J	`jnl`	MCU Tolerance in SRAMs Through Low-Redundancy Triple Adjacent Error Correction. IEEE Trans. Very Large Scale Integr. Syst. Luis J. Saiz-Adalid, Pedro Reviriego, Pedro J. Gil, Salvatore Pontarelli, Juan Antonio Maestro
2015	Misc	`conf`	Ultrafast Single Error Correction Codes for Protecting Processor Registers. EDCC Luis J. Saiz-Adalid, Pedro J. Gil, Joaquin Gracia-Moran, Daniel Gil-Tomas, Juan-Carlos Baraza-Calvo
2014	Misc	`conf`	Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper). EDCC Luis J. Saiz-Adalid, Pedro J. Gil, Juan-Carlos Baraza-Calvo, Juan-Carlos Ruiz-Garcia, Daniel Gil-Tomas, Joaquin Gracia-Moran
2013	—	`conf`	Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach. EWDC Joaquin Gracia-Moran, Juan-Carlos Ruiz-Garcia, Juan-Carlos Baraza-Calvo, David de Andrés, Pedro J. Gil
2013	—	`conf`	The Challenge of Detection and Diagnosis of Fugacious Hardware Faults in VLSI Designs. EWDC Jaime Espinosa, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2013	—	`conf`	Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines. EWDC Luis J. Saiz-Adalid, Pedro J. Gil, Joaquin Gracia-Moran, Juan-Carlos Baraza-Calvo
2012	B	`conf`	Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments. FPL Jaime Espinosa, David de Andrés, Juan Carlos Ruiz, Pedro J. Gil
2011	—	`conf`	Coarse-grained resilience benchmarking using logic score of preferences: ad hoc networks as a case study. EWDC Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	—	`conf`	On Selecting Representative Faultloads to Guide the Evaluation of Ad Hoc Networks. LADC Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	B	`conf`	Resilience-Driven Parameterisation of Ad Hoc Routing Protocols: olsrd as a Case Study. SRDS Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	J	`jnl`	Towards benchmarking routing protocols in wireless mesh networks. Ad Hoc Networks Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2011	B	`conf`	Using Performance, Energy Consumption, and Resilience Experimental Measures to Evaluate Routing Protocols for Ad Hoc Networks. NCA Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2010	B	`conf`	Attack Injection to Support the Evaluation of Ad Hoc Networks. SRDS Jesus Friginal, David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2009	C	`conf`	An Attack Injection Approach to Evaluate the Robustness of Ad Hoc Networks. PRDC David de Andrés, Jesus Friginal, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2009	J	`jnl`	Dependability assessment of by-wire control systems using fault injection. J. Syst. Archit. Sara Blanc, Alberto Bonastre, Pedro J. Gil
2009	C	`conf`	Design and Deployment of a Generic ECC-based Fault Tolerance Mechanism for Embedded HW Cores. ETFA Juan-Carlos Ruiz-Garcia, David de Andrés, Pedro J. Gil
2009	—	`conf`	Using Dependability, Performance, Area and Energy Consumption Experimental Measures to Benchmark IP Cores. LADC David de Andrés, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2008	C	`conf`	Analysis of the influence of intermittent faults in a microcontroller. DDECS Joaquin Gracia, Luis J. Saiz, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
2008	Misc	`conf`	Dependability Assessment for the Selection of Embedded Cores. EDCC David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2008	J	`jnl`	Enhancement of Fault Injection Techniques Based on the Modification of VHDL Code. IEEE Trans. Very Large Scale Integr. Syst. Juan Carlos Baraza, Joaquin Gracia, Sara Blanc, Daniel Gil, Pedro J. Gil
2008	J	`jnl`	Fault Emulation for Dependability Evaluation of VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2008	C	`conf`	Generic Design and Automatic Deployment of NMR Strategies on HW Cores. PRDC Juan-Carlos Ruiz-Garcia, David de Andrés, Sara Blanc, Pedro J. Gil
2008	—	`conf`	Injecting intermittent faults for the dependability validation of commercial microcontrollers. HLDVT Daniel Gil, Luis J. Saiz, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
2006	—	`conf`	FADES: a fault emulation tool for fast dependability assessment. FPT David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2006	B	`conf`	Fast Emulation of Permanent Faults in VLSI Systems. FPL David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2006	A	`conf`	Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems. DSN David de Andrés, Juan-Carlos Ruiz-Garcia, Daniel Gil, Pedro J. Gil
2006	Misc	`conf`	Temporal Characterization of Embedded Systems Using Nexus. EDCC Juan Pardo, José Carlos Campelo, Juan-Carlos Ruiz-Garcia, Pedro J. Gil
2005	Misc	`conf`	Fast Run-Time Reconfiguration for SEU Injection. EDCC David de Andrés, José Albaladejo, Lenin Lemus, Pedro J. Gil
2005	Misc	`conf`	Impact of Faults in Combinational Logic of Commercial Microcontrollers. EDCC Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
2005	—	`conf`	Improvement of fault injection techniques based on VHDL code modification. HLDVT Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil
2005	C	`conf`	On-chip Debugging-based Fault Emulation for Robustness Evaluation of Embedded Software Components. PRDC Juan-Carlos Ruiz-Garcia, José Carlos Campelo, Pedro J. Gil, Juan Pardo
2004	—	`conf`	Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques. HLDVT Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
2004	A	`conf`	Experiences during the Experimental Validation of the Time-Triggered Architecture. DATE Sara Blanc, Joaquin Gracia, Pedro J. Gil
2004	A	`conf`	On Benchmarking the Dependability of Automotive Engine Control Applications. DSN Juan-Carlos Ruiz-Garcia, Pedro Yuste, Pedro J. Gil, Lenin Lemus
2003	A	`conf`	INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems. DSN Pedro Yuste, David de Andrés, Lenin Lemus, Juan José Serrano, Pedro J. Gil
2003	B	`conf`	Improving the Multiple Errors Detection Coverage in Distributed Embedded Systems. SRDS Sara Blanc, Pedro J. Gil
2003	—	`conf`	Non-intrusive Software-Implemented Fault Injection in Embedded Systems. LADC Pedro Yuste, Juan-Carlos Ruiz-Garcia, Lenin Lemus, Pedro J. Gil
2003	J	`jnl`	Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system. Microelectron. J. Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
2002	—	`conf`	A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques. DFT Sara Blanc, Joaquin Gracia, Pedro J. Gil
2002	J	`jnl`	A prototype of a VHDL-based fault injection tool: description and application. J. Syst. Archit. Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil
2002	C	`conf`	Using VHDL-Based Fault Injection to exercise Error Detection Mechanisms in the Time-Triggered Architecture. PRDC Joaquin Gracia, Daniel Gil, Juan Carlos Baraza, Pedro J. Gil
2001	—	`conf`	A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques. IOLTW Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
2001	—	`conf`	Comparison and Application of Different VHDL-Based Fault Injection Techniques. DFT Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil
2000	—	`conf`	A Prototype of a VHDL-Based Fault Injection Tool. DFT Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil
2000	—	`conf`	A Study of the Effects of Transient Fault Injection into the VHDL Model of a Fault-Tolerant Microcomputer System. IOLTW Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil
2000	—	`conf`	An alternative to unify performance and reliability analysis of industrial applications. ESM Lenin Lemus, David de Andrés, Pedro J. Gil
2000	J	`jnl`	Techniques to increase the schedulable utilization of cache-based preemptive real-time systems. J. Syst. Archit. José V. Busquets-Mataix, Daniel Gil, Pedro J. Gil, Andy J. Wellings
1999	—	`conf`	Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems. IPPS/SPDP Workshops José Carlos Campelo, Pedro Yuste, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano
1999	B	`conf`	Design and Validation of a Distributed Industrial Control System's Nodes. SRDS José Carlos Campelo, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano
1999	J	`jnl`	Distributed industrial control systems: a fault-tolerant architecture. Microprocess. Microsystems José Carlos Campelo, Francisco Rodríguez, Alicia Rubio, Rafael Ors, Pedro J. Gil, Lenin Lemus, J. V. Busquets, José Albaladejo, Juan José Serrano
1999	Misc	`conf`	Fault Injection into VHDL Models: Experimental Validation of a Fault Tolerant Microcomputer System. EDCC Daniel Gil, R. Martínez, J. V. Busquets, Juan Carlos Baraza, Pedro J. Gil
1999	B	`conf`	Hierarchical Reliability and Safety Models of Fault Tolerant Distributed Industrial Control Systems. SAFECOMP José Carlos Campelo, Pedro Yuste, Francisco Rodríguez, Pedro J. Gil, Juan José Serrano
1998	—	`conf`	Fault Injection into VHDL Models: Analysis of the Error Syndrome of a Microcomputer System. EUROMICRO Daniel Gil, Juan Carlos Baraza, J. V. Busquets, Pedro J. Gil
1996	—	`conf`	Adding Instruction Cache Effect to an Exact Schedulability Analysis of Preemptive Real-Time Systems. RTS José V. Busquets-Mataix, Juan José Serrano, Rafael Ors Carot, Pedro J. Gil, Andrew J. Wellings
1996	—	`conf`	Adding instruction cache effect to schedulability analysis of preemptive real-time systems. IEEE Real Time Technology and Applications Symposium José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings
1996	Misc	`conf`	Dependability Models of RAID Using Stochastic Activity Networks. EDCC Vicente Santonja, Marina Alonso, Xavier Molero, Juan José Serrano, Pedro J. Gil, Rafael Ors
1996	B	`conf`	Using harmonic task-sets to increase the schedulable utilization of cache-based preemptive real-time systems. RTCSA José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings