Paulo F. Flores

72 papers A* 2A 5B 2C 12Misc 2Journal 25Unranked 24

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	On the Efficacy and Vulnerabilities of Logic Locking in Tree-Based Machine Learning. IEEE Trans. Circuits Syst. I Regul. Pap. Brunno Alves de Abreu, Guilherme Paim, Lilas Alrahis, Paulo F. Flores, Ozgur Sinanoglu, Sergio Bampi, Hussam Amrouch
2025	J	`jnl`	ReAdapt-II: Energy-Quality Optimizations for VLSI Adaptive Filters Through Automatic Reconfiguration and Built-In Iterative Dividers. IEEE Trans. Very Large Scale Integr. Syst. Pedro T. L. Pereira, Patrícia Ücker Leleu da Costa, Eduardo A. C. da Costa, Paulo F. Flores, Sergio Bampi
2024	J	`jnl`	MAxPy: A Framework for Bridging Approximate Computing Circuits to Its Applications. IEEE Trans. Circuits Syst. II Express Briefs Yuri Arbeletche, Guilherme Paim, Brunno Abreu, Sérgio Almeida, Eduardo Costa, Paulo F. Flores, Sergio Bampi
2023	—	`conf`	Architectural Exploration for Energy-Efficient LMS and NLMS Adaptive Filters VLSI Design. NEWCAS Pedro T. L. Pereira, Guilherme Paim, Eduardo A. C. da Costa, Paulo F. Flores, Sergio Bampi
2023	—	`conf`	AxASRE: A Novel Approach to Approximate Adder Synthesis Results Estimation. DSN-W Pedro T. L. Pereira, Guilherme Paim, Paulo F. Flores, Eduardo A. C. da Costa, Sergio Bampi
2023	J	`jnl`	Compact CMOS-Compatible Majority Gate Using Body Biasing in FDSOI Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. Brunno Alves de Abreu, Albi Mema, Simon Thomann, Guilherme Paim, Paulo F. Flores, Sergio Bampi, Hussam Amrouch
2023	B	`conf`	EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. ETS Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023	J	`jnl`	NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. CoRR Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2020	J	`jnl`	Radix-2 IET Circuits Devices Syst. Ahmed Liacha, Abdelkrim Kamel Oudjida, Mohammed Bakiri, José Monteiro, Paulo F. Flores
2017	—	`conf`	A variable RADIX-2 NEWCAS Ahmed Liacha, Abdelkrim Kamel Oudjida, Farid Ferguene, José Monteiro, Paulo F. Flores
2016	J	`jnl`	A novel method for the approximation of multiplierless constant matrix vector multiplication. EURASIP J. Embed. Syst. Levent Aksoy, Paulo F. Flores, José Monteiro
2015	C	`conf`	A Novel Method for the Approximation of Multiplierless Constant Matrix Vector Multiplication. EUC Levent Aksoy, Paulo F. Flores, José Monteiro
2015	C	`conf`	Approximation of multiple constant multiplications using minimum look-up tables on FPGA. ISCAS Levent Aksoy, Paulo F. Flores, José Monteiro
2015	J	`jnl`	Exact and Approximate Algorithms for the Filter Design Optimization Problem. IEEE Trans. Signal Process. Levent Aksoy, Paulo F. Flores, José Monteiro
2015	J	`jnl`	Multicore SIMD ASIP for Next-Generation Sequencing and Alignment Biochip Platforms. IEEE Trans. Very Large Scale Integr. Syst. Nuno Neves, Nuno Sebastião, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma
2015	J	`jnl`	Quaternary Logic Lookup Table in Standard CMOS. IEEE Trans. Very Large Scale Integr. Syst. Diogo Brito, Taimur Gibran Rabuske, Jorge R. Fernandes, Paulo F. Flores, José Monteiro
2014	J	`jnl`	A Tutorial on Multiplierless Design of FIR Filters: Algorithms and Architectures. Circuits Syst. Signal Process. Levent Aksoy, Paulo F. Flores, José Monteiro
2014	C	`conf`	ECHO: A novel method for the multiplierless design of constant array vector multiplication. ISCAS Levent Aksoy, Paulo F. Flores, José Monteiro
2014	C	`conf`	Efficient design of FIR filters using hybrid multiple constant multiplications on FPGA. ICCD Levent Aksoy, Paulo F. Flores, José Monteiro
2014	J	`jnl`	Multiplierless Design of Folded DSP Blocks. ACM Trans. Design Autom. Electr. Syst. Levent Aksoy, Paulo F. Flores, José Monteiro
2014	A	`conf`	Optimization of design complexity in time-multiplexed constant multiplications. DATE Levent Aksoy, Paulo F. Flores, José Monteiro
2014	—	`conf`	Optimized ASIP architecture for compressed BWT-indexed search in bioinformatics applications. HPCS Nuno Sebastião, Paulo F. Flores, Nuno Roma
2013	—	`conf`	BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment. ASAP Nuno Neves, Nuno Sebastião, Andre Patricio, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma
2013	J	`jnl`	Configurable and scalable class of high performance hardware accelerators for simultaneous DNA sequence alignment. Concurr. Comput. Pract. Exp. Nuno Sebastião, Nuno Roma, Paulo F. Flores
2013	J	`jnl`	Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool. IEEE Trans. Very Large Scale Integr. Syst. Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2013	—	`conf`	Exploration of tradeoffs in the design of integer cosine transforms for image compression. ECCTD Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2013	Misc	`conf`	Improving SAT Solver Efficiency Using a Multi-Core Approach. FLAIRS Ricardo Marques, Luis G. Silva, Paulo F. Flores, L. Miguel Silveira
2013	—	`conf`	SIREN: a depth-first search algorithm for the filter design optimization problem. ACM Great Lakes Symposium on VLSI Levent Aksoy, Paulo F. Flores, José Monteiro
2013	—	`conf`	Standard CMOS voltage-mode QLUT using a clock boosting technique. NEWCAS Diogo Brito, Jorge R. Fernandes, Paulo F. Flores, José Monteiro
2013	C	`conf`	Towards the least complex time-multiplexed constant multiplication. VLSI-SoC Levent Aksoy, Paulo F. Flores, José Monteiro
2012	—	`conf`	Design and characterization of a QLUT in a standard CMOS process. ICECS Diogo Brito, Jorge R. Fernandes, Paulo F. Flores, José Monteiro
2012	A	`conf`	Design of low-complexity digital finite impulse response filters on FPGAs. DATE Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2012	J	`jnl`	Hardware accelerator architecture for simultaneous short-read DNA sequences alignment with enhanced traceback phase. Microprocess. Microsystems Nuno Sebastião, Nuno Roma, Paulo F. Flores
2012	J	`jnl`	High-level algorithms for the optimization of gate-level area in digit-serial multiple constant multiplications. Integr. Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2012	J	`jnl`	Integrated Hardware Architecture for Efficient Computation of the $n$-Best Bio-Sequence Local Alignments in Embedded Platforms. IEEE Trans. Very Large Scale Integr. Syst. Nuno Sebastião, Nuno Roma, Paulo F. Flores
2012	A	`conf`	Multiple tunable constant multiplications: Algorithms and applications. ICCAD Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2012	J	`jnl`	Optimization Algorithms for the Multiplierless Realization of Linear Transforms. ACM Trans. Design Autom. Electr. Syst. Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011	C	`conf`	A hybrid algorithm for the optimization of area and delay in linear DSP transforms. VLSI-SoC Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011	—	`conf`	Design of low-power multiple constant multiplications using low-complexity minimum depth operations. ACM Great Lakes Symposium on VLSI Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011	—	`conf`	Efficient shift-adds design of digit-serial multiple constant multiplications. ACM Great Lakes Symposium on VLSI Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2011	J	`jnl`	Finding the optimal tradeoff between area and delay in multiple constant multiplications. Microprocess. Microsystems Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011	J	`jnl`	Low Power Multiple-Value Voltage-Mode Look-Up Table for Quaternary Field Programmable Gate Arrays. J. Low Power Electron. Cristiano Lazzari, Jorge R. Fernandes, Paulo F. Flores, José Monteiro
2011	—	`conf`	Multiplierless Design of Linear DSP Transforms. VLSI-SoC (Selected Papers) Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2011	C	`conf`	Optimization of area in digit-serial Multiple Constant Multiplications at gate-level. ISCAS Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro
2011	—	`conf`	Optimization of gate-level area in high throughput Multiple Constant Multiplications. ECCTD Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2010	A	`conf`	A new quaternary FPGA based on a voltage-mode multi-valued circuit. DATE Cristiano Lazzari, Paulo F. Flores, José Monteiro, Luigi Carro
2010	—	`conf`	An Efficient Low Power Multiple-Value Look-Up Table Targeting Quaternary FPGAs. PATMOS Cristiano Lazzari, Jorge R. Fernandes, Paulo F. Flores, José Monteiro
2010	C	`conf`	Design of low-complexity and high-speed digital Finite Impulse Response filters. VLSI-SoC Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paulo F. Flores, José Monteiro
2010	—	`conf`	Integrated accelerator architecture for DNA sequences alignment with enhanced traceback phase. HPCS Nuno Sebastião, Tiago Dias, Nuno Roma, Paulo F. Flores
2010	C	`conf`	Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications. DSD Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2010	J	`jnl`	Search algorithms for the multiple constant multiplications problem: Exact and approximate. Microprocess. Microsystems Levent Aksoy, Ece Olcay Günes, Paulo F. Flores
2010	C	`conf`	Voltage-mode quaternary FPGAs: An evaluation of interconnections. ISCAS Cristiano Lazzari, Paulo F. Flores, José Monteiro, Luigi Carro
2009	J	`jnl`	Generating realistic stimuli for accurate power grid analysis. ACM Trans. Design Autom. Electr. Syst. Pedro Marques Morgado, Paulo F. Flores, L. Miguel Silveira
2009	J	`jnl`	PMSat: a parallel version of MiniSAT. J. Satisf. Boolean Model. Comput. Luís Gil, Paulo F. Flores, Luís Miguel Silveira
2008	C	`conf`	Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units. DSD Nuno Sebastião, Tiago Dias, Nuno Roma, Paulo F. Flores, Leonel Sousa
2008	J	`jnl`	Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2008	—	`conf`	Generating Worst-Case Stimuli for Accurate Power Grid Analysis. PATMOS Pedro Marques Morgado, Paulo F. Flores, José C. Monteiro, Luís Miguel Silveira
2007	—	`conf`	Effect of Number Representation on the Achievable Minimum Number of Operations in Multiple Constant Multiplications. SiPS Levent Aksoy, Ece Olcay Günes, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2007	—	`conf`	Generating Realistic Stimuli for Accurate Power Grid Analysis. ISVLSI Pedro Marques Morgado, Paulo F. Flores, L. Miguel Silveira
2007	—	`conf`	Minimum number of operations under a general number representation for digital filter synthesis. ECCTD Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2007	A*	`conf`	Optimization of Area in Digital FIR Filters using Gate-Level Metrics. DAC Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2006	—	`conf`	ASSUMEs: Heuristic Algorithms for Optimization of Area and Delay in Digital Filter Synthesis. ICECS Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2006	—	`conf`	Exploiting general coefficient representation for the optimal sharing of partial products in MCMs. SBCCI Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2006	A*	`conf`	Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming. DAC Levent Aksoy, Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2005	A	`conf`	An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications. ICCAD Paulo F. Flores, José Monteiro, Eduardo A. C. da Costa
2005	—	`conf`	Maximal sharing of partial terms in MCM under minimal signed digit representation. ECCTD Eduardo A. C. da Costa, Paulo F. Flores, José Monteiro
2001	J	`jnl`	An exact solution to the minimum size test pattern problem. ACM Trans. Design Autom. Electr. Syst. Paulo F. Flores, Horácio C. Neto, João P. Marques Silva
1999	Misc	`conf`	Assignment and Reordering of Incompletely Specified Pattern Sequences Targetting Minimum Power Dissipation. VLSI Design Paulo F. Flores, José C. Costa, Horácio C. Neto, José Monteiro, João Marques-Silva
1999	—	`conf`	On Applying Set Covering Models to Test Set Compaction. Great Lakes Symposium on VLSI Paulo F. Flores, Horácio C. Neto, João P. Marques Silva
1999	—	`conf`	Test pattern generation for width compression in BIST. ISCAS (1) Paulo F. Flores, Horácio C. Neto, Krishnendu Chakrabarty, João Marques-Silva
1998	C	`conf`	An exact solution to the minimum size test pattern problem. ICCD Paulo F. Flores, Horácio C. Neto, João P. Marques Silva
1997	B	`conf`	Prime Implicant Computation Using Satisfiability Algorithms. ICTAI Vasco M. Manquinho, Paulo F. Flores, João P. Marques Silva, Arlindo L. Oliveira