Paul Zuber - RankMe

17 papers A* 2A 3C 2Journal 2Unranked 8

Year	Rank	Type	Title / Venue / Authors
2013	A*	`conf`	TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes. DAC Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest
2012	C	`conf`	Analysis of FinFET technology on memories. IOLTS Esteve Amat, A. Asenov, Ramon Canal, Binjie Cheng, J.-Ll. Cruz, Zoran Jaksic, Miguel Miranda, Antonio Rubio, Paul Zuber
2011	C	`conf`	New reliability mechanisms in memory design for sub-22nm technologies. IOLTS Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber
2011	—	`conf`	TRAMS Project: Variability and Reliability of SRAM Memories in sub-22 nm Bulk-CMOS Technologies. FET Ramon Canal, Antonio Rubio, A. Asenov, A. Brown, Miguel Miranda, Paul Zuber, Antonio González, Xavier Vera
2011	—	`conf`	Variability Aware Sub-Wavelength Lithography Characterization for Robust SRAM Design. ARCS Workshops Petr Dobrovolný, Miguel Miranda, Paul Zuber
2011	A	`conf`	Variability aware modeling for yield enhancement of SRAM and logic. DATE Miguel Miranda, Paul Zuber, Petr Dobrovolný, Philippe Roussel
2010	A*	`conf`	A holistic approach for statistical SRAM analysis. DAC Paul Zuber, Petr Dobrovolný, Miguel Miranda
2010	J	`jnl`	Optimal wire ordering and spacing in low power semiconductor design. Math. Program. Peter Gritzmann, Michael Ritter, Paul Zuber
2010	A	`conf`	Statistical SRAM analysis for yield enhancement. DATE Paul Zuber, Miguel Miranda, Petr Dobrovolný, Koen van der Zanden, Jong-Hoon Jung
2009	—	`conf`	Exponent Monte Carlo for Quick Statistical Circuit Simulation. PATMOS Paul Zuber, Vladimir Matvejev, Philippe Roussel, Petr Dobrovolný, Miguel Miranda
2009	—	`conf`	Variability aware modeling of SoCs: From device variations to manufactured system yield. ISQED Miguel Miranda, Bart Dierickx, Paul Zuber, Petr Dobrovolný, F. Kutscherauer, Philippe Roussel, Pavel Poliakov
2009	J	`jnl`	Wire Topology Optimization for Low Power CMOS. IEEE Trans. Very Large Scale Integr. Syst. Paul Zuber, Othman Bahlous, Thomas Ilnseher, Michael Ritter, Walter Stechele
2005	—	`conf`	Optimization Potential of CMOS Power by Wire Spacing. GI Jahrestagung (1) Paul Zuber, Florian Helmut Müller, Walter Stechele
2005	A	`conf`	Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization. DATE Paul Zuber, Armin Windschiegl, Raúl Medina Beltrán de Otálora, Walter Stechele, Andreas Herkersdorf
2005	—	`conf`	The Optimal Wire Order for Low Power CMOS. PATMOS Paul Zuber, Peter Gritzmann, Michael Ritter, Walter Stechele
2002	—	`conf`	A wire load model considering metal layer properties. ICECS Armin Windschiegl, Torsten Mahnke, Michael Eiermann, Walter Stechele, Paul Zuber
2002	—	`conf`	Exploiting Metal Layer Characteristics for Low-Power Routing. PATMOS Armin Windschiegl, Paul Zuber, Walter Stechele