Paul R. Gray - RankMe

37 papers A 4C 2Journal 28Unranked 3

Year	Rank	Type	Title / Venue / Authors
2006	J	`jnl`	A $+$31.5 dBm CMOS RF Doherty Power Amplifier for Wireless Communications. IEEE J. Solid State Circuits Naratip Wongkomet, Luns Tee, Paul R. Gray
2006	—	`conf`	A 1.7GHz 1.5W CMOS RF Doherty Power Amplifier for Wireless Communications. ISSCC Naratip Wongkomet, Luns Tee, Paul R. Gray
2005	—	`conf`	Scaling of analog-to-digital converters into ultra-deep-submicron CMOS. CICC Yun Chiu, Borivoje Nikolic, Paul R. Gray
2004	J	`jnl`	A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR. IEEE J. Solid State Circuits Yun Chiu, Paul R. Gray, Borivoje Nikolic
2004	J	`jnl`	Least mean square adaptive digital background calibration of pipelined analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. Yun Chiu, Cheongyuen W. Tsang, Borivoje Nikolic, Paul R. Gray
2001	J	`jnl`	A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixers. IEEE J. Solid State Circuits Jeffrey A. Weldon, R. Sekhar Narayanaswami, Jacques Christophe Rudell, Li Lin, Masanori Otsuka, Sébastien Dedieu, Luns Tee, King-Chun Tsai, Cheol-Woong Lee, Paul R. Gray
2000	J	`jnl`	A 900-MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications. IEEE J. Solid State Circuits George Chien, Paul R. Gray
1999	J	`jnl`	A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter. IEEE J. Solid State Circuits Andrew M. Abo, Paul R. Gray
1999	J	`jnl`	A 1.9-GHz, 1-W CMOS class-E power amplifier for wireless communications. IEEE J. Solid State Circuits King-Chun Tsai, Paul R. Gray
1998	—	`conf`	A 13 bit, 1.4 MS/s, 3.3 V sigma-delta modulator for RF baseband channel applications. CICC Arnold R. Feldman, Bernhard E. Boser, Paul R. Gray
1998	J	`jnl`	A 13-bit, 1.4-MS/s sigma-delta modulator for RF baseband channel applications. IEEE J. Solid State Circuits Arnold R. Feldman, Bernhard E. Boser, Paul R. Gray
1998	J	`jnl`	A 75-mW 128-MHz DS-CDMA baseband demodulator for high-speed wireless applications [LANs]. IEEE J. Solid State Circuits Keith K. Onodera, Paul R. Gray
1998	A	`conf`	Recent developments in high integration multi-standard CMOS transceivers for personal communication systems. ISLPED Jacques Christophe Rudell, Jia-Jiunn Ou, R. Sekhar Narayanaswami, George Chien, Jeffrey A. Weldon, Li Lin, King-Chun Tsai, Luns Tee, Kelvin Khoo, Danelle Au, Troy Robinson, Danilo Gerna, Masanori Otsuka, Paul R. Gray
1997	J	`jnl`	A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications. IEEE J. Solid State Circuits Jacques C. Rudell, Jia-Jiunn Ou, Thomas Byunghak Cho, George Chien, Francesco Brianti, Jeffrey A. Weldon, Paul R. Gray
1996	J	`jnl`	A module generator for high-speed CMOS current output digital/analog converters. IEEE J. Solid State Circuits Robert R. Neff, Paul R. Gray, Alberto L. Sangiovanni-Vincentelli
1996	J	`jnl`	A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 μm CMOS. IEEE J. Solid State Circuits David W. Cline, Paul R. Gray
1995	J	`jnl`	A 10 b, 20 Msample/s, 35 mW pipeline A/D converter. IEEE J. Solid State Circuits Thomas Byunghak Cho, Paul R. Gray
1995	J	`jnl`	A 50 MHz eight-tap adaptive equalizer for partial-response channels. IEEE J. Solid State Circuits Caesar S. H. Wong, Jacques C. Rudell, Gregory T. Uehara, Paul R. Gray
1994	J	`jnl`	A 100 MHz A/D interface for PRML magnetic disk read channels. IEEE J. Solid State Circuits Gregory T. Uehara, Paul R. Gray
1994	C	`conf`	Analysis of Timing Jitter in CMOS Ring Oscillators. ISCAS Todd C. Weigandt, Beomsup Kim, Paul R. Gray
1994	C	`conf`	PLL/DLL System Noise Analysis for Low Jitter Clock Synthesizer Design. ISCAS Beomsup Kim, Todd C. Weigandt, Paul R. Gray
1993	J	`jnl`	A 20-MHz sixth-order BiCMOS parasitic-insensitive continuous-time filter and second-order equalizer optimized for disk-drive read channels. IEEE J. Solid State Circuits Carlos A. Laber, Paul R. Gray
1993	J	`jnl`	A monolithic 480 Mb/s parallel AGG/decision/clock-recovery circuit in 1.2- mu m CMOS. IEEE J. Solid State Circuits Timothy H. Hu, Paul R. Gray
1993	J	`jnl`	A monolithic analog video comb filter in 1.2- mu m CMOS. IEEE J. Solid State Circuits Ken A. Nishimura, Paul R. Gray
1993	J	`jnl`	An 8-b 85-MS/s parallel pipeline A/D converter in 1- mu m CMOS. IEEE J. Solid State Circuits Cormac S. G. Conroy, David W. Cline, Paul R. Gray
1991	J	`jnl`	A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOS. IEEE J. Solid State Circuits Yuh-Min Lin, Beomsup Kim, Paul R. Gray
1991	A	`conf`	A Behavioral Representation for Nyquist Rate A/D Converters. ICCAD Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli, Georges G. E. Gielen, Paul R. Gray
1990	J	`jnl`	A 30-MHz hybrid analog/digital clock recovery circuit in 2- mu m CMOS. IEEE J. Solid State Circuits Beomsup Kim, David N. Helman, Paul R. Gray
1990	A	`conf`	CADICS - Cyclic Analog-to-Digital Converter Synthesis. ICCAD Gani Jusuf, Paul R. Gray, Alberto L. Sangiovanni-Vincentelli
1990	J	`jnl`	OPASYN: a compiler for CMOS operational amplifiers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Han Young Koh, Carlo H. Séquin, Paul R. Gray
1989	J	`jnl`	A 10-bit 5-Msample/s CMOS two-step flash ADC. IEEE J. Solid State Circuits Joey Doernberg, Paul R. Gray, David A. Hodges
1989	J	`jnl`	A scalable switched-capacitor filter implemented in 1.25- mu m technology. IEEE J. Solid State Circuits Sui-Ping Shieh, Chorng-Kuang Wang, Rinaldo Castello, Paul R. Gray
1988	J	`jnl`	A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter. IEEE J. Solid State Circuits Sehat Sutarja, Paul R. Gray
1988	J	`jnl`	A positive-feedback transconductance amplifier with applications to high-frequency, high-Q CMOS switched-capacitor filters. IEEE J. Solid State Circuits Carlos A. Laber, Paul R. Gray
1988	J	`jnl`	Area-efficient multichannel oversampled PCM voice-band coder. IEEE J. Solid State Circuits Bosco H. Leung, Robert R. Neff, Paul R. Gray, Robert W. Brodersen
1988	A	`conf`	Automatic layout generation for CMOS operational amplifiers. ICCAD Han Young Koh, Carlo H. Séquin, Paul R. Gray
1980	J	`jnl`	Integrated circuits for local digital switching line interfaces. IEEE Commun. Mag. Paul R. Gray, David G. Messerschmitt