Paul Loewenstein

19 papers A* 2C 2Misc 2Journal 6Unranked 7
YearRankTypeTitle / Venue / Authors
2019 — conf
OmniXtend: Direct to Caches Over Commodity Fabric.
Hot Interconnects
Marjan Radi, Wesley W. Terpstra, Paul Loewenstein, Dejan Vucinic
2016 J jnl
SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor.
IEEE J. Solid State Circuits
Georgios K. Konstadinidis, Hongping Penny Li, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister, Jeffrey Brooks, Ha Pham, Sebastian Turullols, Yifan Yanggong, Robert T. Golla, Alan P. Smith, Ali Vahidsafa
2015 — conf
4.2 A 20nm 32-Core 64MB L3 cache SPARC M7 processor.
ISSCC
Penny Li, Jinuk Luke Shin, Georgios K. Konstadinidis, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister
2015 J jnl
M7: Oracle's Next-Generation Sparc Processor.
IEEE Micro
Kathirgamar Aingaran, Sumti Jairath, Georgios K. Konstadinidis, Serena Leung, Paul Loewenstein, Curtis McAllister, Stephen Phillips, Zoran Radovic, Ram Sivaramakrishnan, David Smentek, Thomas Wicki
2013 J jnl
The Oracle Sparc T5 16-Core Processor Scales to Eight Sockets.
IEEE Micro
John R. Feehrer, Sumti Jairath, Paul Loewenstein, Ram Sivaramakrishnan, David Smentek, Sebastian Turullols, Ali Vahidsafa
1995 — conf
Formal Verification of Counterflow Pipeline Architecture.
TPHOLs
Paul Loewenstein
1995 A* conf
System Design Methodology of UltraSPARC-I.
DAC
Lawrence Yang, David Gao, Jamshid Mostoufi, Raju Joshi, Paul Loewenstein
1993 J jnl
A Formal Theory of Simulations between Infinite Automata.
Formal Methods Syst. Des.
Paul Loewenstein
1992 — conf
A Formal Theory of Simulations Between Infinite Automata.
TPHOLs
Paul Loewenstein
1992 J jnl
Verification of a Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic.
Formal Methods Syst. Des.
Paul Loewenstein
1991 — conf
Learning to use HOL.
TPHOLs
Paul Loewenstein
1990 C conf
Formal verification of cache systems using refinement relations.
ICCD
Paul Loewenstein, David L. Dill
1990 — conf
Verification of Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic.
CAV (DIMACS/AMS volume)
Paul Loewenstein, David L. Dill
1990 A* conf
Verification of a Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic.
CAV
Paul Loewenstein, David L. Dill
1989 C conf
Formal verification of state-machines using higher-order logic.
ICCD
Paul Loewenstein
1989 — conf
Reasoning about State Machines in Higher-Order Logic.
Hardware Specification, Verification and Synthesis
Paul Loewenstein
1988 J jnl
Closing the semantic gap.
Microprocess. Microprogramming
Paul Loewenstein, Andrew Fox
1983 Misc conf
Architecture and instruction set of a programmable LSI digital filter.
ICASSP
S. N. Terepin, Paul Loewenstein
1982 Misc conf
Digital pulse frequency demodulation using state-space filtering.
ICASSP
Paul Loewenstein