Paul E. Hasler

193 papers A* 2A 1B 3C 46Misc 9Journal 52Unranked 80
YearRankTypeTitle / Venue / Authors
2013 J jnl
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena.
IEEE Trans. Biomed. Circuits Syst.
Stephen Brink, Stephen Nease, Paul E. Hasler, Shubha Ramakrishnan, Richard B. Wunderlich, Arindam Basu, Brian P. Degnan
2013 J jnl
Computing with networks of spiking neurons on a biophysically motivated floating-gate based neuromorphic integrated circuit.
Neural Networks
Stephen Brink, Stephen Nease, Paul E. Hasler
2013 J jnl
Configurable hardware integrate and fire neurons for sparse approximation.
Neural Networks
Samuel A. Shapero, Christopher J. Rozell, Paul E. Hasler
2013 J jnl
Floating Gate-Based Field Programmable Mixed-Signal Array.
IEEE Trans. Very Large Scale Integr. Syst.
Richard B. Wunderlich, Farhan Adil, Paul E. Hasler
2013 J jnl
Mismatch Characterization and Calibration for Accurate and Automated Analog Design.
IEEE Trans. Circuits Syst. I Regul. Pap.
Samuel A. Shapero, Paul E. Hasler
2013 — conf
STDP-enabled learning on a reconfigurable neuromorphic platform.
ECCTD
Stephen Nease, Stephen Brink, Paul E. Hasler
2013 J jnl
Scaling Energy Per Operation via an Asynchronous Pipeline.
IEEE Trans. Very Large Scale Integr. Syst.
Bo Marr, Brian P. Degnan, Paul E. Hasler, David V. Anderson
2012 J jnl
A Digitally Enhanced Dynamically Reconfigurable Analog Platform for Low-Power Signal Processing.
IEEE J. Solid State Circuits
Craig Schlottmann, Samuel A. Shapero, Stephen Nease, Paul E. Hasler
2012 J jnl
A High-Level Simulink-Based Tool for FPAA Configuration.
IEEE Trans. Very Large Scale Integr. Syst.
Craig Schlottmann, Csaba Petre, Paul E. Hasler
2012 J jnl
A MITE-Based Translinear FPAA.
IEEE Trans. Very Large Scale Integr. Syst.
Craig Schlottmann, David Abramson, Paul E. Hasler
2012 — conf
A mixed-mode FPAA SoC for analog-enhanced signal processing.
CICC
Craig Schlottmann, Stephen Nease, Samuel A. Shapero, Paul E. Hasler
2012 J jnl
An Analog Integrated Circuit Beamformer for High-Frequency Medical Ultrasound Imaging.
IEEE Trans. Biomed. Circuits Syst.
Gokce Gurun, Jaime S. Zahorian, Alper Sisman, Mustafa Karaman, Paul E. Hasler, Levent Degertekin
2012 Misc conf
An analog adaptive beamforming circuit for audio noise reduction.
ICASSP
Jeff Dugger, Paul D. Smith, Matt Kucic, Paul E. Hasler
2012 Misc conf
FPAA empowering cooperative analog-digital signal processing.
ICASSP
Craig Schlottmann, Paul E. Hasler
2012 J jnl
Low Power Sparse Approximation on Reconfigurable Analog Hardware.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Samuel A. Shapero, Adam S. Charles, Christopher J. Rozell, Paul E. Hasler
2012 J jnl
Modeling and Implementation of Voltage-Mode CMOS Dendrites on a Reconfigurable Analog Platform.
IEEE Trans. Biomed. Circuits Syst.
Stephen Nease, Suma George, Paul E. Hasler, Scott Koziol, Stephen Brink
2012 — conf
Neuromorphic hardware for rapid sparse coding.
BioCAS
Samuel A. Shapero, Paul E. Hasler
2012 — conf
Neuron array with plastic synapses and programmable dendrites.
BioCAS
Shubha Ramakrishnan, Richard B. Wunderlich, Paul E. Hasler
2012 A* conf
Robot path planning using Field Programmable Analog Arrays.
ICRA
Scott Koziol, Paul E. Hasler, Mike Stilman
2011 J jnl
A Fully Integrated Architecture for Fast and Accurate Programming of Floating Gates Over Six Decades of Current.
IEEE Trans. Very Large Scale Integr. Syst.
Arindam Basu, Paul E. Hasler
2011 J jnl
A Highly Dense, Low Power, Programmable Analog Vector-Matrix Multiplier: The FPAA Implementation.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Craig Schlottmann, Paul E. Hasler
2011 — conf
FPAA chips and tools as the center of an design-based analog systems education.
MSE
Paul E. Hasler, Craig Scholttmann, Scott Koziol
2011 J jnl
Floating Gate Synapses With Spike-Time-Dependent Plasticity.
IEEE Trans. Biomed. Circuits Syst.
Shubha Ramakrishnan, Paul E. Hasler, Christal Gordon
2011 J jnl
Low-Power Discrete Fourier Transform for OFDM: A Programmable Analog Approach.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sangwook Suh, Arindam Basu, Craig Schlottmann, Paul E. Hasler, John R. Barry
2011 — conf
Reconfigurable Analog VLSI circuits for robot path planning.
AHS
Scott Koziol, Paul E. Hasler
2011 B conf
Using floating-gate based programmable analog arrays for real-time control of a game-playing robot.
SMC
Scott Koziol, David Lenz, Sebastian Hilsenbeck, Smriti Chopra, Paul E. Hasler, Ayanna M. Howard
2010 J jnl
A Floating-Gate-Based Field-Programmable Analog Array.
IEEE J. Solid State Circuits
Arindam Basu, Stephen Brink, Craig Schlottmann, Shubha Ramakrishnan, Csaba Petre, Scott Koziol, I. Faik Baskaya, Christopher M. Twigg, Paul E. Hasler
2010 J jnl
Compressive Sensing on a CMOS Separable-Transform Image Sensor.
Proc. IEEE
Ryan W. Robucci, Jordan D. Gray, Leung Kin Chiu, Justin K. Romberg, Paul E. Hasler
2010 C conf
Crossbar switch matrix for floating-gate programming over large current ranges.
ISCAS
Brian P. Degnan, Brian J. Duffy, Paul E. Hasler
2010 J jnl
Dynamics and Bifurcations in a Silicon Neuron.
IEEE Trans. Biomed. Circuits Syst.
Arindam Basu, Csaba Petre, Paul E. Hasler
2010 J jnl
Error Immune Logic for Low-Power Probabilistic Computing.
VLSI Design
Bo Marr, Jason George, Brian P. Degnan, David V. Anderson, Paul E. Hasler
2010 C conf
Floating gate synapses with spike time dependent plasticity.
ISCAS
Shubha Ramakrishnan, Paul E. Hasler, Christal Gordon
2010 C conf
Hardware and software infrastructure for a family of floating-gate based FPAAs.
ISCAS
Scott Koziol, Craig Schlottmann, Arindam Basu, Stephen Brink, Csaba Petre, Brian P. Degnan, Shubha Ramakrishnan, Paul E. Hasler, Aurele Balavoine
2010 C conf
Integrated low voltage and low power CMOS circuits for optical sensing of diffraction based micromachined microphone.
ISCAS
Muhammad Shakeel Qureshi, Arindam Basu, Baris Bicen, Levent Degertekin, Paul E. Hasler
2010 C conf
Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs.
ISCAS
Scott Koziol, Craig Schlottmann, Arindam Basu, Stephen Brink, Csaba Petre, Brian P. Degnan, Shubha Ramakrishnan, Paul E. Hasler, Aurele Balavoine
2010 J jnl
Neural Dynamics in Reconfigurable Silicon.
IEEE Trans. Biomed. Circuits Syst.
Arindam Basu, Shubha Ramakrishnan, Csaba Petre, Scott Koziol, Stephen Brink, Paul E. Hasler
2010 C conf
Neural dynamics in reconfigurable silicon.
ISCAS
Arindam Basu, Shubha Ramakrishnan, Paul E. Hasler
2010 J jnl
Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping.
VLSI Design
Kofi M. Odame, Paul E. Hasler
2010 J jnl
Nullcline-Based Design of a Silicon Neuron.
IEEE Trans. Circuits Syst. I Regul. Pap.
Arindam Basu, Paul E. Hasler
2010 C conf
Reducing offset errors in MITE systems by precise floating gate programming.
ISCAS
Craig Schlottmann, Brian P. Degnan, David Abramson, Paul E. Hasler
2010 Misc conf
Vector matrix multiplier on field programmable analog array.
ICASSP
Craig Schlottmann, Csaba Petre, Paul E. Hasler
2009 C conf
A Large-scale Reconfigurable Smart Sensory Chip.
ISCAS
Sheng-Yu Peng, Gokce Gurun, Christopher M. Twigg, Muhammad Shakeel Qureshi, Arindam Basu, Stephen Brink, Paul E. Hasler, Levent Degertekin
2009 — conf
A generic reconfigurable array specification and programming environment (GRASPER).
ECCTD
Faik Baskaya, David V. Anderson, Paul E. Hasler, Sung Kyu Lim
2009 A* conf
A learning digital computer.
DAC
Bo Marr, Arindam Basu, Stephen Brink, Paul E. Hasler
2009 C conf
An Asynchronously Embedded Datapath for Performance Acceleration and Energy Efficiency.
ISCAS
Bo Marr, Brian P. Degnan, Paul E. Hasler, David V. Anderson
2009 B conf
Compact floating-gate learning array with STDP.
IJCNN
Mikko Pänkäälä, Mika Laiho, Paul E. Hasler
2009 J jnl
Configurable analog signal processing.
Digit. Signal Process.
Christopher M. Twigg, Paul E. Hasler
2009 J jnl
Implementation of a Hebbian chemoreceptor model for diffusive source localization.
Biosyst.
Gail Rosen, Paul E. Hasler, Mark T. Smith
2009 C conf
Passgate Resistance Estimation based on the Compact EKV Model and Effective Mobility.
ISCAS
Brian P. Degnan, Richard B. Wunderlich, Paul E. Hasler
2009 J jnl
Theory and Design of OTA-C Oscillators with Native Amplitude Limiting.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kofi M. Odame, Paul E. Hasler
2008 C conf
A 256×256 separable transform CMOS imager.
ISCAS
Ryan W. Robucci, Jordan D. Gray, David Abramson, Paul E. Hasler
2008 J jnl
A Bandpass Filter With Inherent Gain Adaptation for Hearing Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kofi M. Odame, David V. Anderson, Paul E. Hasler
2008 J jnl
A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sheng-Yu Peng, Muhammad Shakeel Qureshi, Paul E. Hasler, Arindam Basu, Levent Degertekin
2008 J jnl
A Floating-Gate-Based Programmable CMOS Reference.
IEEE Trans. Circuits Syst. I Regul. Pap.
Srinivasan Venkatesh, Guillermo J. Serrano, Christopher M. Twigg, Paul E. Hasler
2008 J jnl
A Precision Low-TC Wide-Range CMOS Current Reference.
IEEE J. Solid State Circuits
Guillermo J. Serrano, Paul E. Hasler
2008 J jnl
A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering.
IEEE Trans. Circuits Syst. I Regul. Pap.
Erhan Özalevli, Walter Huang, Paul E. Hasler, David V. Anderson
2008 C conf
A biophysically based dendrite model using programmable floating-gate devices.
ISCAS
Stephen Brink, Scott Koziol, Shubha Ramakrishnan, Paul E. Hasler
2008 C conf
A floating-gate transistor based continuous-time analog adaptive filter.
ISCAS
Jordan D. Gray, Srinivasan Venkatesh, Ryan W. Robucci, Paul E. Hasler
2008 Misc conf
A programmable analog radial-basis-function based classifier.
ICASSP
Sheng-Yu Peng, Yu Tsao, Paul E. Hasler, David V. Anderson
2008 C conf
Analog VLSI implementation of support vector machine learning and classification.
ISCAS
Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler
2008 C conf
Automated conversion of Simulink designs to analog hardware on an FPAA.
ISCAS
Csaba Petre, Craig Schlottmann, Paul E. Hasler
2008 C conf
Bifurcations in a silicon neuron.
ISCAS
Arindam Basu, Csaba Petre, Paul E. Hasler
2008 J jnl
Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References.
IEEE Trans. Circuits Syst. I Regul. Pap.
Erhan Özalevli, Haw-Jing Lo, Paul E. Hasler
2008 Misc conf
Compressive sensing on a CMOS separable transform image sensor.
ICASSP
Ryan W. Robucci, Leung Kin Chiu, Jordan D. Gray, Justin K. Romberg, Paul E. Hasler, David V. Anderson
2008 J jnl
Incorporating Large-Scale FPAAs Into Analog Design and Test Courses.
IEEE Trans. Educ.
Christopher M. Twigg, Paul E. Hasler
2008 — conf
RASP 2.8: A new generation of floating-gate based field programmable analog array.
CICC
Arindam Basu, Christopher M. Twigg, Stephen Brink, Paul E. Hasler, Csaba Petre, Shubha Ramakrishnan, Scott Koziol, Craig Schlottmann
2008 J jnl
Tunable Highly Linear Floating-Gate CMOS Resistor Using Common-Mode Linearization Technique.
IEEE Trans. Circuits Syst. I Regul. Pap.
Erhan Özalevli, Paul E. Hasler
2007 C conf
A Fully Integrated Architecture for Fast Programming of Floating Gates.
ISCAS
Arindam Basu, Paul E. Hasler
2007 J jnl
A Low-Power Programmable Bandpass Filter Section for Higher Order Filter Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
David W. Graham, Paul E. Hasler, Ravi Chawla, Paul D. Smith
2007 J jnl
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating Over Seven Decades of Current.
IEEE Trans. Circuits Syst. I Regul. Pap.
Arindam Basu, Ryan W. Robucci, Paul E. Hasler
2007 C conf
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating over Seven Decades of Current.
ISCAS
Arindam Basu, Ryan W. Robucci, Paul E. Hasler
2007 J jnl
A Precision CMOS Amplifier Using Floating-Gate Transistors for Offset Cancellation.
IEEE J. Solid State Circuits
Srinivasan Venkatesh, Guillermo J. Serrano, Jordan D. Gray, Paul E. Hasler
2007 — conf
A Programmable Multi-Dimensional Analog Radial-Basis- Function-Based Classifier.
VLSI-SoC (Selected Papers)
Sheng-Yu Peng, Paul E. Hasler, David V. Anderson
2007 C conf
A Self-Contained Large-Scale FPAA Development Platform.
ISCAS
Christopher M. Twigg, Paul E. Hasler, I. Faik Baskaya
2007 C conf
Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems.
ISCAS
Paul E. Hasler, Arindam Basu, Sctt Kozil
2007 C conf
An Adaptive Quality-Factor Bandpass Filter.
ISCAS
Kofi M. Odame, Paul E. Hasler
2007 J jnl
An Analog Programmable Multidimensional Radial Basis Function Based Classifier.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sheng-Yu Peng, Paul E. Hasler, David V. Anderson
2007 C conf
An Efficient Oscillator Design Based on OTA Nonlinearity.
ISCAS
Kofi M. Odame, Paul E. Hasler
2007 C conf
An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation.
ISCAS
Paul E. Hasler, Christopher M. Twigg
2007 C conf
An analog programmable multi-dimensional radial basis function based classifier.
VLSI-SoC
Sheng-Yu Peng, Paul E. Hasler, David V. Anderson
2007 C conf
Capacitively-Biased Floating-Gate CMOS: a New Logic Family.
ISCAS
Richard B. Wunderlich, Brian P. Degnan, Paul E. Hasler
2007 C conf
Dynamics of a Logarithmic Transimpedance Amplifier.
ISCAS
Arindam Basu, Kofi M. Odame, Paul E. Hasler
2007 — conf
Incorporating Large-Scale FPAAs in Analog Design Courses.
MSE
Christopher M. Twigg, Paul E. Hasler
2007 J jnl
Indirect Programming of Floating-Gate Transistors.
IEEE Trans. Circuits Syst. I Regul. Pap.
David W. Graham, Ethan Farquhar, Brian P. Degnan, Christal Gordon, Paul E. Hasler
2007 — conf
Large-Scale FPAA Devices for Signal Processing Applications.
ICASSP (2)
Christopher M. Twigg, Paul E. Hasler, David V. Anderson
2007 C conf
Optimal Synthesis of MITE Translinear Loops.
ISCAS
Shyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch
2007 C conf
Programmable Conductance Switches for FPAAs.
ISCAS
Christopher M. Twigg, Paul E. Hasler
2007 C conf
Programmable Floating Gate FPAA Switches Are Not Dead Weight.
ISCAS
Christopher M. Twigg, Jordan D. Gray, Paul E. Hasler
2007 J jnl
Programmable G
IEEE Trans. Circuits Syst. I Regul. Pap.
Ravi Chawla, Farhan Adil, Guillermo J. Serrano, Paul E. Hasler
2007 Misc conf
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array.
FCCM
I. Faik Baskaya, Brian Gestner, Christopher M. Twigg, Sung Kyu Lim, David V. Anderson, Paul E. Hasler
2007 C conf
Run-Time Programming of Analog Circuits Using Floating-Gate Transistors.
ISCAS
David W. Graham, Paul E. Hasler
2007 C conf
Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform.
ISCAS
Kofi M. Odame, Christopher M. Twigg, Arindam Basu, Paul E. Hasler
2007 C conf
Transistor Channel Dendrites implementing HMM classifiers.
ISCAS
Paul E. Hasler, Scott Koziol, Ethan Farquhar, Arindam Basu
2007 C conf
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter.
ISCAS
Erhan Ozalevli, Walter Huang, Paul E. Hasler, David V. Anderson
2006 — conf
A Compact Programmable CMOS Reference With ±40μV Accuracy.
CICC
Srinivasan Venkatesh, Guillermo J. Serrano, Christopher M. Twigg, Paul E. Hasler
2006 — conf
A Floating-gate Based Low-Power Capacitive Sensing Interface Circuit.
CICC
Sheng-Yu Peng, Muhammad Shakeel Qureshi, Arindam Basu, Paul E. Hasler, Levent Degertekin
2006 — conf
A Large-Scale Reconfigurable Analog Signal Processor (RASP) IC.
CICC
Christopher M. Twigg, Paul E. Hasler
2006 C conf
A field programmable neural array.
ISCAS
Ethan Farquhar, Christal Gordon, Paul E. Hasler
2006 C conf
A floating-gate programmable array of silicon neurons for central pattern generating networks.
ISCAS
Francesco Tenore, R. Jacob Vogelstein, Ralph Etienne-Cummings, Gert Cauwenberghs, Paul E. Hasler
2006 C conf
A rail to rail, slew-boosted pre-charge buffer.
ISCAS
Huseyin Dine, Sean Chuang, Phillip E. Allen, Paul E. Hasler
2006 C conf
A tunable floating gate CMOS resistor for low-power and low-voltage applications.
ISCAS
Erhan Ozalevli, Paul E. Hasler
2006 J jnl
Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades.
IEEE J. Solid State Circuits
Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler
2006 C conf
An artificial synapse for interfacing to biological neurons.
ISCAS
Christal Gordon, Amanda Preyer, Karolyn Babalola, Robert J. Butera, Paul E. Hasler
2006 — conf
Building large networks of biological neurons.
EMBC (Supplement)
Paul E. Hasler, Ethan Farquhar, Christal Gordon
2006 — conf
Chemical Source Localization in Unknown Turbulence Using the Cross-Correlation Method.
ICASSP (3)
Gail L. Rosen, Paul E. Hasler
2006 — conf
Design of a binary-weighted resistor DAC using tunable linearized floating-gate CMOS resistors.
CICC
Erhan Ozalevli, Hüseyin Dinc, Haw-Jing Lo, Paul E. Hasler
2006 C conf
High SNR capacitive sensing transducer.
ISCAS
Sheng-Yu Peng, Muhammad Shakeel Qureshi, Paul E. Hasler, Neal A. Hall, F. L. Degertekin
2006 C conf
Low-voltage floating-gate CMOS buffer.
ISCAS
Erhan Ozalevli, Muhammad Shakeel Qureshi, Paul E. Hasler
2006 J jnl
MATIA: a programmable 80 WμW/frame CMOS block matrix transform imager architecture.
IEEE J. Solid State Circuits
Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler
2006 J jnl
Winner-Take-All-Based Visual Motion Sensors.
IEEE Trans. Circuits Syst. II Express Briefs
Erhan Özalevli, Paul E. Hasler, Charles M. Higgins
2005 — conf
10-bit programmable voltage-output digital-analog converter.
ISCAS (6)
Erhan Ozalevli, Christopher M. Twigg, Paul E. Hasler
2005 — conf
A 80µW/frame 104×128 CMOS imager front end for JPEG compression.
ISCAS (5)
Abhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler
2005 — conf
A Field-Programmable Analog Array Using Translinear Elements.
IWSOC
David N. Abramson, Jordan D. Gray, Shyam Subramanian, Paul E. Hasler
2005 J jnl
A bio-physically inspired silicon neuron.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ethan Farquhar, Paul E. Hasler
2005 — conf
A low-power, programmable bandpass filter section for higher-order filter-bank applications.
ISCAS (3)
David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler
2005 — conf
A precision CMOS amplifier using floating-gates for offset cancellation.
CICC
Srinivasan Venkatesh, Guillermo J. Serrano, Jordan D. Gray, Paul E. Hasler
2005 — conf
A programmable floating-gate bump circuit with variable width.
ISCAS (5)
Sheng-Yu Peng, Bradley A. Minch, Paul E. Hasler
2005 — conf
A spiking silicon central pattern generator with floating gate synapses [robot control applications].
ISCAS (4)
Francesco Tenore, R. Jacob Vogelstein, Ralph Etienne-Cummings, Gert Cauwenberghs, M. Anthony Lewis, Paul E. Hasler
2005 — conf
An adaptive analog synapse circuit that implements the least-mean-square learning rule.
ISCAS (5)
Srinivasan Venkatesh, Jeff Dugger, Paul E. Hasler
2005 J jnl
An analog floating-gate node for Supervised learning.
IEEE Trans. Circuits Syst. I Regul. Pap.
Paul E. Hasler, Jeff Dugger
2005 — conf
An analog modulator/demodulator using a programmable arbitrary waveform generator.
ISCAS (6)
Ravi Chawla, Christopher M. Twigg, Paul E. Hasler
2005 — conf
Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network.
ISCAS (1)
David N. Abramson, Jordan D. Gray, Christopher M. Twigg, Paul E. Hasler
2005 — conf
Design of a CMOS floating-gate resistor for highly linear amplifier and multiplier applications.
CICC
Erhan Ozalevli, Paul E. Hasler
2005 J jnl
Developing large-scale field-programmable analog arrays for rapid prototyping.
Int. J. Embed. Syst.
Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson
2005 — conf
Floating-Gate Devices, Circuits, and Systems, invited.
IWSOC
Paul E. Hasler
2005 — conf
Image processing system using a programmable transform imager.
ICASSP (5)
Jungwon Lee, Abhishek Bandyopadhyay, I. Faik Baskaya, Ryan W. Robucci, Paul E. Hasler
2005 — conf
Indirect programming of floating-gate transistors.
ISCAS (3)
David W. Graham, Ethan Farquhar, Brian P. Degnan, Christal Gordon, Paul E. Hasler
2005 — conf
Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits.
ISCAS (1)
Mark Hooper, Matt Kucic, Paul E. Hasler
2005 J jnl
Large-scale field-programmable analog arrays for analog signal processing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tyson S. Hall, Christopher M. Twigg, Jordan D. Gray, Paul E. Hasler, David V. Anderson
2005 — conf
Low-Power Programmable Signal Processing, invited.
IWSOC
Paul E. Hasler
2005 — conf
Offset compensation in flash ADCs using floating-gate circuits.
ISCAS (6)
Philomena C. Brady, Paul E. Hasler
2005 — conf
Programmable Low Dropout Voltage Regulator.
IWSOC
Paul E. Hasler, AiChen Low
2005 — conf
Programmable floating-gate CMOS resistors.
ISCAS (3)
Erhan Ozalevli, Paul E. Hasler
2005 — conf
Programmable floating-gate techniques for CMOS inverters.
ISCAS (3)
Brian P. Degnan, Richard B. Wunderlich, Paul E. Hasler
2005 — conf
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method.
ISCAS (3)
Abhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler
2005 — conf
Synthesis of MITE log-domain filters with unique operating points.
ISCAS (2)
Shyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch
2005 J jnl
Towards Low-Power On-chip Auditory Processing.
EURASIP J. Adv. Signal Process.
Sourabh Ravindran, Paul D. Smith, David W. Graham, Varinthira Duangudom, David V. Anderson, Paul E. Hasler
2004 — conf
5V-only, standard 0.5μm CMOS programmable and adaptive floating-gate circuits and arrays using CMOS charge pumps.
ISCAS (5)
Mark Hooper, Matt Kucic, Paul E. Hasler
2004 — conf
A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements.
ISCAS (1)
Angelo W. Pereira, Daniel J. Allen, Paul E. Hasler
2004 — conf
A 531 nW/MHz, 128×32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity.
CICC
Ravi Chawla, Abhishek Bandyopadhyay, Venkatesh Srinivasan, Paul E. Hasler
2004 — conf
A bio-physically inspired silicon neuron.
ISCAS (1)
Ethan Farquhar, Paul E. Hasler
2004 — conf
A family of floating-gate adapting synapses based upon transistor channel models.
ISCAS (1)
Christal Gordon, Ethan Farquhar, Paul E. Hasler
2004 — conf
A five-transistor bandpass filter element.
ISCAS (1)
Paul D. Smith, David W. Graham, Ravi Chawla, Paul E. Hasler
2004 — conf
A floating-gate DAC array.
ISCAS (1)
Guillermo J. Serrano, Paul E. Hasler
2004 — conf
A fully programmable log-domain bandpass filter using multiple-input translinear elements.
ISCAS (1)
Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul E. Hasler, Bradley A. Minch
2004 — conf
A programmable bandpass array using floating-gate elements.
ISCAS (1)
David W. Graham, Paul D. Smith, Richard Ellis, Ravi Chawla, Paul E. Hasler
2004 — conf
A programmable coefficient continuous-time A/D Delta-Sigma modulator.
ISCAS (1)
Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler
2004 — conf
A reconfigurable bidirectional active 2 dimensional dendrite model.
ISCAS (1)
Ethan Farquhar, David N. Abramson, Paul E. Hasler
2004 — conf
Application performance of elements in a floating-gate FPAA.
ISCAS (2)
Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson
2004 — conf
Automatic rapid programming of large arrays of floating-gate elements.
ISCAS (1)
Guillermo J. Serrano, Paul D. Smith, Haw-Jing Lo, Ravi Chawla, Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler
2004 — conf
C
ISCAS (5)
Heejong Yoo, David W. Graham, David V. Anderson, Paul E. Hasler
2004 — conf
Characterization of charge-pump rectifiers for standard submicron CMOS processes.
ISCAS (5)
Mark Hooper, Matt Kucic, Paul E. Hasler
2004 A conf
Developing Large-Scale Field-Programmable Analog Arrays.
IPDPS
Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson
2004 — conf
Fully differential floating-gate programmable OTAs with novel common-mode feedback.
ISCAS (1)
Ravi Chawla, Guillermo J. Serrano, Daniel J. Allen, Angelo W. Pereira, Paul E. Hasler
2004 — conf
Programmable multiple input translinear elements.
ISCAS (1)
Haw-Jing Lo, Guillermo J. Serrano, Paul E. Hasler, David V. Anderson, Bradley A. Minch
2004 — conf
Programmable voltage-output, floating-gate digital-analog converter.
ISCAS (1)
Erhan Ozalevli, Paul E. Hasler, Farhan Adil
2004 — conf
Supervised learning in a two-input analog floating-gate node.
ISCAS (5)
Jeff Dugger, Paul E. Hasler
2004 — conf
Synthesis of static multiple input multiple output MITE networks.
ISCAS (1)
Shyam Subramanian, David V. Anderson, Paul E. Hasler
2003 — conf
A fully programmable CMOS block matrix transform imager architecture.
CICC
Abhishek Bandyopadhyay, Paul E. Hasler
2003 J jnl
An analog VLSI model of muscular contraction.
IEEE Trans. Circuits Syst. II Express Briefs
Tina A. Hudson, Julian A. Bragg, Paul E. Hasler, Stephen P. DeWeerth
2003 J jnl
High Fill-Factor Imagers for Neuromorphic Processing Enabled by Floating-Gate Circuits.
EURASIP J. Adv. Signal Process.
Paul E. Hasler, Abhishek Bandyopadhyay, David V. Anderson
2002 — conf
A CMOS coupled nonlinear oscillator array.
ISCAS (4)
Joseph D. Neff, Brian K. Meadows, Edgar A. Brown, Stephen P. DeWeerth, Paul E. Hasler
2002 — conf
A CMOS imager with real-time frame differencing and centroid computation.
ISCAS (3)
Richard A. Blum, Charles S. Wilson, Paul E. Hasler, Stephen P. DeWeerth
2002 — conf
A matrix transform imager allowing high-fill factor.
ISCAS (3)
Paul E. Hasler, Abhishek Bandyopadhyay, Paul D. Smith
2002 — conf
A silicon model of an adapting motoneuron.
ISCAS (4)
Julian A. Bragg, Edgar A. Brown, Paul E. Hasler, Stephen P. DeWeerth
2002 — conf
Accurate programming of analog floating-gate arrays.
ISCAS (5)
Paul D. Smith, Matt Kucic, Paul E. Hasler
2002 Misc conf
Analog speech recognition project.
ICASSP
Paul D. Smith, Paul E. Hasler
2002 — conf
Biological learning modeled in an adaptive floating-gate system.
ISCAS (5)
Christal Gordon, Paul E. Hasler
2002 — conf
Capacitively-coupled current conveyer second-order section for continuous-time bandpass filtering and cochlea modeling.
ISCAS (5)
David W. Graham, Paul E. Hasler
2002 Misc conf
Continuous-time audio noise suppression and real-time implementation.
ICASSP
Heejong Yoo, David V. Anderson, Paul E. Hasler
2002 Misc conf
Cooperative analog-digital signal processing.
ICASSP
Paul E. Hasler, David V. Anderson
2002 — conf
Empirical comparison of analog and digital auditory preprocessing for automatic speech recognition.
ISCAS (5)
T. M. Massengill, Denise M. Wilson, Paul E. Hasler, David W. Graham
2002 B conf
Field-Programmable Analog Arrays: A Floating-Gate Approach.
FPL
Tyson S. Hall, Paul E. Hasler, David V. Anderson
2002 — conf
Mel-frequency cepstrum encoding in analog floating-gate circuitry.
ISCAS (4)
Paul D. Smith, Matt Kucic, Richard Ellis, Paul E. Hasler, David V. Anderson
2002 J jnl
Nonlinear antenna technology.
Proc. IEEE
Brian K. Meadows, Ted H. Heath, Joseph D. Neff, Edgar A. Brown, David W. Fogliatti, Michael Gabbay, Visarath In, Paul E. Hasler, Stephen P. DeWeerth, William L. Ditto
2002 — conf
Practical issues using e-pot circuits.
ISCAS (5)
C. Duffy, Ethan Farquhar, Paul E. Hasler
2001 — conf
Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits.
ARVLSI
Matt Kucic, Paul E. Hasler, Jeff Dugger, David V. Anderson
2000 C conf
A floating-gate pFET based CMOS programmable analog memory cell array.
ISCAS
Julian A. Bragg, Reid R. Harrison, Paul E. Hasler, Stephen P. DeWeerth
2000 C conf
A programmable continuous-time analog Fourier processor based on floating-gate devices.
ISCAS
Matt Kucic, Ai Chen Low, Paul E. Hasler
2000 C conf
Synchrony detection for spike-mediated computation.
ISCAS
Charles S. Wilson, Paul E. Hasler, Stephen P. DeWeerth
1999 — conf
A floating-gate technology for digital CMOS processes.
ISCAS (2)
Bradley A. Minch, Paul E. Hasler
1999 — conf
Adaptive Circuits Using pFET Floating-Gate Devices.
ARVLSI
Paul E. Hasler, Bradley A. Minch, Chris Diorio
1999 — conf
An autozeroing floating-gate amplifier with gain adaptation.
ISCAS (2)
Paul E. Hasler, Paul D. Smith
1999 — conf
Correlation learning rule in floating-gate pFET synapses.
ISCAS (5)
Paul E. Hasler, Jeff Dugger
1999 — conf
Floating-gate devices: they are not just for digital memories any more.
ISCAS (2)
Paul E. Hasler, Bradley A. Minch, Chris Diorio
1999 — conf
Synthesis of multiple-input translinear element networks.
ISCAS (2)
Bradley A. Minch, Paul E. Hasler, Chris Diorio
1998 J jnl
Impact Ionization and Hot-Electron Injection Derived Consistently from Boltzmann Transport.
VLSI Design
Paul E. Hasler, Andreas G. Andreou, Chris Diorio, Bradley A. Minch, Carver A. Mead
1996 — conf
An Adaptive WTA using Floating Gate Technology.
NIPS
W. Fritz Kruger, Paul E. Hasler, Bradley A. Minch, Christof Koch
1995 C conf
A High-Resolution Non-Volatile Analog Memory Cell.
ISCAS
Chris Diorio, Sunit Mahajan, Paul E. Hasler, Bradley A. Minch, Carver Mead
1995 C conf
A vMOS Soft-Maximum Current Mirror.
ISCAS
Bradley A. Minch, Chris Diorio, Paul E. Hasler, Carver Mead
1995 C conf
Single Transistor Learning Synapse with Long Term Storage.
ISCAS
Paul E. Hasler, Chris Diorio, Bradley A. Minch, Carver Mead
1994 — conf
A Silicon Axon.
NIPS
Bradley A. Minch, Paul E. Hasler, Chris Diorio, Carver Mead
1994 — conf
Single Transistor Learning Synapses.
NIPS
Paul E. Hasler, Chris Diorio, Bradley A. Minch, Carver Mead