Paul D. Franzon

146 papers A* 8A 9B 1C 9Misc 1Journal 46Unranked 71
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 27-30 GHz T/R Module With Reflection-Type Phase Shifting and Machine-Learned Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yuan Chang, Yuejiang Wen, Zhangjie Hong, Bharadwaj Padmanabhan, Paul D. Franzon, Brian A. Floyd
2025 J jnl
Adaptive Linear Embedding for Nonstationary High-Dimensional Optimization.
CoRR
Yuejiang Wen, Paul D. Franzon
2024 J jnl
Can Low-Rank Knowledge Distillation in LLMs be Useful for Microelectronic Reasoning?
CoRR
Nirjhor Rouf, Fin Amin, Paul D. Franzon
2024 J jnl
Large Reasoning Models for 3D Floorplanning in EDA: Learning from Imperfections.
CoRR
Fin Amin, Nirjhor Rouf, Tse-Han Pan, Md Kamal Ibn Shafi, Paul D. Franzon
2024 — conf
Towards 3D AI Hardware: Fine-Grain Hardware Characterization of 3D Stacks for Heterogeneous System Integration & AI Systems.
3DIC
Eren Kurshan, Paul D. Franzon
2023 J jnl
A Deep Transfer Learning Design Rule Checker With Synthetic Training.
IEEE Des. Test
Luis Francisco, W. Rhett Davis, Paul D. Franzon
2023 — conf
Chiplet Set For Artificial Intelligence.
3DIC
Joshua A. Stevens, Tse-Han Pan, Prasanth Prabu Ravichandiran, Paul D. Franzon
2023 — conf
DepthGraphNet: Circuit Graph Isomorphism Detection via Siamese-Graph Neural Networks.
MLCAD
Fin Amin, Soumyadeep Chatterjee, Paul D. Franzon
2023 — conf
Thermal Cycling and Fatigue Life Analysis of a Laterally Conducting GaN-based Power Package.
3DIC
Pouria Zaghari, Sourish S. Sinha, Jong Eun Ryu, Paul D. Franzon, Douglas C. Hopkins
2023 — conf
Thermal Estimation for 3D-ICs Through Generative Networks.
3DIC
Priyank Kashyap, Prasanth Prabu Ravichandiran, Lee Wang, Dror Baron, Chau-Wai Wong, Tianfu Wu, Paul D. Franzon
2022 J jnl
Can Higher-Order Mutants Improve the Performance of Mutation-Based Fault Localization?
IEEE Trans. Reliab.
Haifeng Wang, Zheng Li, Yong Liu, Xiang Chen, Paul D. Franzon, Yuxiaoyang Cai, Luxi Fan
2022 J jnl
Design Obfuscation Through 3-D Split Fabrication With Smart Partitioning.
IEEE Trans. Very Large Scale Integr. Syst.
Theodros Nigussie, Joshua Schabel, Steve Lipa, Lisa G. McIlrath, Robert Patti, Paul D. Franzon
2022 Misc conf
FAXID: FPGA-Accelerated XGBoost Inference for Data Centers using HLS.
FCCM
Archit Gajjar, Priyank Kashyap, Aydin Aysu, Paul D. Franzon, Sumon Dey, Chris Cheng
2022 J jnl
Hardware Implementation of Hierarchical Temporal Memory Algorithm.
ACM J. Emerg. Technol. Comput. Syst.
Weifu Li, Paul D. Franzon, Sumon Dey, Joshua Schabel
2022 — conf
High Dimensional Optimization for Electronic Design.
MLCAD
Yuejiang Wen, Jacob Dean, Brian A. Floyd, Paul D. Franzon
2022 — conf
RxGAN: Modeling High-Speed Receiver through Generative Adversarial Networks.
MLCAD
Priyank Kashyap, Archit Gajjar, Yongjin Choi, Chau-Wai Wong, Dror Baron, Tianfu Wu, Chris Cheng, Paul D. Franzon
2021 J jnl
2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Priyank Kashyap, Furkan Aydin, Seetal Potluri, Paul D. Franzon, Aydin Aysu
2021 — conf
A Review of 3D-Dynamic Random-Access Memory based Near-Memory Computation.
3DIC
Prasanth Prabu Ravichandiran, Paul D. Franzon
2021 J jnl
A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm.
ACM J. Emerg. Technol. Comput. Syst.
Sumon Dey, Lee Baker, Joshua Schabel, Weifu Li, Paul D. Franzon
2021 A conf
Fast and Accurate PPA Modeling with Transfer Learning.
ICCAD
W. Rhett Davis, Paul D. Franzon, Luis Francisco, Billy Huggins, Rajeev Jain
2021 — conf
Fast and Accurate PPA Modeling with Transfer Learning.
MLCAD
Luis Francisco, Paul D. Franzon, W. Rhett Davis
2021 — conf
Multi-ANN embedded system based on a custom 3D-DRAM.
3DIC
Lee Baker, Robert Patti, Paul D. Franzon
2020 — conf
Application of Quantum Machine Learning to VLSI Placement.
MLCAD
Isaac Turtletaub, George Li, Mohannad Ibrahim, Paul D. Franzon
2020 — conf
DeePar-SCA: Breaking Parallel Architectures of Lattice Cryptography via Learning Based Side-Channel Attacks.
SAMOS
Furkan Aydin, Priyank Kashyap, Seetal Potluri, Paul D. Franzon, Aydin Aysu
2020 — conf
Design Rule Checking with a CNN Based Feature Extractor.
MLCAD
Luis Francisco, Tanmay Lagare, Arpit Jain, Somal Chaudhary, Madhura Kulkarni, Divya Sardana, W. Rhett Davis, Paul D. Franzon
2020 J jnl
Design Rule Checking with a CNN Based Feature Extractor.
CoRR
Luis Francisco, Tanmay Lagare, Arpit Jain, Somal Chaudhary, Madhura Kulkarni, Divya Sardana, W. Rhett Davis, Paul D. Franzon
2020 A conf
Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-.
ICCAD
Francesco Regazzoni, Shivam Bhasin, Amir Alipour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul D. Franzon, David Hély, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena-Ioana Vatajelu, Ville Yli-Mäyry
2020 J jnl
Multi-Fidelity Surrogate-Based Optimization for Electromagnetic Simulation Acceleration.
ACM Trans. Design Autom. Electr. Syst.
Yi Wang, Paul D. Franzon, David Smart, Brian Swahn
2019 J jnl
3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jong Beom Park, William Rhett Davis, Paul D. Franzon
2019 — conf
An Application Specific Processor Architecture with 3D Integration for Recurrent Neural Networks.
ISQED
Sumon Dey, Paul D. Franzon
2019 J jnl
Appliance Identification Algorithm for a Non-Intrusive Home Energy Monitor Using Cogent Confabulation.
IEEE Trans. Smart Grid
Sung-Wook Park, Lee Baker, Paul D. Franzon
2019 — conf
Estimating Pareto Optimum Fronts to Determine Knob Settings in Electronic Design Automation Tools.
ISQED
Billy Huggins, W. Rhett Davis, Paul D. Franzon
2019 — conf
Improved Numerical Methodologies on Power System Dynamic Simulation Using GPU Implementation.
ISGT
Zhao Wang, Aranya Chakrabortty, C. T. Kelley, Xiaoming Feng, Paul D. Franzon
2019 — conf
Vertical Stack Thermal Characterization of Heterogeneous Integration and Packages.
3DIC
T. Robert Harris, W. Rhett Davis, Steven Lipa, W. Shepherd Pitts, Paul D. Franzon
2018 J jnl
Exploring the Tradeoffs of Application-Specific Processing.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Joshua Schabel, Paul D. Franzon
2018 J jnl
RF-Only Logic: an Area Efficient Logic Family for RF-Power Harvesting Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wenxu Zhao, Peter Gadfort, Kirti Bhanushali, Paul D. Franzon
2017 — conf
A robust calibration and supervised machine learning reliability framework for digitally-assisted self-healing RFICs.
MWSCAS
Eric J. Wyers, Weiyi Qi, Paul D. Franzon
2017 J jnl
Corrections to "Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding".
IEEE Trans. Very Large Scale Integr. Syst.
HoonSeok Kim, Chanyoun Won, Paul D. Franzon
2017 C conf
H3 (Heterogeneity in 3D): A Logic-on-Logic 3D-Stacked Heterogeneous Multi-Core Processor.
ICCD
Vinesh Srinivasan, Rangeen Basu Roy Chowdhury, Elliott Forbes, Randy Widialaksono, Zhenqian Zhang, Joshua Schabel, Sungkwan Ku, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
2016 J jnl
A Generally Applicable Calibration Algorithm for Digitally Reconfigurable Self-Healing RFICs.
IEEE Trans. Very Large Scale Integr. Syst.
Eric J. Wyers, Matthew A. Morton, T. C. L. Gerhard Sollner, C. T. Kelley, Paul D. Franzon
2016 — conf
Design and ASIC acceleration of cortical algorithm for text recognition.
SoCC
Sumon Dey, Paul D. Franzon
2016 — conf
Design of a rectifier-free UHF Gen-2 compatible RFID Tag using RF-only logic.
IEEE RFID
Wenxu Zhao, Kirti Bhanushali, Paul D. Franzon
2016 — conf
Hardware implementation of Hierarchical Temporal Memory algorithm.
SoCC
Weifu Li, Paul D. Franzon
2016 — conf
Physical design of a 3D-stacked heterogeneous multi-core processor.
3DIC
Randy Widialaksono, Rangeen Basu Roy Chowdhury, Zhenqian Zhang, Joshua Schabel, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
2016 — conf
Processor-in-memory support for artificial neural networks.
ICRC
Joshua Schabel, Lee Baker, Sumon Dey, Weifu Li, Paul D. Franzon
2015 — conf
Characterization of the mechanical stress impact on device electrical performance in the CMOS and III-V HEMT/HBT heterogeneous integration environment.
3DIC
Eric J. Wyers, T. Robert Harris, Wallace Shep Pitts, Jordan E. Massad, Paul D. Franzon
2015 — conf
Computing in 3D.
3DIC
Paul D. Franzon, Eric Rotenberg, James Tuck, W. Rhett Davis, Huiyang Zhou, Joshua Schabel, Zhenqian Zhang, J. Brandon Dwiel, Elliott Forbes, Joonmoo Huh, Marcus Tshibangu, Steve Lipa
2015 — conf
Computing in 3D.
CICC
Paul D. Franzon, Eric Rotenberg, James Tuck, W. Rhett Davis, Huiyang Zhou, Joshua Schabel, Zhenqian Zhang, J. Brandon Dwiel, Elliott Forbes, Joonmoo Huh, Steve Lipa
2015 — conf
Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks.
3DIC
T. Robert Harris, Eric J. Wyers, Lee Wang, Samuel Graham, Georges Pavlidis, Paul D. Franzon, W. Rhett Davis
2015 — conf
Under 100-cycle thread migration latency in a single-ISA heterogeneous multi-core processor.
Hot Chips Symposium
Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Brandon H. Dwiel, Rangeen Basu Roy Chowdhury, Vinesh Srinivasan, Steve Lipa, Eric Rotenberg, W. Rhett Davis, Paul D. Franzon
2014 — conf
3D-enabled customizable embedded computer (3DECC).
3DIC
Paul D. Franzon, Eric Rotenberg, James Tuck, Huiyang Zhou, W. Rhett Davis, Hongwen Dai, Joonmoo Huh, Sungkwan Ku, Steve Lipa, Chao Li, Jong Beom Park, Joshua Schabel
2014 J jnl
A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory.
IEEE Trans. Very Large Scale Integr. Syst.
Ojas A. Bapat, Paul D. Franzon, Richard M. Fastow
2014 — conf
Leveraging 3D-IC for on-chip timing uncertainty measurements.
3DIC
Randy Widialaksono, Wenxu Zhao, W. Rhett Davis, Paul D. Franzon
2014 — conf
Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC.
ICICDT
Shivam Priyadarshi, W. Rhett Davis, Paul D. Franzon
2014 — conf
Thermal effects of heterogeneous interconnects on InP / GaN / Si diverse integrated circuits.
3DIC
T. Robert Harris, Paul D. Franzon, W. Rhett Davis, Lee Wang
2013 J jnl
A Bounded and Discretized Nelder-Mead Algorithm Suitable for RFIC Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap.
Eric J. Wyers, Michael B. Steer, C. T. Kelley, Paul D. Franzon
2013 J jnl
Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding.
IEEE Trans. Very Large Scale Integr. Syst.
HoonSeok Kim, Chanyoun Won, Paul D. Franzon
2013 — conf
Design of 60 GHz contactless probe system for RDL in passive silicon interposer.
3DIC
Edward J. Suh, Paul D. Franzon
2013 — conf
Design of controller for L2 cache mapped in Tezzaron stacked DRAM.
3DIC
Nyunyi M. Tshibangu, Paul D. Franzon, Eric Rotenberg, William Rhett Davis
2013 C conf
Exploring early design tradeoffs in 3DIC.
ISCAS
Paul D. Franzon, Shivam Priyadarshi, Steve Lipa, W. Rhett Davis, Thorlindur Thorolfsson
2013 — conf
Face-to-face bus design with built-in self-test in 3D ICs.
3DIC
Zhenqian Zhang, Brandon Noia, Krishnendu Chakrabarty, Paul D. Franzon
2013 — conf
Hetero
ISQED
Shivam Priyadarshi, Niket K. Choudhary, Brandon H. Dwiel, Ankita Upreti, Eric Rotenberg, William Rhett Davis, Paul D. Franzon
2013 — conf
MOOCs, OOCs, flips and hybrids: The new world of higher education.
MSE
Paul D. Franzon
2013 C conf
Rationale for a 3D heterogeneous multi-core processor.
ICCD
Eric Rotenberg, Brandon H. Dwiel, Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Rangeen Basu Roy Chowdhury, Nyunyi M. Tshibangu, Steve Lipa, W. Rhett Davis, Paul D. Franzon
2013 — conf
TSV-based, modular and collision detectable face-to-back shared bus design.
3DIC
Zhenqian Zhang, Paul D. Franzon
2013 — conf
Thermal requirements in future 3D processors.
3DIC
Paul D. Franzon, Avi Bar-Cohen
2012 — conf
A 10.35 mW/GFlop stacked SAR DSP unit using fine-grain partitioned 3D integration.
CICC
Thorlindur Thorolfsson, Steve Lipa, Paul D. Franzon
2012 C conf
A novel double floating-gate unified memory device.
VLSI-SoC
Neil Di Spigna, Daniel Schinke, Srikant Jayanti, Veena Misra, Paul D. Franzon
2012 J jnl
Comparing Through-Silicon-Via (TSV) Void/Pinhole Defect Self-Test Methods.
J. Electron. Test.
Yi Lou, Zhuo Yan, Fan Zhang, Paul D. Franzon
2012 J jnl
Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels.
IET Circuits Devices Syst.
Shivam Priyadarshi, T. Robert Harris, Samson Melamed, Carlos Tadeo Ortega Otero, Nikhil Kriplani, Carlos E. Christoffersen, Rajit Manohar, Steven R. Dooley, W. Rhett Davis, Paul D. Franzon, Michael B. Steer
2012 J jnl
Junction-Level Thermal Analysis of 3-D Integrated Circuits Using High Definition Power Blurring.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Samson Melamed, Thorlindur Thorolfsson, T. Robert Harris, Shivam Priyadarshi, Paul D. Franzon, Michael B. Steer, W. Rhett Davis
2012 J jnl
Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shivam Priyadarshi, Christopher S. Saunders, Nikhil Kriplani, Harun Demircioglu, W. Rhett Davis, Paul D. Franzon, Michael B. Steer
2012 — conf
Process mismatch analysis based on reduced-order models.
ISQED
Mustafa Berke Yelten, Paul D. Franzon, Michael B. Steer
2012 — conf
Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates.
VLSI-SoC (Selected Papers)
Neil Di Spigna, Daniel Schinke, Srikant Jayanti, Veena Misra, Paul D. Franzon
2012 J jnl
Surrogate Model-Based Self-Calibrated Design for Process and Temperature Compensation in Analog/RF Circuits.
IEEE Des. Test
Ting Zhu, Michael B. Steer, Paul D. Franzon
2011 — conf
3D Specific Systems: Design and CAD.
Asian Test Symposium
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed
2011 — conf
3D specific systems design and CAD.
ICSAMOS
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed
2011 C conf
Application of Surrogate Modeling in Variation-aware Macromodel and Circuit Design.
SIMULTECH
Ting Zhu, Mustafa Berke Yelten, Michael B. Steer, Paul D. Franzon
2011 J jnl
Computing with Novel Floating-Gate Devices.
Computer
Daniel Schinke, Neil Di Spigna, M. Shiveshwarkar, Paul D. Franzon
2011 — conf
Coordinating 3D designs: Interface IP, standards or free form?
3DIC
Paul D. Franzon, W. Rhett Davis, Zheng Zhou, Shivam Priyadarshi, Matthew Hogan, Tanay Karnik, Ganapati Srinavasa
2011 — ch.
Design and Computer Aided Design of 3DIC.
3D Integration for NoC-based SoC Architectures
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson
2011 A conf
Low power interconnect design for fpgas with bidirectional wiring using nanocrystal floating gate devices (abstract only).
FPGA
Daniel Schinke, Wallace Shep Pitts, Neil Di Spigna, Paul D. Franzon
2011 — conf
Modeling and compare of through-silicon-via (TSV) in high frequency.
3DIC
Ran Wang, Gary Charles, Paul D. Franzon
2011 — conf
Pathfinder 3D: A flow for system-level design space exploration.
3DIC
Shivam Priyadarshi, Jianchen Hu, Won Ha Choi, Samson Melamed, Xi Chen, W. Rhett Davis, Paul D. Franzon
2011 J jnl
Reconfigurable five-layer three-dimensional integrated memory-on-logic synthetic aperture radar processor.
IET Comput. Digit. Tech.
Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon
2011 J jnl
SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation.
IET Circuits Devices Syst.
Daniel Schinke, Shivam Priyadarshi, W. Shepherd Pitts, Neil Di Spigna, Paul D. Franzon
2011 — conf
Variation-Aware Circuit Macromodeling and Design Based on Surrogate Models.
SIMULTECH (Selected Papers)
Ting Zhu, Mustafa Berke Yelten, Michael B. Steer, Paul D. Franzon
2010 A conf
Creating 3D specific systems: Architecture, design and CAD.
DATE
Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson
2010 — conf
Logic-on-logic 3D integration and placement.
3DIC
Thorlindur Thorolfsson, Guojie Luo, Jason Cong, Paul D. Franzon
2010 J jnl
Low-Power Hypercube Divided Memory FFT Engine Using 3D Integration.
ACM Trans. Design Autom. Electr. Syst.
Thorlindur Thorolfsson, Samson Melamed, W. Rhett Davis, Paul D. Franzon
2010 — conf
The NCSU Tezzaron design kit.
3DIC
Steve Lipa, Thorlindur Thorolfsson, Paul D. Franzon
2010 — conf
Thermal isolation in 3D chip stacks using vacuum gaps and capacitive or inductive communications.
3DIC
Paul D. Franzon, John M. Wilson, Ming Li
2009 J jnl
A 32-Gb/s On-Chip Bus With Driver Pre-Emphasis Signaling.
IEEE Trans. Very Large Scale Integr. Syst.
Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon
2009 A conf
A low power 3D integrated FFT engine using hypercube memory division.
ISLPED
Thorlindur Thorolfsson, Nariman Moezzi Madani, Paul D. Franzon
2009 — conf
An enhanced macromodeling approach for differential output drivers.
BMAS
Ting Zhu, Paul D. Franzon
2009 J jnl
Application Exploration for 3-D Integrated Circuits: TCAM, FIFO, and FFT Case Studies.
IEEE Trans. Very Large Scale Integr. Syst.
William Rhett Davis, Eun Chu Oh, Ambarish M. Sule, Paul D. Franzon
2009 — conf
Comparative analysis of two 3D integration implementations of a SAR processor.
3DIC
Thorlindur Thorolfsson, Samson Melamed, Gary Charles, Paul D. Franzon
2009 A* conf
Design automation for a 3DIC FFT processor for synthetic aperture radar: a case study.
DAC
Thorlindur Thorolfsson, Kiran Gonsalves, Paul D. Franzon
2009 — conf
Junction-level thermal extraction and simulation of 3DICs.
3DIC
Samson Melamed, Thorlindur Thorolfsson, Adi Srinivasan, Edmund Cheng, Paul D. Franzon, William Rhett Davis
2009 — conf
Technology impact analysis for 3D TCAM.
3DIC
Eun Chu Oh, Paul D. Franzon
2009 — conf
Through Silicon Via(TSV) defect/pinhole self test circuit for 3D-IC.
3DIC
Menglin Tsai, Amy Klooz, Alexander Leonard, Jennie Appel, Paul D. Franzon
2008 A* conf
Design and CAD for 3D integrated circuits.
DAC
Paul D. Franzon, W. Rhett Davis, Michael B. Steer, Steve Lipa, Eun Chu Oh, Thorlindur Thorolfsson, Samson Melamed, Sonali Luniya, Tad Doxsee, Stephen Berkeley, Ben Shani, Kurt Obermiller
2008 J jnl
Editorial: Special issue on 3D integrated circuits and microarchitectures.
ACM J. Emerg. Technol. Comput. Syst.
Yuan Xie, Jason Cong, Paul D. Franzon
2008 A* conf
Keeping hot chips cool: are IC thermal problems hot air?
DAC
Ruchir Puri, Devadas Varma, Darvin Edwards, Alan J. Weger, Paul D. Franzon, Andrew Yang, Stephen V. Kosonocky
2007 — conf
Design Considerations and Benefits of Three-Dimensional Ternary Content Addressable Memory.
CICC
Eun Chu Oh, Paul D. Franzon
2007 C conf
Flexible Low Power Probability Density Estimation Unit For Speech Recognition.
ISCAS
Ullas Pazhayaveetil, Dhruba Chandra, Paul D. Franzon
2007 — conf
FreePDK: An Open-Source Variation-Aware Design Kit.
MSE
James E. Stine, Ivan D. Castellanos, Michael H. Wood, Jeff Henson, Fred Love, W. Rhett Davis, Paul D. Franzon, Michael Bucher, Sunil Basavarajaiah, Julie Oh, Ravi Jenkal
2007 C conf
Hardware Architecture of a Parallel Pattern Matching Engine.
ISCAS
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franzon
2007 J jnl
SOI CMOS Implementation of a Multirate PSK Demodulator for Space Communications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mehmet Rasit Yuce, Wentai Liu, John Damiano, Bhaskar Bharath, Paul D. Franzon, Numan Sadi Dogan
2007 J jnl
Voltage-Mode Driver Preemphasis Technique For On-Chip Global Buses.
IEEE Trans. Very Large Scale Integr. Syst.
Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon
2006 J jnl
3 gb/s AC coupled chip-to-chip communication using a low swing pulse receiver.
IEEE J. Solid State Circuits
Lei Luo, John M. Wilson, Stephen E. Mick, Jian Xu, Liang Zhang, Paul D. Franzon
2006 — conf
A 32Gb/s On-chip Bus with Driver Pre-emphasis Signaling.
CICC
Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon
2006 — conf
A 36Gb/s ACCI Multi-Channel Bus using a Fully Differential Pulse Receiver.
CICC
Lei Luo, John M. Wilson, Stephen E. Mick, Jian Xu, Liang Zhang, Evan Erickson, Paul D. Franzon
2006 — conf
Architecture for Low Power Large Vocabulary Speech Recognition.
SoCC
Dhruba Chandra, Ullas Pazhayaveetil, Paul D. Franzon
2006 — conf
Controlled nanowire fabrication by PEDAL process.
Nano-Net
Sachin Sonkusale, Paul D. Franzon
2005 J jnl
Configurable string matching hardware for speeding up intrusion detection.
SIGARCH Comput. Archit. News
Monther Aldwairi, Thomas M. Conte, Paul D. Franzon
2005 J jnl
Demystifying 3D ICs: The Pros and Cons of Going Vertical.
IEEE Des. Test Comput.
W. Rhett Davis, John M. Wilson, Stephen E. Mick, Jian Xu, Hao Hua, Christopher Mineo, Ambarish M. Sule, Michael B. Steer, Paul D. Franzon
2005 A conf
Driver pre-emphasis techniques for on-chip global buses.
ISLPED
Liang Zhang, John M. Wilson, Rizwan Bashirullah, Lei Luo, Jian Xu, Paul D. Franzon
2005 — conf
Impact of an SoC Research Project on Microelectronics Education: A Case Study.
MSE
Numan Sadi Dogan, Paul D. Franzon, Wentai Liu
2005 C conf
Molecular Electronics - Devices and Circuits Technology.
VLSI-SoC
Paul D. Franzon, David Nackashi, Christian Amsinck, Neil Di Spigna, Sachin Sonkusale
2004 — conf
Simplified delay design guidelines for on-chip global interconnects.
ACM Great Lakes Symposium on VLSI
Liang Zhang, Wentai Liu, Rizwan Bashirullah, John M. Wilson, Paul D. Franzon
2004 A* conf
The Design, Fabrication, and Characterization of Millimeter Scale Motors for Miniature Direct Drive Robots.
ICRA
J. A. Palmer, James F. Mulling, Brian Dessent, Edward Grant, Jeffrey W. Eischen, Alexei Gruverman, A. I. Kingon, Paul D. Franzon
2004 — conf
The performance and experimental results of a multiple bit rate symbol timing recovery circuit for PSK receivers.
CICC
Mehmet R. Yuce, Wentai Liu, Bhaskar Bharath, John Damiano, Paul D. Franzon
2003 — conf
A low power PSK receiver for space applications in 0.35-μm SOI CMOS.
CICC
Mehmet R. Yuce, Wentai Liu, John Damiano, Bhaskar Bharath, Paul D. Franzon, Numan Sadi Dogan
2003 J jnl
Molecular electronics: from devices and interconnect to circuits and architecture.
Proc. IEEE
Mircea R. Stan, Paul D. Franzon, Seth Copen Goldstein, John C. Lach, Matthew M. Ziegler
2002 — conf
4 Gbps high-density AC coupled interconnection.
CICC
Stephen E. Mick, John M. Wilson, Paul D. Franzon
2002 B conf
Binary search schemes for fast IP lookups.
GLOBECOM
Pronita Mehrotra, Paul D. Franzon
2002 J jnl
Novel hardware architecture for fast address lookups.
IEEE Commun. Mag.
Pronita Mehrotra, Paul D. Franzon
2001 A conf
Will Nanotechnology Change the Way We Design and Verify Systems? (Panel).
ICCAD
Andreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis
1999 A conf
Dynamically Programmable Cache Evaluation and Virtualization.
FPGA
Mouna Nakkar, David G. Bentlage, John Harding, David Schwartz, Paul D. Franzon, Thomas M. Conte
1999 — conf
MEMS-Based Capacitor Arrays for Programmable Interconnect and RF Applications.
ARVLSI
B. E. Duewer, John M. Wilson, D. A. Winick, Paul D. Franzon
1999 A* conf
Parasitic Extraction Accuracy - How Much is Enough?
DAC
Paul D. Franzon, Mark Basel, Aki Fujimara, Sharad Mehrotra, Ron Preston, Robin C. Sarma, Marty Walker
1999 — conf
The NCSU Cadence Design Kit for IC Fabrication through MOSIS.
MSE
Toby Schaffer, Andy Stanaski, Alan Glaser, Paul D. Franzon
1997 J jnl
Clocking Optimization and Distribution in Digital Systems with Scheduled Skews.
J. VLSI Signal Process.
Hong-Yean Hsieh, Wentai Liu, Paul D. Franzon, Ralph K. Cavin III
1997 A conf
Low power data processing by elimination of redundant computations.
ISLPED
Mir Azam, Paul D. Franzon, Wentai Liu
1995 J jnl
Energy consumption modeling and optimization for SRAM's.
IEEE J. Solid State Circuits
Robert J. Evans, Paul D. Franzon
1995 A* conf
Performance Driven Global Routing and Wiring Rule Generation for High Speed PCBs and MCMs.
DAC
Sharad Mehrotra, Paul D. Franzon, Michael B. Steer
1994 J jnl
Energy control and accurate delay estimation in the design of CMOS buffers.
IEEE J. Solid State Circuits
Sha Ma, Paul D. Franzon
1994 A* conf
Stochastic Optimization Approach to Transistor Sizing for CMOS VLSI Circuits.
DAC
Sharad Mehrotra, Paul D. Franzon, Wentai Liu
1993 J jnl
A Multichip Module Design Process for Notebook Computers.
Computer
Paul D. Franzon, Robert J. Evans
1993 — conf
A simple method for noise tolerance characterization of digital circuits.
Great Lakes Symposium on VLSI
Slobodan Simovich, Paul D. Franzon, Michael B. Steer
1993 C conf
System-Level Specification of Instruction Sets.
ICCD
Todd A. Cook, Paul D. Franzon, Edwin A. Harcourt, Thomas K. Miller III
1992 — conf
An efficient table-driven decoder for one-half rate convolutional codes.
ACM Southeast Regional Conference
Ajay Dholakia, T. M. Lee, Donald L. Bitzer, Mladen A. Vouk, L. Wang, Paul D. Franzon
1992 A* conf
Tools to Aid in Wiring Rule Generation for High Speed Interconnects.
DAC
Paul D. Franzon, Slobodan Simovich, Michael B. Steer, Mark Basel, Sharad Mehrotra, Tom Mills
1990 J jnl
Scalable VLSI implementations for neural networks.
J. VLSI Signal Process.
David E. van den Bout, Paul D. Franzon, John J. Paulos, Thomas K. Miller III, Wesley E. Snyder, H. Troy Nagle, Wentai Liu
1987 J jnl
FIR digital filters for high sample rate applications.
IEEE Commun. Mag.
Stuart K. Tewksbury, Mehdi Hatamian, Paul D. Franzon, Larry A. Hornak, Curtis A. Siller Jr., Victor B. Lawrence