Parthasarathi Dasgupta

64 papers A 2C 5Misc 8Journal 11Unranked 38

Year	Rank	Type	Title / Venue / Authors
2016	C	`conf`	A rule-based approach for minimizing power dissipation of digital circuits. DDECS Subrata Das, Parthasarathi Dasgupta, Petr Fiser, Sudip Ghosh, Debesh Kumar Das
2016	—	`conf`	Delay Estimates for Graphene Nanoribbons: A Novel Measure of Fidelity and Experiments with Global Routing Trees. ACM Great Lakes Symposium on VLSI Subrata Das, Soma Das, Adrija Majumder, Parthasarathi Dasgupta, Debesh Kumar Das
2016	—	`conf`	Double Patterning Lithography (DPL)-compliant layout construction (DCLC) with area-stitch usage tradeoff. VDAT Debasis Pal, Abir Pramanik, Parthasarathi Dasgupta, Debesh Kumar Das
2016	J	`jnl`	Efficient two phase heuristic routing technique for digital microfluidic biochip. IET Comput. Digit. Tech. Sarit Chakraborty, Susanta Chakraborty, Chandan Das, Parthasarathi Dasgupta
2016	J	`jnl`	Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips. IEEE Trans. Very Large Scale Integr. Syst. Pranab Roy, Swati Saha, Hafizur Rahaman, Parthasarathi Dasgupta
2015	—	`conf`	3D integration in biochips: New proposed architectures for 3D applications in ATDA based digital microfluidic biochips. DTIS Pranab Roy, Pampa Howladar, Raja Dastidar, Hafizur Rahaman, Parthasarathi Dasgupta
2015	—	`conf`	A novel two phase heuristic routing technique in digital microfluidic biochip. VDAT Sarit Chakraborty, Chandan Das, Susanta Chakraborty, Parthasarathi Dasgupta
2014	Misc	`conf`	A Novel Wire Planning Technique for Optimum Pin Utilization in Digital Microfluidic Biochips. VLSID Pranab Roy, Samadrita Bhattacharya, Rupam Bhattacharyay, Firdousi Jamil Imam, Hafizur Rahaman, Parthasarathi Dasgupta
2014	C	`conf`	A layout based customized testing technique for total microfluidic operations in digital microfluidic biochips. DDECS Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2014	—	`conf`	A new technique for layout based functional testing of modules in Digital Microfluidic Biochips. EWDTS Pranab Roy, Samadrita Bhattacharya, Hafizur Rahaman, Parthasarathi Dasgupta
2014	J	`jnl`	Algorithms for rotation symmetric Boolean functions. Int. J. Inf. Coding Theory Subrata Das, Satrajit Ghosh, Parthasarathi Dasgupta, Samar Sen-Sarma
2014	C	`conf`	Automated two stage detection and analyzer system in multipartitioned Digital Microfluidic Biochips. ISCAS Pranab Roy, Aatreyi Bal, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2014	—	`conf`	Multilevel Homogeneous Detection Analyzer for Medical Diagnostic Application in Digital Microfluidic Biochips. ISED Pranab Roy, Tamosa Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta
2013	—	`conf`	A New Method for Route Based Synthesis and Placement in Digital Microfluidic Biochips. VDAT Pranab Roy, Samadrita Bhattacharya, Hafizur Rahaman, Parthasarathi Dasgupta
2013	—	`conf`	A new cross contamination aware routing method with intelligent path exploration in digital microfluidic biochips. DTIS Pranab Roy, Pampa Howladar, Rupam Bhattacharjee, Hafizur Rahaman, Parthasarathi Dasgupta
2013	—	`conf`	A new customized testing technique using a novel design of droplet motion detector for digital microfluidic Biochip systems. ICACCI Pranab Roy, Hafizur Rahaman, Partha Sarathi Gupta, Parthasarathi Dasgupta
2013	—	`conf`	A ranking algorithm for online social network search. COMPUTE Divya Sharma, Akz Alam, Parthasarathi Dasgupta, Debashis Saha
2013	—	`conf`	An Intelligent Biochip System for Diagnostic Process Flow Based Integration of Combined Detection Analyzer. ISED Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2013	C	`conf`	Digital microfluidic system: A new design for heterogeneous sample based integration of multiple DMFBs. ISCAS Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2013	—	`conf`	Novel designs of digital detection analyzer for intelligent detection and analysis in digital microfluidic biochips. IDT Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2013	J	`jnl`	Optimization algorithms for the design of digital microfluidic biochips: A survey. Comput. Electr. Eng. Indrajit Pan, Ritwik Mukherjee, Hafizur Rahaman, Tuhina Samanta, Parthasarathi Dasgupta
2012	Misc	`conf`	A Heuristic Method for Co-optimization of Pin Assignment and Droplet Routing in Digital Microfluidic Biochip. VLSI Design Ritwik Mukherjee, Hafizur Rahaman, Indrajit Banerjee, Tuhina Samanta, Parthasarathi Dasgupta
2012	—	`conf`	A New Algorithm for Routing-Aware Net Placement in Cross-Referencing Digital Microfluidic Biochips. ISVLSI Pranab Roy, Rupam Bhattacharjee, Hafizur Rahaman, Parthasarathi Dasgupta
2012	—	`conf`	A New Look Ahead Technique for Customized Testing in Digital Microfluidic Biochips. Asian Test Symposium Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta, Bhargab B. Bhattacharya
2012	—	`conf`	A heuristic method for obstacle avoiding group Steiner tree construction. SLIP Tuhina Samanta, Raka Sardar, Hafizur Rahaman, Parthasarathi Dasgupta, Bhargab B. Bhattacharya
2012	—	`conf`	A new digital analyzer for optically detected samples in Digital Microfluidic Biochips. MWSCAS Pranab Roy, Sudipta Chakraborty, Moudud Sohid, Hafizur Rahaman, Parthasarathi Dasgupta
2012	Misc	`conf`	An intelligent compaction technique for pin constrained routing in cross referencing digital microfluidic biochips. CODES+ISSS Pranab Roy, Rupam Bhattacharjee, Modud Sohid, Sudipta Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta
2012	—	`conf`	Arithmetic Algorithms for Ternary Number System. VDAT Subrata Das, Parthasarathi Dasgupta, Samar Sen-Sarma
2012	—	`conf`	Partitioning-based wirelength estimation technique for Y-routing. SBCCI Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2012	—	`conf`	Simulation Study of an Ultra Thin Body Silicon On Insulator Tunnel Field Effect Transistor. VDAT Partha Sarathi Gupta, Sayan Kanungo, Hafizur Rahaman, Parthasarathi Dasgupta
2012	—	`conf`	System on Biochips: A New Design for Integration of Multiple DMFBs. ISED Pranab Roy, Moudud Sohid, Sudipta Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta
2012	J	`jnl`	Two-level clustering-based techniques for intelligent droplet routing in digital microfluidic biochips. Integr. Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2011	—	`conf`	A Best Path Selection Based Parallel Router for DMFBs. ISED Pranab Roy, Hafizur Rahaman, Rupam Bhattacharya, Parthasarathi Dasgupta
2011	—	`conf`	A Group-Preferential Parallel-Routing Algorithm for Cross-Referencing Digital Microfluidic Biochips. ISVLSI Pranab Roy, Rajesh Mandal, Hafizur Rahaman, Parthasarathi Dasgupta
2011	—	`conf`	A Multi-pin Droplet Routing Algorithm for Digital Microfluidic Biochips. BIODEVICES Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2011	—	`conf`	Ant Colony Optimization Based Droplet Routing Technique in Digital Microfluidic Biochip. ISED Indrajit Pan, Parthasarathi Dasgupta, Hafizur Rahaman, Tuhina Samanta
2011	—	`conf`	Crosstalk aware coupled line delay tree construction for on-chip interconnects. ISQED Tuhina Samanta, Sanoara Khatun, Hafizur Rahaman, Parthasarathi Dasgupta
2011	—	`conf`	Fast high-performance algorithms for multi-pin droplet routing in digital microfluidic biochips. ACM Great Lakes Symposium on VLSI Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2011	J	`jnl`	Near-optimal Y-routed delay trees in nanometric interconnect design. IET Comput. Digit. Tech. Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2011	—	`conf`	Obstacle Aware Routing in 3D Integrated Circuits. ADCONS Prasun Ghosal, Hafizur Rahaman, Satrajit Das, Arindam Das, Parthasarathi Dasgupta
2010	—	`conf`	A novel droplet routing algorithm for digital microfluidic biochips. ACM Great Lakes Symposium on VLSI Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2010	—	`conf`	Minimizing Thermal Disparities during Placement in 3D ICs. CSE Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2009	Misc	`conf`	A Method for the Multi-Net Multi-Pin Routing Problem with Layer Assignment. VLSI Design Tuhina Samanta, Hafizur Rahaman, Prasun Ghosal, Parthasarathi Dasgupta
2009	—	`conf`	An internet-based IP protection scheme for circuit designs using linear feedback shift register (LFSR)-based locking. SBCCI Raju Halder, Parthasarathi Dasgupta, Saptarshi Naskar, Samar Sen-Sarma
2009	J	`jnl`	MAkE: Multiobjective algorithm for k-way equipartitioning of a point set. Appl. Soft Comput. Sriparna Saha, Susmita Sur-Kolay, Parthasarathi Dasgupta, Sanghamitra Bandyopadhyay
2008	—	`conf`	Revisiting fidelity: a case of elmore-based Y-routing trees. SLIP Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2008	—	`conf`	Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations. ISVLSI Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2007	—	`conf`	A Novel Scheme for Encoding and Watermark Embedding in VLSI Physical Design for IP Protection. ICCTA Debasri Saha, Parthasarathi Dasgupta, Susmita Sur-Kolay, Samar Sen-Sarma
2007	—	`conf`	Minimum-Congestion Placement for Y-interconnects: Some studies and observations. ISVLSI Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2006	C	`conf`	A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI. ISCAS Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2006	Misc	`conf`	Linear Required-Arrival-Time Trees and their Construction. VLSI Design Parthasarathi Dasgupta, Prashant Yadava
2006	—	`conf`	Multiobjective Genetic Algorithm for k-way Equipartitioning of a Point Set with Application to CAD-VLSI. ICIT Sriparna Saha, Susmita Sur-Kolay, Sanghamitra Bandyopadhyay, Parthasarathi Dasgupta
2005	—	`conf`	Recent Trends in the Application of Meta-Heuristics to VLSI Layout Design. IICAI Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2005	Misc	`conf`	Revisiting VLSI Interconnects in Deep Sub-Micron: Some Open Questions. VLSI Design Parthasarathi Dasgupta
2004	Misc	`conf`	Physical Design Trends and Layout-Based Fault Modeling. VLSI Design Susmita Sur-Kolay, Parthasarathi Dasgupta, Bhargab B. Bhattacharya, Sujit T. Zachariah
2003	A	`conf`	A Novel Metric for Interconnect Architecture Performance. DATE Parthasarathi Dasgupta, Andrew B. Kahng, Swamy Muddu
2003	—	`conf`	Range-Based Discrepancy Search with Applications to VLSI Design. IICAI Parthasarathi Dasgupta
2002	J	`jnl`	Monotone bipartitioning problem in a planar point set with applications to VLSI. ACM Trans. Design Autom. Electr. Syst. Parthasarathi Dasgupta, Peichen Pan, Subhas C. Nandy, Bhargab B. Bhattacharya
2001	J	`jnl`	Searching networks with unrestricted edge costs. IEEE Trans. Syst. Man Cybern. Part A Parthasarathi Dasgupta, Anup K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya
2001	J	`jnl`	Slicible rectangular graphs and their optimal floorplans. ACM Trans. Design Autom. Electr. Syst. Parthasarathi Dasgupta, Susmita Sur-Kolay
1998	J	`jnl`	A unified approach to topology generation and optimal sizing of floorplans. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya
1997	—	`conf`	Slicibility of rectangular graphs and floorplan optimization. ISPD Parthasarathi Dasgupta, Susmita Sur-Kolay
1996	Misc	`conf`	Geometric bipartitioning problem and its applications to VLSI. VLSI Design Parthasarathi Dasgupta, Anup K. Sen, Subhas C. Nandy, Bhargab B. Bhattacharya
1995	A	`conf`	A unified approach to topology generation and area optimization of general floorplans. ICCAD Parthasarathi Dasgupta, Susmita Sur-Kolay, Bhargab B. Bhattacharya