Partha Sharathi Mallick

17 papers Misc 1Journal 14Unranked 2
YearRankTypeTitle / Venue / Authors
2020 J jnl
Geometry-Based Crosstalk Reduction in CNT Interconnects.
J. Circuits Syst. Comput.
Piratla Uma Sathyakam, Partha Sharathi Mallick, Paridhi Singh
2019 J jnl
High-speed sub-threshold operation of carbon nanotube interconnects.
IET Circuits Devices Syst.
Piratla Uma Sathyakam, Partha Sharathi Mallick, Anmol Ajay Saxena
2018 J jnl
Design of 5-3 multicolumn compressor for high performance multiplier.
Int. J. Comput. Aided Eng. Technol.
R. Marimuthu, S. Balamurugan, Partha Sharathi Mallick
2018 J jnl
Low Complexity Compressive Sensing Greedy Detection of Generalized Quadrature Spatial Modulation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Rajesh Ramanathan, Partha Sharathi Mallick, Thiruvengadam Sundarajan Jayaraman
2018 J jnl
Performance Analysis of Handover Schemes in Heterogeneous Networks.
J. Circuits Syst. Comput.
Annasamy Bagubali, Tanmay Verma, Anurag Anand, V. Prithiviraj, Partha Sharathi Mallick
2018 J jnl
Review on IMS-4G-cloud networks maintaining service continuity using distributed multi agent scheme.
Int. J. Comput. Aided Eng. Technol.
Annasamy Bagubali, V. Prithiviraj, Partha Sharathi Mallick
2018 J jnl
Spatial modulation and physical layer network coding based bidirectional relay network with transmit antenna selection over Nakagami-m fading channels.
Int. J. Commun. Syst.
Rajesh Ramanathan, Velmurugan Periakarupan Gurusamy Sivabalan, Thiruvengadam Sundarajan Jayaraman, Partha Sharathi Mallick
2017 J jnl
Design and Analysis of Multiplier Using Approximate 15-4 Compressor.
IEEE Access
R. Marimuthu, Y. Elsie Rezinold, Partha Sharathi Mallick
2017 J jnl
Error Compensation Techniques for Fixed-Width Array Multiplier Design - A Technical Survey.
J. Circuits Syst. Comput.
S. Balamurugan, Partha Sharathi Mallick
2016 Misc conf
Outage performance of bidirectional full duplex AF relay network with joint antenna and relay selection in Nakagami-m fading environment.
COMSNETS
Rajesh Ramanathan, Velmurugan Periakarupan Gurusamy Sivabalan, Thiruvengadam Sundarajan Jayaraman, Partha Sharathi Mallick
2015 J jnl
Enhancing Coverage and Rate of Cell Edge User in Multi-Antenna Poisson Voronoi Cells.
J. Circuits Syst. Comput.
S. Balaji, R. Santhakumar, Partha Sharathi Mallick
2014 J jnl
Enhancement of test data compression with multistage encoding.
Integr.
S. Sivanantham, M. Padmavathy, Ganga Gopakumar, Partha Sharathi Mallick, J. Raja Paul Perinbam
2014 J jnl
Low-power selective pattern compression for scan-based test applications.
Comput. Electr. Eng.
S. Sivanantham, Partha Sharathi Mallick, J. Raja Paul Perinbam
2012 — conf
CSP-Filling: A New X-Filling Technique to Reduce Capture and Shift Power in Test Applications.
ISED
S. Sivanantham, K. Sarathkumar, Jincy P. Manuel, Partha Sharathi Mallick, J. Raja Paul Perinbam
2012 J jnl
Design of low power fixed-width multiplier with row bypassing.
IEICE Electron. Express
S. Balamurugan, Sneha Ghosh, Atul, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick
2012 — conf
FPGA design and implementation of truncated multipliers using bypassing technique.
ICACCI
S. Balamurugan, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick
2012 J jnl
Towards realisation of mixed carbon nanotube bundles as VLSI interconnects: A review.
Nano Commun. Networks
Piratla Uma Sathyakam, Partha Sharathi Mallick