Partha S. Roop

185 papers A* 2A 14B 9C 37Misc 13Journal 75Unranked 33

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Softtide: A Deterministic Middleware for Real-Time Systems. ACM Trans. Embed. Comput. Syst. Jiajie Wang, Saumya Shankar, Partha S. Roop
2026	J	`jnl`	Synchronous Signal Temporal Logic for Decidable Verification of Cyber-Physical Systems. CoRR Partha S. Roop, Sobhan Chatterjee, Avinash Malik, Nathan Allen, Logan Kenwright
2025	C	`conf`	Compositional training for Safe AI-based Cyber-Physical Systems. MEMOCODE Sobhan Chatterjee, Saumya Shankar, Partha S. Roop
2025	C	`conf`	Formal Methods for Cryogenic Cyber Physical Systems (CCPS). MEMOCODE Duleepa J. Thrimawithana, Partha S. Roop, Sobhan Chatterjee, Maryam Hemmati
2025	Misc	`conf`	Frequency Automata: A novel formal model of hybrid systems in combined time and frequency domains. EMSOFT Moon Soo Kim, Avinash Malik, Partha S. Roop
2025	J	`jnl`	Frequency Automata: A novel formal model of hybrid systems in combined time and frequency domains. CoRR Moon Kim, Avinash Malik, Partha S. Roop
2025	C	`conf`	Mitigation of Cyber-physical Attacks in Industry 4.0 using Secure Function Blocks. MEMOCODE Steph Wu, Nathan Allen, Alex Baird, Hammond Pearce, Partha S. Roop
2025	B	`ed.`	Proceedings of the 26th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2025, Seoul, Republic of Korea, June 16-17, 2025 LCTES Partha S. Roop, Jerónimo Castrillón, Yongjun Park
2025	—	`conf`	Runtime Enforcement of CPS against Signal Temporal Logic. HSCC Han Su, Saumya Shankar, Srinivas Pinisetty, Partha S. Roop, Naijun Zhan
2025	J	`jnl`	Runtime Enforcement of CPS against Signal Temporal Logic. CoRR Han Su, Saumya Shankar, Srinivas Pinisetty, Partha S. Roop, Naijun Zhan
2025	J	`jnl`	Securing Pacemakers Using Runtime Monitors over Physiological Signals. ACM Trans. Embed. Comput. Syst. Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop
2025	Misc	`conf`	Softtide: a deterministic middleware for real-time systems. CODES+ISSS Jiajie Wang, Saumya Shankar, Partha S. Roop
2025	J	`jnl`	The Future of AI-Driven Software Engineering. ACM Trans. Softw. Eng. Methodol. Valerio Terragni, Annie Vella, Partha S. Roop, Kelly Blincoe
2025	J	`jnl`	Timetide: A Programming Model for Logically Synchronous Distributed Systems. ACM Trans. Embed. Comput. Syst. Logan Kenwright, Partha S. Roop, Nathan Allen, Calin Cascaval, Avinash Malik
2025	J	`jnl`	Timetide: A programming model for logically synchronous distributed systems. CoRR Logan Kenwright, Partha S. Roop, Nathan Allen, Calin Cascaval, Avinash Malik
2025	C	`conf`	Tuning into my heart through wearables: Towards a formal cardiac digital twin. MEMOCODE Partha S. Roop, Nathan Allen, Shahab Kazemi
2025	J	`jnl`	WCET-Aware Partitioning and Allocation of Disaggregated Networks for Multicore Systems. IEEE Embed. Syst. Lett. Junjie Shi, Christian Hakert, Kay Heider, Mario Günzel, Nils Hölscher, Daniel Kuhse, Jian-Jia Chen, Logan Kenwright, Sobhan Chatterjee, Nathan Allen, Partha S. Roop
2024	B	`conf`	A Formal Approach for Safe Reinforcement Learning: A Rate-Adaptive Pacemaker Case Study. RV Sai Rohan Harshavardhan Vuppala, Nathan Allen, Srinivas Pinisetty, Partha S. Roop
2024	J	`jnl`	An Explainable and Formal Framework for Hypertension Monitoring Using ECG and PPG. IEEE Embed. Syst. Lett. Abhinandan Panda, Ayush Anand, Srinivas Pinisetty, Partha S. Roop
2024	C	`conf`	Exploring Compositional Neural Networks for Real-Time Systems. MEMOCODE Sobhan Chatterjee, Nathan Allen, Nitish D. Patel, Partha S. Roop
2024	J	`jnl`	Logical Synchrony Networks: A Formal Model for Deterministic Distribution. IEEE Access Logan Kenwright, Partha S. Roop, Nathan Allen, Sanjay Lall, Calin Cascaval, Tammo Spalink, Martin Izzard
2024	J	`jnl`	Logical Synchrony Networks: A formal model for deterministic distribution. CoRR Logan Kenwright, Partha S. Roop, Nathan Allen, Sanjay Lall, Calin Cascaval, Tammo Spalink, Martin Izzard
2024	—	`conf`	Runtime Verified Neural Networks for Cyber-Physical Systems. VORTEX@ISSTA Dhiren Tripuramallu, Ayush Anand, Srinivas Pinisetty, Hammond Pearce, Partha S. Roop
2024	J	`jnl`	Scalable Security Enforcement for Cyber Physical Systems. IEEE Access Alex Baird, Abhinandan Panda, Hammond Pearce, Srinivas Pinisetty, Partha S. Roop
2024	J	`jnl`	The Future of Software Engineering in an AI-Driven World. CoRR Valerio Terragni, Partha S. Roop, Kelly Blincoe
2024	J	`jnl`	Towards Personalised Mood Prediction and Explanation for Depression from Biophysical Data. Sensors Sobhan Chatterjee, Jyoti Mishra, Frederick Sundram, Partha S. Roop
2023	J	`jnl`	A Novel Framework for the Design of Resilient Cyber-Physical Systems Using Control Theory and Formal Methods. IEEE Access Kelvin Anto, Akshya Kumar Swain, Partha S. Roop
2023	J	`jnl`	A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications. IEEE Embed. Syst. Lett. Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop
2023	—	`conf`	Evolving a Programming CS2 Course: A Decade-Long Experience Report. SIGCSE (1) Nasser Giacaman, Partha S. Roop, Valerio Terragni
2023	J	`jnl`	Incremental Security Enforcement for Cyber-Physical Systems. IEEE Access Abhinandan Panda, Alex Baird, Srinivas Pinisetty, Partha S. Roop
2023	J	`jnl`	Model Based Verification of Spiking Neural Networks in Cyber Physical Systems. IEEE Trans. Computers Ankit Pradhan, Jonathan King, Srinivas Pinisetty, Partha S. Roop
2023	J	`jnl`	S-T CRF: Spatial-Temporal Conditional Random Field for Human Trajectory Prediction. CoRR Pengqian Han, Jiamou Liu, Jialing He, Zeyu Zhang, Song Yang, Yanni Tang, Partha S. Roop
2023	—	`conf`	STF: Spatial Temporal Fusion for Trajectory Prediction. M2VIP Pengqian Han, Partha S. Roop, Jiamou Liu, Tianzhe Bao, Yifei Wang
2023	J	`jnl`	STF: Spatial Temporal Fusion for Trajectory Prediction. CoRR Pengqian Han, Partha S. Roop, Jiamou Liu, Tianzhe Bao, Yifei Wang
2023	J	`jnl`	Synchronous Deterministic Parallel Programming for Multi-Cores with ForeC. ACM Trans. Program. Lang. Syst. Eugene Yip, Alain Girault, Partha S. Roop, Morteza Biglari-Abhari
2022	J	`jnl`	A framework for the design of a closed-loop gastric pacemaker for treating conduction block. Comput. Methods Programs Biomed. Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel
2022	C	`conf`	A novel approach to Real-time contract based reasoning for Hybrid Systems. MEMOCODE Surinder Sood, Avinash Malik, Partha S. Roop
2022	J	`jnl`	Development of closed-loop modelling framework for adaptive respiratory pacemakers. Comput. Biol. Medicine Weiwei Ai, Vinod Suresh, Partha S. Roop
2022	J	`jnl`	High Fidelity Simulation of Hybrid Systems using Higher Order Hybrid Automata. IEEE Trans. Computers Jin Woo Ro, Avinash Malik, Partha S. Roop
2022	B	`conf`	Policy-Based Diabetes Detection using Formal Runtime Verification Monitors. CBMS Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop
2022	—	`conf`	Policy-Based Hypertension Monitoring Using Formal Runtime Verification Monitors. ISBRA Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop
2022	C	`conf`	Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems. MEMOCODE Surinder Sood, Avinash Malik, Partha S. Roop
2022	C	`conf`	Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones. MEMOCODE Alex Baird, Hammond Pearce, Srinivas Pinisetty, Partha S. Roop
2022	J	`jnl`	Runtime Monitoring and Statistical Approaches for Correlation Analysis of ECG and PPG. CoRR Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop
2022	C	`conf`	Runtime Verification for Clinically Interpretable Arrhythmia Classification. MEMOCODE Alex Baird, Srinivas Pinisetty, Nathan Allen, Nitish D. Patel, Partha S. Roop
2021	J	`jnl`	A New Safety Distance Calculation for Rear-End Collision Avoidance. IEEE Trans. Intell. Transp. Syst. Jin Woo Ro, Partha S. Roop, Avinash Malik
2021	C	`conf`	A secure insulin infusion system using verification monitors. MEMOCODE Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop
2021	J	`jnl`	Compositional runtime enforcement revisited. Formal Methods Syst. Des. Srinivas Pinisetty, Ankit Pradhan, Partha S. Roop, Stavros Tripakis
2021	J	`jnl`	Designing Neural Networks for Real-Time Systems. IEEE Embed. Syst. Lett. Hammond A. Pearce, Xin Yang, Partha S. Roop, Marc Katzef, Tórur Biskopstø Strøm
2021	C	`conf`	Formal modelling of attack scenarios and mitigation strategies in IEEE 1588. MEMOCODE Kelvin Anto, Partha S. Roop, Akshya K. Swain
2021	J	`jnl`	Runtime Interchange for Adaptive Re-use of Intelligent Cyber-Physical System Controllers. CoRR Hammond Pearce, Xin Yang, Srinivas Pinisetty, Partha S. Roop
2021	Misc	`conf`	Runtime verification of implantable medical devices using multiple physiological signals. SAC Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop, K. Ajay Babu, M. Sabarimalai Manikandan
2020	A	`conf`	A compositional approach using Keras for neural networks in real-time systems. DATE Xin Yang, Partha S. Roop, Hammond A. Pearce, Jin Woo Ro
2020	J	`jnl`	A novel approach for model-based design of gastric pacemakers. Comput. Biol. Medicine Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel, Weiwei Ai
2020	J	`jnl`	Cardiac Electrical Modeling for Closed-Loop Validation of Implantable Devices. IEEE Trans. Biomed. Eng. Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Mark L. Trew
2020	J	`jnl`	Closing the Loop: Validation of Implantable Cardiac Devices With Computational Heart Models. IEEE J. Biomed. Health Informatics Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Mark L. Trew
2020	—	`conf`	Design of a closed-loop gastric pacemaker for modulating dysrhythmic conduction patterns via extracellular potentials. EMBC Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel, Weiwei Ai
2020	J	`jnl`	Designing Neural Networks for Real-Time Systems. CoRR Hammond A. Pearce, Xin Yang, Partha S. Roop, Marc Katzef, Tórur Biskopstø Strøm
2020	C	`conf`	Formal Modeling and Verification of Rate Adaptive Pacemakers for Heart Failure. MEMOCODE Moon Soo Kim, Weiwei Ai, Partha S. Roop, Nathan Allen, Rohit Ramchandra, Julian Paton
2020	—	`conf`	Formal Runtime Monitoring Approaches for Autonomous Vehicles. OVERLAY Saumya Shankar, Ujwal V. R, Srinivas Pinisetty, Partha S. Roop
2020	J	`jnl`	Robust Design and Validation of Cyber-physical Systems. ACM Trans. Embed. Comput. Syst. Surinder Sood, Avinash Malik, Partha S. Roop
2020	—	`conf`	Semantics-Directed Hardware Generation of Hybrid Systems. ICCPS Nathan Allen, Partha S. Roop
2020	J	`jnl`	Smart I/O Modules for Mitigating Cyber-Physical Attacks on Industrial Control Systems. IEEE Trans. Ind. Informatics Hammond A. Pearce, Srinivas Pinisetty, Partha S. Roop, Matthew M. Y. Kuo, Abhisek Ukil
2019	J	`jnl`	A Formal Approach for Scalable Simulation of Gastric ICC Electrophysiology. IEEE Trans. Biomed. Eng. Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel
2019	C	`conf`	A compositional approach for real-time machine learning. MEMOCODE Nathan Allen, Yash Raje, Jin Woo Ro, Partha S. Roop
2019	C	`conf`	A compositional semantics of Simulink/Stateflow based on quantized state hybrid automata. MEMOCODE Jin Woo Ro, Avinash Malik, Partha S. Roop
2019	—	`conf`	A formal analysis approach for verifying the design of respiratory pacing devices. I2MTC Chad E. Eichler, Vinod Suresh, Partha S. Roop
2019	J	`jnl`	Formal Modeling and Verification of a Victim DRAM Cache. ACM Trans. Design Autom. Electr. Syst. Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha S. Roop
2019	C	`ed.`	Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2019, La Jolla, CA, USA, October 9-11, 2019. MEMOCODE Partha S. Roop, Naijun Zhan, Sicun Gao, Pierluigi Nuzzo
2019	C	`conf`	Securing implantable medical devices with runtime enforcement hardware. MEMOCODE Hammond A. Pearce, Matthew M. Y. Kuo, Partha S. Roop, Srinivas Pinisetty
2019	—	`conf`	Synthesizing IEC 61499 Function Blocks to hardware. ICEIC Hammond A. Pearce, Partha S. Roop
2018	J	`jnl`	A Formal Approach for Modeling and Simulation of Human Car-Following Behavior. IEEE Trans. Intell. Transp. Syst. Jin Woo Ro, Partha S. Roop, Avinash Malik, Prakash Ranjitkar
2018	J	`jnl`	A Parametric Computational Model of the Action Potential of Pacemaker Cells. IEEE Trans. Biomed. Eng. Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Sidharta Andalam, Eugene Yip, Nathan Allen, Mark L. Trew
2018	A	`conf`	Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach. ESOP Joaquín Aguado, Michael Mendler, Marc Pouzet, Partha S. Roop, Reinhard von Hanxleden
2018	J	`jnl`	Emulation of Cyber-Physical Systems Using IEC-61499. IEEE Trans. Ind. Informatics Avinash Malik, Partha S. Roop, Nathan Allen, Theo Steger
2018	C	`conf`	Faster Function Blocks for Precision Timed Industrial Automation. ISORC Hammond A. Pearce, Partha S. Roop, Morteza Biglari-Abhari, Martin Schoeberl
2018	J	`jnl`	Formal Modeling and Verification of Controllers for a Family of DRAM Caches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha S. Roop
2018	—	`conf`	Logic Meets Algebra: Compositional Timing Analysis for Synchronous Reactive Multithreading. Models, Mindsets, Meta Michael Mendler, Joaquín Aguado, Bruno Bodin, Partha S. Roop, Reinhard von Hanxleden
2018	J	`jnl`	Quantized State Hybrid Automata for Cyber-Physical Systems. CoRR Avinash Malik, Partha S. Roop
2018	C	`conf`	Rethinking the Validation Process for Medical Devices: A Cardiac Pacemaker Case Study. ISORC Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew
2018	C	`conf`	Security of Pacemakers using Runtime Verification. MEMOCODE Srinivas Pinisetty, Partha S. Roop, Vidula Sawant, Gerardo Schneider
2018	C	`conf`	Synchronous neural networks for cyber-physical systems. MEMOCODE Partha S. Roop, Hammond A. Pearce, Keyan Monadjem
2018	J	`jnl`	Towards the Emulation of the Cardiac Conduction System for Pacemaker Validation. ACM Trans. Cyber Phys. Syst. Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark L. Trew, Weiwei Ai, Nitish D. Patel
2017	C	`conf`	A Model Driven Approach for Cardiac Pacemaker Design Using a PRET Processor. ISORC Nathan Allen, Hammond A. Pearce, Partha S. Roop, Reinhard von Hanxleden
2017	J	`jnl`	A Novel Emulation Model of the Cardiac Conduction System. ACM Trans. Embed. Comput. Syst. Sidharta Andalam, Nathan Allen, Avinash Malik, Partha S. Roop, Mark Trew
2017	—	`conf`	An intracardiac electrogram model to bridge virtual hearts and implantable cardiac devices. EMBC Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Nathan Allen, Mark L. Trew
2017	J	`jnl`	An intracardiac electrogram model to bridge virtual hearts and implantable cardiac devices. CoRR Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Nathan Allen, Mark L. Trew
2017	C	`conf`	Compositional timing-aware semantics for synchronous programming. FDL Joaquín Aguado, Michael Mendler, Jia Jie Wang, Bruno Bodin, Partha S. Roop
2017	A	`conf`	Detecting Inter-App Information Leakage Paths. AsiaCCS Shweta Bhandari, Frédéric Herbreteau, Vijay Laxmi, Akka Zemmari, Partha S. Roop, Manoj Singh Gaur
2017	J	`jnl`	Modular Compilation of Hybrid Systems for Emulation and Large Scale Simulation. ACM Trans. Embed. Comput. Syst. Avinash Malik, Partha S. Roop, Sidharta Andalam, Mark Trew, Michael Mendler
2017	J	`jnl`	Runtime Enforcement of Cyber-Physical Systems. ACM Trans. Embed. Comput. Syst. Srinivas Pinisetty, Partha S. Roop, Steven Smyth, Nathan Allen, Stavros Tripakis, Reinhard von Hanxleden
2017	—	`conf`	Runtime enforcement of reactive systems using synchronous enforcers. SPIN Srinivas Pinisetty, Partha S. Roop, Steven Smyth, Stavros Tripakis, Reinhard von Hanxleden
2017	C	`conf`	Simulation of cyber-physical systems using IEC61499. MEMOCODE Hammond A. Pearce, Matthew M. Y. Kuo, Nathan Allen, Partha S. Roop, Avinash Malik
2017	—	`conf`	SneakLeak: Detecting Multipartite Leakage Paths in Android Apps. TrustCom/BigDataSE/ICESS Shweta Bhandari, Frédéric Herbreteau, Vijay Laxmi, Akka Zemmari, Partha S. Roop, Manoj Singh Gaur
2017	J	`jnl`	Timing Analysis of Synchronous Programs using WCRT Algebra: Scalability through Abstraction. ACM Trans. Embed. Comput. Syst. Jiajie Wang, Michael Mendler, Partha S. Roop, Bruno Bodin
2017	J	`jnl`	Unified Functional Safety Assessment of Industrial Automation Systems. IEEE Trans. Ind. Informatics Zeeshan Ejaz Bhatti, Partha S. Roop, Roopak Sinha
2016	—	`conf`	A Novel WCET Semantics of Synchronous Programs. FORMATS Michael Mendler, Partha S. Roop, Bruno Bodin
2016	Misc	`conf`	Energy and timing aware synchronous programming. EMSOFT Jia Jie Wang, Partha S. Roop, Alain Girault
2016	J	`jnl`	Hierarchical and Concurrent ECCs for IEC 61499 Function Blocks. IEEE Trans. Ind. Informatics Roopak Sinha, Partha S. Roop, Gareth Shaw, Zoran A. Salcic, Matthew M. Y. Kuo
2016	—	`conf`	Hybrid Automata Model of the Heart for Formal Verification of Pacemakers. ARCH@CPSWeek Sidharta Andalam, Avinash Malik, Partha S. Roop, Mark L. Trew
2016	—	`conf`	Hybrid automata models of cardiac ventricular electrophysiology for real-time computational applications. EMBC Sidharta Andalam, Harshavardhan Ramanna, Avinash Malik, Partha S. Roop, Nitish D. Patel, Mark L. Trew
2016	C	`conf`	Mixed-Criticality Systems as a Service for Non-critical Tasks. ISORC Mahmood Hikmet, Matthew M. Y. Kuo, Partha S. Roop, Prakash Ranjitkar
2016	A	`conf`	Modular code generation for emulating the electrical conduction system of the human heart. DATE Nathan Allen, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Nitish D. Patel
2016	A	`conf`	Precision timed industrial automation systems. DATE Matthew M. Y. Kuo, Sidharta Andalam, Partha S. Roop
2016	A	`conf`	Requirements-centric closed-loop validation of implantable cardiac devices. DATE Weiwei Ai, Nitish D. Patel, Partha S. Roop
2016	C	`conf`	RunSync: A Predictable Runtime for Precision Timed Automation Systems. ISORC Hammond A. Pearce, Matthew M. Y. Kuo, Partha S. Roop, Morteza Biglari-Abhari
2016	J	`jnl`	Runtime enforcement of reactive systems using synchronous enforcers. CoRR Srinivas Pinisetty, Partha S. Roop, Steven Smyth, Stavros Tripakis, Reinhard von Hanxleden
2016	—	`conf`	The ForeC Synchronous Deterministic Parallel Programming Language for Multicores. MCSoC Eugene Yip, Alain Girault, Partha S. Roop, Morteza Biglari-Abhari
2016	J	`jnl`	Towards the Emulation of the Cardiac Conduction System for Pacemaker Testing. CoRR Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Weiwei Ai, Nitish D. Patel
2015	J	`jnl`	A synchronous rendering of hybrid systems for designing Plant-on-a-Chip (PoC). CoRR Avinash Malik, Partha S. Roop, Sidharta Andalam, Eugene Yip, Mark Trew
2015	J	`jnl`	A unified framework for modeling and implementation of hybrid systems with synchronous controllers. CoRR Avinash Malik, Partha S. Roop
2015	C	`conf`	Fairness-Based Measures for Safety-Critical Vehicular Ad-Hoc Networks. ISORC Mahmood Hikmet, Partha S. Roop, Prakash Ranjitkar
2015	—	`book`	Model-Driven Design Using IEC 61499 - A Synchronous Approach for Embedded and Automation Systems. Li Hsien Yoong, Partha S. Roop, Zeeshan Ejaz Bhatti, Matthew M. Y. Kuo
2015	C	`conf`	Schedule Synthesis for Time-Triggered Multi-hop Wireless Networks with Retransmissions. ISORC Jin Woo Ro, Partha S. Roop, Avinash Malik
2015	C	`conf`	Synthesizing Multirate Programs from IEC 61499. ISORC Li Hsien Yoong, Partha S. Roop
2014	J	`jnl`	A Formal Approach to Incremental Converter Synthesis for System-on-Chip Design. ACM Trans. Design Autom. Electr. Syst. Roopak Sinha, Alain Girault, Gregor Goessler, Partha S. Roop
2014	J	`jnl`	A Predictable Framework for Safety-Critical Embedded Systems. IEEE Trans. Computers Sidharta Andalam, Partha S. Roop, Alain Girault, Claus Traulsen
2014	C	`conf`	A model-driven approach with synchronous semantics for developing hard real-time WSNs. ETFA Jin Woo Ro, Zeeshan Ejaz Bhatti, Partha S. Roop
2014	A	`conf`	Relaxing the synchronous approach for mixed-criticality systems. RTAS Eugene Yip, Matthew M. Y. Kuo, Partha S. Roop, David Broman
2014	J	`jnl`	Sequentially Constructive Concurrency - A Conservative Extension of the Synchronous Model of Computation. ACM Trans. Embed. Comput. Syst. Reinhard von Hanxleden, Michael Mendler, Joaquín Aguado, Björn Duderstadt, Insa Fuhrmann, Christian Motika, Stephen Mercer, Owen O'Brien, Partha S. Roop
2013	Misc	`conf`	ILPc: A novel approach for scalable timing analysis of synchronous programs. CASES Jia Jie Wang, Partha S. Roop, Sidharta Andalam
2013	A*	`conf`	Precise timing analysis for direct-mapped caches. DAC Sidharta Andalam, Alain Girault, Roopak Sinha, Partha S. Roop, Jan Reineke
2013	—	`conf`	Precision Timed Embedded Systems Using TickPAD Memory. ACSD Matthew M. Y. Kuo, Partha S. Roop, Sidharta Andalam, Nitish D. Patel
2013	—	`conf`	Programming and Timing Analysis of Parallel Programs on Multicores. ACSD Eugene Yip, Partha S. Roop, Morteza Biglari-Abhari, Alain Girault
2013	A	`conf`	Stateful Web Services - Auto Modeling and Composition. ICWS Syed Adeel Ali, Partha S. Roop, Ian Warren
2013	J	`jnl`	Web Service Choreography: Unanimous Handling of Control and Data. Int. J. Softw. Informatics Syed Adeel Ali, Partha S. Roop, Ian Warren
2012	A	`conf`	A Service Composition Framework Based on Goal-Oriented Requirements Engineering, Model Checking, and Qualitative Preference Analysis. ICSOC Zachary J. Oster, Syed Adeel Ali, Ganesh Ram Santhanam, Samik Basu, Partha S. Roop
2012	—	`conf`	Combining IEC 61499 Model-Based Design with Component-Based Architecture for Robotics. SIMPAR Li Hsien Yoong, Zeeshan Ejaz Bhatti, Partha S. Roop
2012	A	`conf`	Correct-by-construction multi-component SoC design. DATE Roopak Sinha, Partha S. Roop, Zoran Salcic, Samik Basu
2012	J	`jnl`	Implementing constrained cyber-physical systems with IEC 61499. ACM Trans. Embed. Comput. Syst. Li Hsien Yoong, Partha S. Roop, Zoran Salcic
2012	C	`conf`	Model-driven development of industrial embedded systems: Challenges faced and lessons learnt. ETFA K. Nicholas, Zeeshan Ejaz Bhatti, Partha S. Roop
2012	J	`jnl`	Synthesizing Globally Asynchronous Locally Synchronous Systems With IEC 61499. IEEE Trans. Syst. Man Cybern. Part C Li Hsien Yoong, Gareth Shaw, Partha S. Roop, Zoran Salcic
2011	C	`conf`	Compiling Esterel for Multi-core Execution. DSD Simon Yuan, Li Hsien Yoong, Partha S. Roop
2011	J	`jnl`	Design of Distributed Heterogeneous Embedded Systems in DDFCharts. IEEE Trans. Parallel Distributed Syst. Ivan Radojevic, Zoran Salcic, Partha S. Roop
2011	A*	`conf`	Efficient WCRT analysis of synchronous programs using reachability. DAC Matthew M. Y. Kuo, Roopak Sinha, Partha S. Roop
2011	—	`conf`	Environment Modelling for Tighter Timing Analysis of Synchronous Programs. DELTA Sidharta Andalam, Roopak Sinha, Partha S. Roop
2011	A	`conf`	Pruning infeasible paths for tight WCRT analysis of synchronous programs. DATE Sidharta Andalam, Partha S. Roop, Alain Girault
2011	—	`conf`	Unified management of control flow and data mismatches in web service composition. SOSE Syed Adeel Ali, Partha S. Roop, Ian Warren, Zeeshan Ejaz Bhatti
2010	A	`conf`	Deterministic, predictable and light-weight multithreading using PRET-C. DATE Sidharta Andalam, Partha S. Roop, Alain Girault
2010	C	`conf`	Predictable multithreading of embedded applications using PRET-C. MEMOCODE Sidharta Andalam, Partha S. Roop, Alain Girault
2010	J	`jnl`	SystemJ: A GALS language for system level design. Comput. Lang. Syst. Struct. Avinash Malik, Zoran Salcic, Partha S. Roop, Alain Girault
2010	J	`jnl`	Verifying IEC 61499 Function Blocks Using Esterel. IEEE Embed. Syst. Lett. Li Hsien Yoong, Partha S. Roop
2009	C	`conf`	A Hierarchical and Concurrent Approach for IEC 61499 Function Blocks. ETFA Gareth Shaw, Partha S. Roop, Zoran Salcic
2009	J	`jnl`	A New Multithreaded Architecture Supporting Direct Execution of Esterel. EURASIP J. Embed. Syst. Simon Yuan, Li Hsien Yoong, Sidharta Andalam, Partha S. Roop, Zoran Salcic
2009	J	`jnl`	A Synchronous Approach for IEC 61499 Function Block Implementation. IEEE Trans. Computers Li Hsien Yoong, Partha S. Roop, Valeriy Vyatkin, Zoran A. Salcic
2009	A	`conf`	Multi-clock Soc design using protocol conversion. DATE Roopak Sinha, Partha S. Roop, Samik Basu, Zoran Salcic
2009	—	`conf`	Specification Enforcing Refinement for Convertibility Verification. ACSD Partha S. Roop, Alain Girault, Roopak Sinha, Gregor Goessler
2009	J	`jnl`	SystemJ compilation using the tandem virtual machine approach. ACM Trans. Design Autom. Electr. Syst. Avinash Malik, Zoran A. Salcic, Partha S. Roop
2009	Misc	`conf`	Tight WCRT analysis of synchronous C programs. CASES Partha S. Roop, Sidharta Andalam, Reinhard von Hanxleden, Simon Yuan, Claus Traulsen
2008	Misc	`conf`	A Module Checking Based Converter Synthesis Approach for SoCs. VLSI Design Roopak Sinha, Partha S. Roop, Samik Basu
2008	—	`conf`	STARPro - A new multithreaded direct execution platform for Esterel. SLA++P Simon Yuan, Sidharta Andalam, Li Hsien Yoong, Partha S. Roop, Zoran A. Salcic
2008	J	`jnl`	SoC Design Approach Using Convertibility Verification. EURASIP J. Embed. Syst. Roopak Sinha, Partha S. Roop, Samik Basu
2008	A	`conf`	Tandem virtual machine - An efficient execution platform for GALS language SystemJ. ACSAC Avinash Malik, Zoran Salcic, Partha S. Roop
2007	—	`conf`	A Model Checking Approach to Protocol Conversion. SLA++P Roopak Sinha, Partha S. Roop, Samik Basu
2007	C	`conf`	McCharts and Multiclock FSMs for modeling large scale systems. MEMOCODE Ivan Radojevic, Zoran A. Salcic, Partha S. Roop
2007	J	`jnl`	Precise specification matching for adaptive reuse in embedded systems. J. Appl. Log. Hai-Feng Guo, Miao Liu, Partha S. Roop, C. R. Ramakrishnan, I. V. Ramakrishnan
2006	B	`conf`	A Scheduler Support Unit for Reactive Microprocessors. RTCSA Zoran A. Salcic, Flavius Gruian, Partha S. Roop, Alif Wahid
2006	Misc	`conf`	Design of Heterogeneous Embedded Systems Using DFCharts Model of Computation. VLSI Design Ivan Radojevic, Zoran A. Salcic, Partha S. Roop
2006	J	`jnl`	HiDRA - A reactive multiprocessor architecture for heterogeneous embedded systems. Microprocess. Microsystems Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza Biglari-Abhari
2006	—	`conf`	Local Module Checking for CTL Specifications. FESCA@ETAPS Samik Basu, Partha S. Roop, Roopak Sinha
2006	J	`jnl`	Modeling Embedded Systems: From SystemC and Esterel to DFCharts. IEEE Des. Test Comput. Ivan Radojevic, Zoran A. Salcic, Partha S. Roop
2006	C	`conf`	The SystemJ approach to system-level design. MEMOCODE Flavius Gruian, Partha S. Roop, Zoran A. Salcic, Ivan Radojevic
2005	J	`jnl`	A New Model for Heterogeneous Embedded Systems - What Esterel and SyncCharts Need to Become a Suitable Specification Platform. Int. J. Softw. Eng. Knowl. Eng. Ivan Radojevic, Zoran A. Salcic, Partha S. Roop
2005	B	`conf`	Adaptive Techniques for Specification Matching in Embedded Systems: A Comparative Study. IFM Robi Malik, Partha S. Roop
2005	—	`conf`	Adaptive Verification using Forced Simulation. FESCA@ETAPS Roopak Sinha, Partha S. Roop, Bakhadyr Khoussainov
2005	C	`conf`	Modelling Heterogeneous Embedded Systems in DFCarts. FDL Ivan Radojevic, Zoran A. Salcic, Partha S. Roop
2005	—	`conf`	REMIC: design of a reactive embedded microprocessor core. ASP-DAC Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza Biglari-Abhari
2004	—	`conf`	Customizing Processor Cores to Support Reactivity. ERSA Zoran A. Salcic, Partha S. Roop
2004	—	`conf`	HiDRA: A New Architecture for Heterogeneous Embedded Systems. ESA/VLSI Zoran A. Salcic, Partha S. Roop, Dong Hui, Ivan Radojevic
2004	J	`jnl`	REFLIX: a processor core with native support for control-dominated embedded applications. Microprocess. Microsystems Zoran A. Salcic, Partha S. Roop, Morteza Biglari-Abhari, Abbas Bigdeli
2004	Misc	`conf`	Towards direct execution of esterel programs on reactive processors. EMSOFT Partha S. Roop, Zoran A. Salcic, M. W. Sajeewa Dayaratne
2003	B	`conf`	A Customer Test Generator for Web-Based Systems. XP Rick Mugridge, Bruce A. MacDonald, Partha S. Roop
2003	Misc	`conf`	A New Reactive Processor with Architectural Support for Control Dominated Embedded Systems. VLSI Design Partha S. Roop, Zoran A. Salcic, Morteza Biglari-Abhari, Abbas Bigdeli
2003	B	`conf`	Five Challenges in Teaching XP. XP Rick Mugridge, Bruce A. MacDonald, Partha S. Roop, Ewan D. Tempero
2002	B	`conf`	REFLIX: A Processor Core for Reactive Embedded Applications. FPL Zoran A. Salcic, Partha S. Roop, Morteza Biglari-Abhari, Abbas Bigdeli
2002	C	`conf`	k-time Forced Simulation: A Formal Verification Technique for IP Reuse. ICCD Partha S. Roop, Arcot Sowmya, S. Ramesh
2001	—	`conf`	A formal approach to component based development of synchronous programs. ASP-DAC Partha S. Roop, Arcot Sowmya, S. Ramesh
2001	J	`jnl`	Forced simulation: A technique for automating component reuse in embedded systems. ACM Trans. Design Autom. Electr. Syst. Partha S. Roop, Arcot Sowmya, S. Ramesh
2000	—	`conf`	Automated Component Adaptation by Forced Simulation. ACAC Partha S. Roop, Arcot Sowmya, S. Ramesh
2000	Misc	`conf`	Automatic Component Matching Using Forced Simulation. VLSI Design Partha S. Roop, Arcot Sowmya, S. Ramesh
2000	—	`—`	Forced simulation: a formal approach to component based development of embedded systems. Partha S. Roop
1998	Misc	`conf`	CFSMcharts: A New Language for Microprocessor Based system Design. VLSI Design Partha S. Roop, Arcot Sowmya
1998	B	`conf`	Hidden time model for specification and verification of embedded systems. ECRTS Partha S. Roop, Arcot Sowmya
1996	J	`jnl`	A new algorithm for implementation of design functions by available devices. IEEE Trans. Very Large Scale Integr. Syst. Raj S. Mitra, Partha S. Roop, Anupam Basu
1995	Misc	`conf`	Implementation of design functions by available devices: a new algorithm. VLSI Design Raj S. Mitra, Partha S. Roop, Anupam Basu