PariVallal Kannan

12 papers A* 1A 1B 5C 1Misc 1Journal 2Unranked 1
YearRankTypeTitle / Venue / Authors
2016 A conf
Performance driven routing for modern FPGAs.
ICCAD
PariVallal Kannan, Satish Sivaswamy
2006 J jnl
Interconnect estimation for FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
PariVallal Kannan, Dinesh Bhatia
2004 Misc conf
Estimating Pre-Placement FPGA Interconnection Requirements.
VLSI Design
PariVallal Kannan, Dinesh Bhatia
2004 J jnl
On metrics for comparing interconnect estimation methods for FPGAs.
IEEE Trans. Very Large Scale Integr. Syst.
PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
2003 C conf
Interconnect Estimation for FPGAs under Timing Driven Domains.
ICCD
PariVallal Kannan, Dinesh Bhatia
2002 — conf
On Routing Demand and Congestion Estimation for FPGAs.
ASP-DAC/VLSI Design
Shankar Balachandran, PariVallal Kannan, Dinesh Bhatia
2002 A* conf
On metrics for comparing routability estimation methods for FPGAs.
DAC
PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
2002 B conf
Rapid and Reliable Routability Estimation for FPGAs.
FPL
PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
2001 B conf
Tightly Integrated Placement and Routing for FPGAs.
FPL
PariVallal Kannan, Dinesh Bhatia
2001 B conf
fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits.
FPL
PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia
1999 B conf
NEBULA: A Partially and Dynamically Reconfigurable Architecture.
FPL
Dinesh Bhatia, Kuldeep S. Simha, PariVallal Kannan
1998 B conf
REACT: Reactive Environment for Runtime Reconfiguration.
FPL
Dinesh Bhatia, PariVallal Kannan, Kuldeep S. Simha, Karthikeya M. Gajjala Purna