Parijat Mukherjee

21 papers A* 3A 3C 1Journal 9Unranked 5
YearRankTypeTitle / Venue / Authors
2024 J jnl
Constructive Place-and-Route for FinFET-Based Transistor Arrays in Analog Circuits Under Nonlinear Gradients.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar
2022 J jnl
Mining Patterns From Concurrent Execution Traces.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang
2021 — conf
A Comparative Study of Specification Mining Methods for SoC Communication Traces.
ISVLSI
Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang
2021 J jnl
ALIGN: A System for Automating Analog Layout.
IEEE Des. Test
Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar
2021 A conf
Common-Centroid Layouts for Analog Circuits: Advantages and Limitations.
DATE
Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Parijat Mukherjee, Soner Yaldiz, Ramesh Harjani, Sachin S. Sapatnekar
2021 — conf
Machine Learning Techniques in Analog Layout Automation.
ISPD
Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar
2021 — conf
Mining Message Flows from System-on-Chip Execution Traces.
ISQED
Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang
2021 C conf
Model Synthesis for Communication Traces of System Designs.
ICCD
Hao Zheng, Md Rubel Ahmed, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang
2021 J jnl
Model Synthesis for Communication Traces of System-on-Chip Designs.
CoRR
Hao Zheng, Md Rubel Ahmed, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang
2021 A conf
Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits.
ICCAD
Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar
2020 J jnl
ALIGN: A System for Automating Analog Layout.
CoRR
Tonmoy Dhar, Kishor Kunal, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Desmond A. Kirkpatrick, Parijat Mukherjee, Sachin S. Sapatnekar, Soner Yaldiz
2020 — conf
Learning from Experience: Applying ML to Analog Circuit Design.
ISPD
Kishor Kunal, Tonmoy Dhar, Yaguang Li, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Wenbin Xu, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Sachin S. Sapatnekar
2020 J jnl
Mining Message Flows from System-on-Chip Execution Traces.
CoRR
Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang
2020 — conf
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs.
ISQED
Yuting Cao, Parijat Mukherjee, Mahesh Ketkar, Jin Yang, Hao Zheng
2020 J jnl
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs.
CoRR
Yuting Cao, Parijat Mukherjee, Mahesh Ketkar, Jin Yang, Hao Zheng
2020 A conf
The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk).
ICCAD
Tonmoy Dhar, Kishor Kunal, Yaguang Li, Yishuang Lin, Meghna Madhusudan, Jitesh Poojary, Arvind K. Sharma, Steven M. Burns, Ramesh Harjani, Jiang Hu, Parijat Mukherjee, Soner Yaldiz, Sachin S. Sapatnekar
2016 J jnl
Using Presilicon Knowledge to Excite Nonlinear Failure Modes in Large Mixed-Signal Circuits.
IEEE Des. Test
Parijat Mukherjee, Peng Li
2014 A* conf
Approximate property checking of mixed-signal circuits.
DAC
Parijat Mukherjee, Chirayu S. Amin, Peng Li
2014 A* conf
Leveraging pre-silicon data to diagnose out-of-specification failures in mixed-signal circuits.
DAC
Parijat Mukherjee, Peng Li
2012 J jnl
Efficient Identification of Unstable Loops in Large Linear Analog Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Parijat Mukherjee, G. Peter Fang, Rod Burt, Peng Li
2011 A* conf
Automatic stability checking for large linear analog integrated circuits.
DAC
Parijat Mukherjee, G. Peter Fang, Rod Burt, Peng Li