Paolo Prinetto

283 papers A* 5A 47B 20C 17Misc 13Journal 64Unranked 117
YearRankTypeTitle / Venue / Authors
2026 — conf
Automation in Cyber Risk Management: A Literature Review of Evidence, Gaps, and Emerging Directions.
ITASEC/SERICS
Antonio Belli, Nicolò Maunero, Paolo Prinetto
2026 — conf
Empirical Evaluation of the Resistance of Novel Non-Algebraic AES S-Boxes to Power Side-Channel Attacks.
ITASEC/SERICS
Samuele Yves Cerini, Gianluca Roascio, Nicolò Maunero, Paolo Prinetto
2026 — conf
Graph-Based Modelling of the Italian Criminal Code as a Knowledge Base for AI-Assisted Inference.
ITASEC/SERICS
Samuele Yves Cerini, Nicola Deidda, Yilian Huang, Sara Lilli, Luca Lobascio, Lavinia Russo, Maria Vittoria Zucca, Giorgio Fumera, Giorgio Giacinto, Paolo Prinetto, Salvatore Marsocci
2026 — conf
Integrating Human-in-the-Loop AI Systems in the Italian Judicial System.
ITASEC/SERICS
Samuele Yves Cerini, Nicola Deidda, Sara Lilli, Maria Vittoria Zucca, Giorgio Fumera, Giorgio Giacinto, Paolo Prinetto, Salvatore Marsocci
2025 B conf
European Test Symposium Teams: an Anniversary Snapshot.
ETS
Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilárd Enyedi, I. Stefan, Ovidiu Stan, Cosmina Corches, Z. Peng, Petru Eles, Rolf Drechsler, S. Eggersglüß, Görschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, P.-Y. Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, S. Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, P. Girard, Marcello Traiola, Arnaud Virazel, F. Fernandes Dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letícia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, F. Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, A. Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025 — conf
The Big Game: The Italian Avenue of Attack to Cybersecurity Skill Shortage.
The Combined Power of Research, Education, and Dissemination
Gaspare Ferraro, Nicolò Maunero, Sonia Montegiove, Paolo Prinetto
2024 J jnl
Memory Integrity Techniques for Memory-Unsafe Languages: A Survey.
IEEE Access
Vahid Eftekhari Moghadam, Gabriele Serra, Federico Aromolo, Giorgio C. Buttazzo, Paolo Prinetto
2023 — conf
LiFi-CFI: Light-weight Fine-grained Hardware CFI Protection for RISC-V.
DTTIS
Mahboobe Sadeghipour Roodsari, Fatemeh Sheikhshoaei, Nicolò Maunero, Paolo Prinetto, Zain Navabi
2023 — conf
Towards Cybersecurity Risk Assessment Automation: an Ontological Approach.
DASC/PiCom/CBDCom/CyberSciTech
Nicolò Maunero, Fabio De Rosa, Paolo Prinetto
2023 B conf
Why Mary Can Hack: Effectively Introducing High School Girls to Cybersecurity.
ARES
Gabriele Costa, Silvia de Francisci, Serenella Valiani, Paolo Prinetto
2022 — conf
A Secure Canary-Based Hardware Approach Against ROP.
ITASEC
Mahboobe Sadeghipour Roodsari, Ebrahim Nouri, Fatemeh Sheikhshoaei, Paolo Prinetto, Zainalabedin Navabi
2022 — conf
Ontology for Cybersecurity Governance of ICT Systems.
ITASEC
Fabio De Rosa, Nicolò Maunero, Luca Nicoletti, Paolo Prinetto, Martina Trussoni
2022 B conf
Real-Time Control-Flow Integrity for Multicore Mixed-Criticality IoT Systems.
ETS
Vahid Eftekhari Moghadam, Paolo Prinetto, Gianluca Roascio
2022 — conf
Remotizing and Virtualizing Chips and Circuits for Hardware-based Capture-the-Flag Challenges.
EuroS&P Workshops
Gianluca Roascio, Samuele Yves Cerini, Paolo Prinetto
2022 J jnl
ThreMA: Ontology-Based Automated Threat Modeling for ICT Infrastructures.
IEEE Access
Fabio De Rosa, Nicolò Maunero, Paolo Prinetto, Federico Talentino, Martina Trussoni
2021 — conf
AFTAB: A RISC-V Implementation with Configurable Gateways for Security.
EWDTS
Maryam Rajabalipanah, Mahboobe Sadeghipour Roodsari, Zahra Jahanpeima, Gianluca Roascio, Paolo Prinetto, Zainalabedin Navabi
2021 — conf
Control-Flow Integrity for Real-Time Operating Systems: Open Issues and Challenges.
EWDTS
Vahid Eftekhari Moghadam, Marco Meloni, Paolo Prinetto
2021 — conf
PAIDEUSIS: A Remote Hybrid Cyber Range for Hardware, Network, IoT Security Training.
ITASEC
Giulio Berra, Gaspare Ferraro, Matteo Fornero, Nicolò Maunero, Paolo Prinetto, Gianluca Roascio
2020 — conf
A FPGA-based Control-Flow Integrity Solution for Securing Bare-Metal Embedded Systems.
DTIS
Nicolò Maunero, Paolo Prinetto, Gianluca Roascio, Antonio Varriale
2020 — conf
EVA: A Hybrid Cyber Range.
ITASEC
Shabeer Ahmad, Nicolò Maunero, Paolo Prinetto
2020 — conf
Hardware Security, Vulnerabilities, and Attacks: A Comprehensive Taxonomy.
ITASEC
Paolo Prinetto, Gianluca Roascio
2020 — conf
Hardware-based Capture-The-Flag Challenges.
EWDTS
Paolo Prinetto, Gianluca Roascio, Antonio Varriale
2020 — conf
SEkey: A Distributed Hardware-based Key Management System.
EWDTS
Matteo Fornero, Nicolò Maunero, Paolo Prinetto, Antonio Varriale
2020 — conf
Tactile sensing with gesture-controlled collaborative robot.
MetroInd4.0&IoT
Francesca Sorgini, Giuseppe Airò Farulla, Nikola Lukic, Ivan Danilov, Loris Roveda, Milos Milivojevic, Terrin Babu Pulikottil, Maria Chiara Carrozza, Paolo Prinetto, Tullio Tolio, Calogero Maria Oddo, Petar B. Petrovic, Bozica Bojovic
2019 — conf
CFI: Control Flow Integrity or Control Flow Interruption?
EWDTS
Nicolò Maunero, Paolo Prinetto, Gianluca Roascio
2019 J jnl
Challenges and Solutions in Emerging Memory Testing.
IEEE Trans. Emerg. Top. Comput.
Elena-Ioana Vatajelu, Paolo Prinetto, Mottaqiallah Taouil, Said Hamdioui
2019 J jnl
Design and Review of Water Management System Using Ethernet, Wi-Fi 802.11n, Modbus, and Other Communication Standards.
Wirel. Pers. Commun.
Bishwajeet Pandey, Giuseppe Airo Farulla, Marco Indaco, Ludovico Iovino, Paolo Prinetto
2018 J jnl
An abstraction layer enabling pervasive hardware-reconfigurable systems.
Int. J. Embed. Syst.
Alessandro Cilardo, Nicola Mazzocca, Paolo Prinetto
2018 — conf
Securing bitstream integrity, confidentiality and authenticity in reconfigurable mobile heterogeneous systems.
AQTR
Alberto Carelli, Carlo Alberto Cristofanini, Alessandro Vallero, Cataldo Basile, Paolo Prinetto, Stefano Di Carlo
2017 — conf
An object-oriented open software architecture for security applications.
EWDTS
Giuseppe Airo Farulla, Alexander James Pane, Paolo Prinetto, Antonio Varriale
2017 — conf
Holistic security via complex HW/SW platforms.
DTIS
Giuseppe Airo Farulla, Paolo Prinetto, Antonio Varriale
2017 B conf
Scan chain encryption for the test, diagnosis and debug of secure circuits.
ETS
Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre, Paolo Prinetto, Marco Restifo
2017 — conf
Side-channel analysis of SEcube™ platform.
EWDTS
Matteo Bollo, Alberto Carelli, Stefano Di Carlo, Paolo Prinetto
2017 C conf
Standards-based tools and services for building lifelong learning pathways.
EDUCON
Cleo Sgouropoulou, Ioannis Voyiatzis, Anastasios Koutoumanos, Said Hamdioui, Peyman Pouyan, M. Comte, Paolo Prinetto, Giuseppe Airo Farulla, Peeter Ellervee, Carlos Delgado Kloos, Raquel M. Crespo García
2017 — conf
Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memories.
IVSW
Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016 — conf
SEcube™: An open-source security platform in a single SoC.
DTIS
Antonio Varriale, Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto, Pascal Trotta, Tiziana Margaria
2016 J jnl
STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability.
ACM J. Emerg. Technol. Comput. Syst.
Elena-Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo Prinetto
2016 C conf
STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation.
IOLTS
Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016 Misc conf
Security primitives (PUF and TRNG) with STT-MRAM.
VTS
Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016 A conf
Towards a highly reliable SRAM-based PUFs.
DATE
Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2015 B conf
A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs.
FPL
Stefano Di Carlo, Paolo Prinetto, Pascal Trotta, Jan Andersson
2015 — conf
DTIS 2015 foreword.
DTIS
Paolo Prinetto, Giorgio Di Natale
2015 — conf
Online self adjusting progressive age monitoring of timing variations.
DTIS
Somayeh Sadeghi Kohan, Mehdi Kamal, John McNeil, Paolo Prinetto, Zain Navabi
2015 J jnl
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers.
ACM Trans. Embed. Comput. Syst.
Davide Bertozzi, Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Piero Olivo, Paolo Prinetto, Cristian Zambelli
2015 B conf
Power-aware voltage tuning for STT-MRAM reliability.
ETS
Elena I. Vatajelu, Rosa Rodríguez-Montañés, Stefano Di Carlo, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras
2015 A conf
Read/write robustness estimation metrics for spin transfer torque (STT) MRAM cell.
DATE
Elena I. Vatajelu, Rosa Rodríguez-Montañés, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras
2015 J jnl
SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2015 J jnl
SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs.
ACM Trans. Reconfigurable Technol. Syst.
Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2015 J jnl
SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Davide Bertozzi, Piero Olivo
2015 A conf
STT MRAM-Based PUFs.
DATE
Elena-Ioana Vatajelu, Giorgio Di Natale, Marco Indaco, Paolo Prinetto
2015 — conf
STT-MRAM cell reliability evaluation under process, voltage and temperature (PVT) variations.
DTIS
Elena I. Vatajelu, Rosa Rodríguez-Montañés, Marco Indaco, Paolo Prinetto, Joan Figueras
2015 — conf
STT-MRAM-Based Strong PUF Architecture.
ISVLSI
Elena-Ioana Vatajelu, Giorgio Di Natale, Lionel Torres, Paolo Prinetto
2015 J jnl
Usability of Online Assistance From Semiliterate Users' Perspective.
Int. J. Hum. Comput. Interact.
Nadeem Ahmad, Umar Shoaib, Paolo Prinetto
2014 — conf
A cloud-based Cyber-Physical System for environmental monitoring.
MECO
Teodora Sanislav, George Dan Mois, Silviu Folea, Liviu Miclea, Giulio Gambardella, Paolo Prinetto
2014 — conf
A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs.
DFT
Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2014 J jnl
A novel algorithm and hardware architecture for fast video-based shape reconstruction of space debris.
EURASIP J. Adv. Signal Process.
Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Nicola Sansonne, Pascal Trotta
2014 C conf
A novel methodology to increase fault tolerance in autonomous FPGA-based systems.
IOLTS
Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alessandro Vallero
2014 — conf
ABLUR: An FPGA-based adaptive deblurring core for real-time applications.
AHS
Giuseppe Airo Farulla, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2014 — conf
DTIS 2014 foreword.
DTIS
Ioannis Voyiatzis, Michel Renovell, Mohamed Masmoudi, Paolo Prinetto, Giorgio Di Natale
2014 J jnl
FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories.
ACM Trans. Archit. Code Optim.
Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto, Davide Bertozzi, Piero Olivo, Cristian Zambelli
2014 J jnl
Integrating MultiWordNet with Italian Sign Language lexical resources.
Expert Syst. Appl.
Umar Shoaib, Nadeem Ahmad, Paolo Prinetto, Gabriele Tiotto
2014 — conf
Integration of STT-MRAM model into CACTI simulator.
IDT
S. Arcaro, Stefano Di Carlo, Marco Indaco, D. Pala, Paolo Prinetto, Elena I. Vatajelu
2014 J jnl
Multilevel Simulation of Nonfunctional Properties by Piecewise Evaluation.
ACM Trans. Design Autom. Electr. Syst.
Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich
2014 C conf
On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems.
DSD
Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Frank Reichenbach, Trond Løkstad, Gulzaib Rafiq
2014 B conf
On the impact of process variability and aging on the reliability of emerging memories (Embedded tutorial).
ETS
Marco Indaco, Paolo Prinetto, Elena I. Vatajelu
2014 — conf
Reliability estimation at block-level granularity of spin-transfer-torque MRAMs.
DFT
Stefano Di Carlo, Marco Indaco, Paolo Prinetto, Elena I. Vatajelu, Rosa Rodríguez-Montañés, Joan Figueras
2014 A conf
SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives.
DATE
Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi
2013 B conf
A software-based self test of CUDA Fermi GPUs.
ETS
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013 — conf
AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications.
AHS
Stefano Di Carlo, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013 B conf
Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS.
FPL
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013 J jnl
Design and optimization of adaptable BCH codecs for NAND flash memories.
Microprocess. Microsystems
Michele Fabiano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto
2013 C conf
Ef
IOLTS
Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Paolo Prinetto
2013 — conf
Exploring a New Dimension in Code Mobility for Ubiquitous Embedded Systems.
UIC/ATC
Alessandro Cilardo, Nicola Mazzocca, Paolo Prinetto
2013 B conf
FEMIP: A high performance FPGA-based features extractor & matcher for space applications.
FPL
Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Piergiorgio Lanza
2013 A conf
Fault mitigation strategies for CUDA GPUs.
ITC
Stefano Di Carlo, Giulio Gambardella, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013 C conf
Increasing the robustness of CUDA Fermi GPU-based systems.
IOLTS
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013 — conf
SAFE: A self adaptive frame enhancer FPGA-based IP-core for real-time space applications.
IDT
Stefano Di Carlo, Giulio Gambardella, Piergiorgio Lanza, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013 — conf
Stereo vision system for capture and removal of space debris.
DASIP
Francesco Rosso, Francesco Gallo, Walter Allasia, Enrico Licata, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alain Favetto, Marco Paleari, Paolo Ariano
2013 — conf
ZipStream: Improving dependability in dynamic partial reconfiguration.
IDT
Stefano Di Carlo, Giulio Gambardella, Trong Huynh Bao, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2012 A conf
A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories.
DATE
Cristian Zambelli, Marco Indaco, Michele Fabiano, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi
2012 B conf
A platform-independent user-friendly dictionary from Italian to LIS.
LREC
Umar Shoaib, Nadeem Ahmad, Paolo Prinetto, Gabriele Tiotto
2012 B conf
Efficient system-level aging prediction.
ETS
Nadereh Hatami, Rafal Baranowski, Paolo Prinetto, Hans-Joachim Wunderlich
2011 — conf
A unifying formalism to support automated synthesis of SBSTs for embedded caches.
EWDTS
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto
2011 — conf
An area-efficient 2-D convolution implementation on FPGA for space applications.
IDT
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Gabriele Tiotto, Paolo Prinetto
2011 J jnl
Efficient multi-level fault simulation of HW/SW systems for structural faults.
Sci. China Inf. Sci.
Rafal Baranowski, Stefano Di Carlo, Nadereh Hatami, Michael E. Imhof, Michael A. Kochte, Paolo Prinetto, Hans-Joachim Wunderlich, Christian G. Zoellin
2011 — conf
Genetic Defect Based March Test Generation for SRAM.
EvoApplications (2)
Stefano Di Carlo, Gianfranco Politano, Paolo Prinetto, Alessandro Savino, Alberto Scionti
2011 A conf
Improving accessibility for deaf people: an editor for computer assisted translation through virtual avatars.
ASSETS
Davide Barberis, Nicola Garazzino, Paolo Prinetto, Gabriele Tiotto
2011 — conf
MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches.
Asian Test Symposium
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto
2011 J jnl
Software-Based Self-Test of Set-Associative Cache Memories.
IEEE Trans. Computers
Stefano Di Carlo, Paolo Prinetto, Alessandro Savino
2011 — conf
The Italian Sign Language Sign Bank: Using WordNet for Sign Language corpus creation.
ICCIT
Paolo Prinetto, Umar Shoaib, Gabriele Tiotto
2011 — conf
Validation & Verification of an EDA automated synthesis tool.
IDT
Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto
2010 — conf
A Web Based Platform for Sign Language Corpus Creation.
ICCHP (2)
Davide Barberis, Nicola Garazzino, Elio Piccolo, Paolo Prinetto, Gabriele Tiotto
2010 — conf
Automated synthesis of EDACs for FLASH memories with user-selectable correction capability.
HLDVT
Maurizio Caramia, Michele Fabiano, Andrea Miele, Roberto Piazza, Paolo Prinetto
2010 — conf
Communication interface synthesis from TLM 2.0 to RTL.
EWDTS
Nadereh Hatami, Marco Indaco, Paolo Prinetto, Gabriele Tiotto
2010 — conf
EDACs and test integration strategies for NAND flash memories.
EWDTS
Stefano Di Carlo, Michele Fabiano, Roberto Piazza, Paolo Prinetto
2010 — conf
Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level.
Asian Test Symposium
Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto
2010 — conf
Exploring modeling and testing of NAND flash memories.
EWDTS
Stefano Di Carlo, Michele Fabiano, Roberto Piazza, Paolo Prinetto
2010 — conf
Facilitating testability of TLM FIFO: SystemC implementations.
EWDTS
Homa Alemzadeh, Marco Cimei, Paolo Prinetto, Zainalabedin Navabi
2010 B conf
Microprocessor fault-tolerance via on-the-fly partial reconfiguration.
ETS
Stefano Di Carlo, Andrea Miele, Paolo Prinetto, Antonio Trapanese
2010 — conf
Sign Language synthesis using hand motion acquisition.
EWDTS
Nadereh Hatami, Paolo Prinetto, Gabriele Tiotto
2010 A conf
System reliability evaluation using concurrent multi-level simulation of structural faults.
ITC
Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto
2009 — conf
A FPGA-Based Reconfigurable Software Architecture for Highly Dependable Systems.
Asian Test Symposium
Stefano Di Carlo, Paolo Prinetto, Alberto Scionti
2009 J jnl
Are IEEE-1500-Compliant Cores Really Compliant to the Standard?.
IEEE Des. Test Comput.
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Paolo Prinetto
2009 — conf
Designing health care applications for the deaf.
PervasiveHealth
Paolo Prinetto, Gabriele Tiotto, Andrea Del Principe
2009 — conf
FLARE: A design environment for FLASH-based space applications.
HLDVT
Maurizio Caramia, Stefano Di Carlo, Michele Fabiano, Paolo Prinetto
2009 — conf
System Level Testing via TLM 2.0 Debug Transport Interface.
DFT
Stefano Di Carlo, Nadereh Hatami, Paolo Prinetto, Alessandro Savino
2009 A conf
Test exploration and validation using transaction level models.
DATE
Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Rauf Salimi Khaligh, Martin Radetzki, Hans-Joachim Wunderlich, Stefano Di Carlo, Paolo Prinetto
2009 A conf
Test infrastructures evaluation at transaction level.
ITC
Stefano Di Carlo, Nadereh Hatami, Paolo Prinetto
2008 A conf
"Plug & Test" at System Level via Testable TLM Primitives.
ITC
Homa Alemzadeh, Stefano Di Carlo, Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi
2008 — conf
An Avatar-Based Italian Sign Language Visualization System.
eHealth
Andrea Falletto, Paolo Prinetto, Gabriele Tiotto
2008 — conf
An IEEE 1500 compatible wrapper architecture for testing cores at transaction level.
EWDTS
Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi
2008 B conf
Applying March Tests to K-Way Set-Associative Cache Memories.
ETS
Simone Alpe, Stefano Di Carlo, Paolo Prinetto, Alessandro Savino
2008 — conf
Automating defects simulation and fault modeling for SRAMs.
HLDVT
Stefano Di Carlo, Paolo Prinetto, Alberto Scionti, Zaid Al-Ars
2008 — conf
Functional testing approaches for "BIFST-able" tlm_fifo.
HLDVT
Homa Alemzadeh, Zainalabedin Navabi, Stefano Di Carlo, Alberto Scionti, Paolo Prinetto
2008 J jnl
IEEE Standard 1500 Compliance Verification for Embedded Cores.
IEEE Trans. Very Large Scale Integr. Syst.
Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian
2008 — conf
Influence of Parasitic Capacitance Variations on 65 nm and 32 nm Predictive Technology Model SRAM Core-Cells.
ATS
Stefano Di Carlo, Alessandro Savino, Alberto Scionti, Paolo Prinetto
2008 J jnl
March Test Generation Revealed.
IEEE Trans. Computers
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2008 C conf
Reliability in Application Specific Mesh-Based NoC Architectures.
IOLTS
Fatemeh Refan, Homa Alemzadeh, Saeed Safari, Paolo Prinetto, Zainalabedin Navabi
2007 C conf
Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC.
IOLTS
Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale
2007 — conf
Automating the IEEE std.1500 compliance verification for embedded cores.
HLDVT
Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Alberto Bosio
2007 J jnl
March AB, a state-of-the-art march test for realistic static linked faults and dynamic faults in SRAMs.
IET Comput. Digit. Tech.
Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006 B conf
A 22n March Test for Realistic Static Linked Faults in SRAMs.
ETS
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006 C conf
A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs.
DDECS
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006 J jnl
A Wiki for discussing and promoting best practices in research.
Commun. ACM
Mark D. Hill, Jean-Luc Gaudiot, Mary W. Hall, Joe Marks, Paolo Prinetto, Donna Baglio
2006 — conf
ATPG for Dynamic Burn-In Test in Full-Scan Circuits.
ATS
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006 — conf
Automatic March Tests Generation for Multi-Port SRAMs.
DELTA
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006 A conf
Automatic march tests generations for static linked faults in SRAMs.
DATE
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006 — conf
Memory Fault Simulator for Static-Linked Faults.
ATS
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006 B conf
Single-Event Upset Analysis and Protection in High Speed Circuits.
ETS
Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto
2005 — conf
A GQM Based E-Learning Platform Evaluation.
DMS
Bruno Fabini, Paolo Maresca, Paolo Prinetto, C. Sanghez, Giorgio Santiano
2005 J jnl
Agent-based test and repair of distributed systems.
J. Embed. Comput.
Liviu Miclea, Szilárd Enyedi, Paolo Prinetto, Alfredo Benso
2005 B conf
Automatic March tests generation for static and dynamic faults in SRAMs.
ETS
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2005 A conf
March AB, March AB1: new March tests for unlinked dynamic memory faults.
ITC
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2005 A conf
Reconfigurable systems self-healing using mobile hardware agents.
ITC
Alfredo Benso, Alessandro Cilardo, Nicola Mazzocca, Liviu Miclea, Paolo Prinetto, Szilárd Enyedi
2005 J jnl
System-level functional testing from UML specifications in end-of-production industrial environments.
Int. J. Softw. Tools Technol. Transf.
Andrea Baldini, Alfredo Benso, Paolo Prinetto
2004 — conf
A Dependable Autonomic Computing Environment for Self-Testing of Complex Heterogeneous Systems.
TACoS
Andrea Baldini, Alfredo Benso, Paolo Prinetto
2004 — conf
Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competence in Europ.
DELTA
Marie-Lise Flottes, Yves Bertrand, Luz Balado, Emili Lupon, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, Nicoleta Pricopi, Hans-Joachim Wunderlich
2004 J jnl
Test Technology TC Newsletter.
IEEE Des. Test Comput.
Paolo Prinetto, Alfredo Benso
2004 J jnl
Test Technology Technical Council Newsletter.
J. Electron. Test.
Paolo Prinetto
2004 J jnl
Test Technology Technical Council Newsletter.
J. Electron. Test.
Paolo Prinetto
2004 J jnl
Test Technology Technical Council Newsletter.
J. Electron. Test.
Paolo Prinetto
2004 J jnl
Test Technology Technical Council Newsletter.
J. Electron. Test.
Paolo Prinetto
2004 A conf
Towards Microagent based DBIST/DBISR.
ITC
Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto
2003 J jnl
A Hierarchical Infrastructure for SoC Test Management.
IEEE Des. Test Comput.
Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Yervant Zorian
2003 C conf
A Watchdog Processor to Detect Data and Control Flow Errors.
IOLTS
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2003 A conf
Agent Based DBIST/DBISR And Its Web/Wireless Management.
ITC
Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto
2003 A conf
Data Critically Estimation In Software Applications.
ITC
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri
2003 — conf
Design for Testability for Highly Reconfigurable Component-Based Systems.
TACoS
Andrea Baldini, Paolo Prinetto, Giovanni Denaro, Mauro Pezzè
2003 C conf
Designing and Testing High Dependable Memories for Aerospace Applications.
VLSI-SOC
Andrea S. Brogna, Franco Bigongiari, Silvia Chiusano, Paolo Prinetto, Roberto Saletti
2003 — conf
Exhaustive Test of Several Dependable Memory Architectures Designed by GRAAL Tool.
Asian Test Symposium
Fabrizio Bertuccelli, Franco Bigongiari, Andrea S. Brogna, Giorgio Di Natale, Paolo Prinetto, Roberto Saletti
2003 C conf
FAUST: FAUlt-injection Script-based Tool.
IOLTS
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, I. Solcia, Luca Tagliaferri
2003 J jnl
Online Self-Repair of FIR Filters.
IEEE Des. Test Comput.
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2003 J jnl
Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures.
IEEE Commun. Mag.
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2003 — conf
Test Engineering Education in Europe: the EuNICE-Test Project.
MSE
Yves Bertrand, Marie-Lise Flottes, Luz Balado, Joan Figueras, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, Nicoleta Pricopi, Hans-Joachim Wunderlich, Jean-Pierre Van der Heyden
2002 A conf
An Optimal Algorithm for the Automatic Generation of March Tests.
DATE
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2002 J jnl
An on-line BIST RAM architecture with self-repair capabilities.
IEEE Trans. Reliab.
Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto
2002 — conf
Automated Synthesis of SEU Tolerant Architectures from OO Descriptions.
IOLTW
Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto
2002 A conf
Beyond UML to an End-of-Line Functional Test Engine.
DATE
Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei
2002 J jnl
DFT and BIST of a Multichip Module for High-Energy Physics Experiments.
IEEE Des. Test Comput.
Alfredo Benso, Silvia Chiusano, Paolo Prinetto
2002 A conf
Efficient Design of System Test: A Layered Architecture.
ITC
Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei
2002 J jnl
Initializability analysis of synchronous sequential circuits.
ACM Trans. Design Autom. Electr. Syst.
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
2002 — conf
Specification and Design of a New Memory Fault Simulator.
Asian Test Symposium
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2002 A conf
Static Analysis of SEU Effects on Software Applications.
ITC
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2002 — conf
Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA.
DELTA
Michel Renovell, Penelope Faure, Paolo Prinetto, Yervant Zorian
2001 J jnl
A Self-Repairing Execution Unit for Microprogrammed Processors.
IEEE Micro
Alfredo Benso, Silvia Chiusano, Paolo Prinetto
2001 — conf
Control-Flow Checking via Regular Expressions.
Asian Test Symposium
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri
2001 A conf
Embedded tutorial: TRP: integrating embedded test and ATE.
DATE
Yervant Zorian, Paolo Prinetto, João Paulo Teixeira, Isabel C. Teixeira, Carlos Eduardo Pereira, Octávio Páscoa Dias, Jorge Semião, Peter Muhmenthaler, W. Radermacher
2001 A conf
GRAAL: a tool for highly dependable SRAMs generation.
ITC
Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Franco Bigongiari
2001 J jnl
Guest Editorial.
J. Electron. Test.
Paolo Prinetto, Joan Figueras
2001 — conf
Memory Read Faults: Taxonomy and Automatic Test Generation.
Asian Test Symposium
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2001 A conf
On applying the set covering model to reseeding.
DATE
Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Hans-Joachim Wunderlich
2001 J jnl
Online and Offline BIST in IP-Core Design.
IEEE Des. Test Comput.
Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2001 A conf
SEU effect analysis in an open-source router via a distributed fault injection environment.
DATE
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2001 A conf
Towards a unified test process: from UML to end-of-line functional test.
ITC
Andrea Baldini, Alfredo Benso, Paolo Prinetto, Sergio Mo, Andrea Taddei
2001 — conf
Validation of a Software Dependability Tool via Fault Injection Experiments.
IOLTW
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Luca Tagliaferri, Paolo Prinetto
2000 — conf
'BOND': An Interposition Agents Based Fault Injector for Windows NT.
DFT
Andrea Baldini, Alfredo Benso, Silvia Chiusano, Paolo Prinetto
2000 A conf
A C/C++ Source-to-Source Compiler for Dependable Applications.
DSN
Alfredo Benso, Silvia Chiusano, Paolo Prinetto, Luca Tagliaferri
2000 — conf
A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT.
IOLTW
Alfredo Benso, Silvia Chiusano, Paolo Prinetto
2000 — conf
A Family of Self-Repair SRAM Cores.
IOLTW
Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2000 J jnl
A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures.
J. Electron. Test.
Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian
2000 A conf
A programmable BIST architecture for clusters of multiple-port SRAMs.
ITC
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2000 A conf
A software development kit for dependable applications in embedded systems.
ITC
Alfredo Benso, Silvia Chiusano, Paolo Prinetto
2000 C conf
An SEU Injection Tool to Evaluate DSP-Based Architectures for Space Applications.
ICCD
Alfredo Benso, Stefano Martinetto, Paolo Prinetto, Riccardo Mariani
2000 — conf
An effective distributed BIST architecture for RAMs.
ETW
Monica Lobetti Bodoni, Alfredo Benso, Silvia Chiusano, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2000 A conf
HD
ITC
Alfredo Benso, Silvia Chiusano, Stefano Di Carlo, Paolo Prinetto, Fabio Ricciato, Maurizio Spadari, Yervant Zorian
2000 A conf
Non-intrusive BIST for systems-on-a-chip.
ITC
Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wunderlich
2000 C conf
On Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs.
ICCD
Alfredo Benso, Stefano Di Carlo, Silvia Chiusano, Paolo Prinetto, Fabio Ricciato, Monica Lobetti Bodoni, Maurizio Spadari
2000 A conf
Optimal Hardware Pattern Generation for Functional BIST.
DATE
Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wunderlich
2000 — conf
Self-Repairing in a Micro-Programmed Processor for Dependable Applications.
DFT
Alfredo Benso, Silvia Chiusano, Paolo Prinetto, P. Simonotti, G. Ugo
1999 — conf
A high-level EDA environment for the automatic insertion of HD-BIST structures.
ETW
Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian
1999 A conf
An on-line BISTed SRAM IP core.
ITC
Monica Lobetti Bodoni, Alessio Pricco, Alfredo Benso, Silvia Chiusano, Paolo Prinetto
1999 J jnl
Exploiting Behavioral Information in Gate-Level ATPG.
J. Electron. Test.
Silvia Chiusano, Fulvio Corno, Paolo Prinetto
1999 A conf
HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs.
ITC
Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian
1999 Misc conf
RT-level TPG Exploiting High-Level Synthesis Information.
VTS
Silvia Chiusano, Fulvio Corno, Paolo Prinetto
1999 J jnl
SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Fulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante
1999 A conf
Testing an MCM for high-energy physics experiments: a case study.
ITC
Alfredo Benso, Silvia Chiusano, Paolo Prinetto, Simone Giovannetti, Riccardo Mariani, Silvano Motto
1999 J jnl
Testing embedded memories in telecommunication systems.
IEEE Commun. Mag.
Stefano Barbagallo, Monica Lobetti Bodoni, Alfredo Benso, Silvia Chiusano, Paolo Prinetto
1998 — conf
A Test Pattern Generation Algorithm Exploiting Behavioral Information.
Asian Test Symposium
Silvia Chiusano, Fulvio Corno, Paolo Prinetto
1998 Misc conf
A Test Pattern Generation Methodology for Low-Power Consumption.
VTS
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998 A conf
A fault injection environment for microprocessor-based boards.
ITC
Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998 J jnl
EXFI: a low-cost fault injection system for embedded microprocessor-based boards.
ACM Trans. Design Autom. Electr. Syst.
Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1998 A conf
Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection.
DATE
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante
1998 A conf
Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques.
DATE
Elizabeth M. Rudnick, Roberto Vietti, Akilah Ellis, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1998 J jnl
Integrating Online and Offline Testing of a Switching Memory.
IEEE Des. Test Comput.
Stefano Barbagallo, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1998 Misc conf
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits.
VTS
Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Matteo Sonza Reorda
1998 J jnl
The General Product Machine: a New Model for Symbolic FSM Traversal.
Formal Methods Syst. Des.
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1997 — conf
A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits.
Asian Test Symposium
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
1997 C conf
A new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits.
ICCD
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero
1997 — conf
A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs.
ED&TC
Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Raimund Ubar
1997 Misc conf
Cellular automata for deterministic sequential test pattern generation.
VTS
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1997 — conf
Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments.
DFT
Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Jaan Raik, Raimund Ubar
1997 — conf
Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG.
Asian Test Symposium
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
1997 B conf
Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization.
ICTAI
S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997 — conf
Guaranteeing Testability in Re-encoding for Low Power.
Asian Test Symposium
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997 Misc conf
Hardware Test: Can We Learn from Software Testing?
VTS
J. Abraham, Phyllis G. Frankl, Christian Landrault, Meryem Marzouki, Paolo Prinetto, Chantal Robach, Pascale Thévenod-Fosse
1997 — conf
Hybrid symbolic-explicit techniques for the graph coloring problem.
ED&TC
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1997 — conf
New static compaction techniques of test sequences for sequential circuits.
ED&TC
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997 Misc conf
SAARA: a simulated annealing algorithm for test pattern generation for digital circuits.
SAC
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1997 — conf
Simulation-based verification of network protocols performance.
CHARME
Mario Baldi, Fulvio Corno, Maurizio Rebaudengo, Paolo Prinetto, Matteo Sonza Reorda, Giovanni Squillero
1997 A conf
Testability Analysis and ATPG on Behavioral RT-Level VHDL.
ITC
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1996 B conf
A Genetic Algorithm for Automatic Generation of Test Logic for Digital Circuits.
ICTAI
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1996 — conf
A Parallel Genetic Algorithm for Automatic Generation of Test Sequences for Digital Circuits.
HPCN Europe
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996 — conf
Advanced Techniques for GA-based sequential ATPGs.
ED&TC
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, R. Mosca
1996 J jnl
Circular Self-Test Path for FSMs.
IEEE Des. Test Comput.
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1996 A conf
Comparing Topological, Symbolic and GA-based ATPGs: An Experimental Approach.
ITC
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996 A conf
Exploiting Competing Subpopulations for Automatic Generation of Test Sequences for Digital Cicuits.
PPSN
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996 — conf
Fault behavior observation of a microprocessor system through a VHDL simulation-based fault injection experiment.
EURO-DAC
Paolo Prinetto, Alfredo Benso, Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Reorda, Arturo M. Amendola, Leonardo Impagliazzo, P. Marmo
1996 — conf
Fault tolerant and BIST design of a FIFO cell.
EURO-DAC
Paolo Prinetto, Fulvio Corno, Matteo Sonza Reorda
1996 J jnl
GATTO: a genetic algorithm for automatic test pattern generation for large synchronous sequential circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996 Misc conf
On-line Testing of an Off-the-shelf Microprocessor Board for Safety-critical Applications.
EDCC
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Maurizio Damiani, Leonardo Impagliazzo, G. Sartore
1996 A conf
Partial Scan Flip Flop Selection for Simulation-Based Sequential ATPGs.
ITC
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1996 Misc conf
Scan insertion criteria for low design impact.
VTS
Stefano Barbagallo, Monica Lobetti Bodoni, Davide Medina, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1996 — conf
Self-Checking and Fault Tolerant Approaches Can Help BIST Fault Coverage: A Case Study.
ED&TC
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1995 — conf
A PVM tool for automatic test generation on parallel and distributed systems.
HPCN Europe
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
1995 Misc conf
A portable ATPG tool for parallel and distributed systems.
VTS
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
1995 — conf
GARDA: a diagnostic ATPG for large synchronous sequential circuits.
ED&TC
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1995 Misc conf
Improving topological ATPG with symbolic techniques.
VTS
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Uwe Gläser, Heinrich Theodor Vierhaus
1995 J jnl
Industrial BIST of Embedded RAMs.
IEEE Des. Test Comput.
Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina
1995 — conf
Proving testing preorders for process algebra descriptions.
ED&TC
Fulvio Corno, Marco Cusinato, Mario Ferrero, Paolo Prinetto
1995 A conf
Testing a Switching Memory in a Telcommunication System.
ITC
Stefano Barbagallo, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1995 — conf
Using symbolic techniques to find the maximum clique in very large sparse graphs.
ED&TC
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1994 Misc conf
A new functional fault model for system-level descriptions.
VTS
Paolo Camurati, Fulvio Corno, Michela Meo, Paolo Prinetto
1994 — conf
A process algebra interpretation of a verification oriented overlanguage of VHDL.
EURO-DAC
Catherine Bayol, Bernard Soulas, Dominique Borrione, Fulvio Corno, Paolo Prinetto
1994 A conf
An Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms.
ITC
Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1994 — conf
An experimental analysis of the effectiveness of the circular self-test path technique.
EURO-DAC
Paolo Prinetto, Fulvio Corno, Matteo Sonza Reorda
1994 Misc conf
An industrial experience in the built-in self test of embedded RAMs.
VTS
Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina
1994 B conf
GATTO: An Intelligent Tool for Automatic Test Pattern Generation for Digital Circuits.
ICTAI
Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Enzo Veiluva
1994 A conf
Making the Circular Self-Test Path Technique Effective for Real Circuits.
ITC
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1994 — conf
System-Level Modeling and Verification: a Comprehensive Design Methodology.
EDAC-ETC-EUROASIC
Paolo Camurati, Fulvio Corno, Paolo Prinetto, Catherine Bayol, Bernard Soulas
1993 — conf
A Methodology for System-Level Design for Verifiability.
CHARME
Paolo Camurati, Fulvio Corno, Paolo Prinetto
1993 J jnl
An approach to sequential circuit diagnosis based on formal verification techniques.
J. Electron. Test.
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1993 — conf
An efficient tool for system-level verification of behaviors and temporal properties.
EURO-DAC
Paolo Camurati, Fulvio Corno, Paolo Prinetto
1993 — conf
Exploiting Symbolic Traversal Techniques for Efficient Process Algebra Manipulation.
CHDL
Paolo Camurati, Fulvio Corno, Paolo Prinetto
1992 A* conf
A New Model for Improving symbolic Product Machine Traversal.
DAC
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda
1992 — conf
Cross-fertilizing FSM verification techniques and sequential diagnosis.
EURO-DAC
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1992 A conf
Sequential Circuit Diagnosis Based on Formal Verification Techniques.
ITC
Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1991 — conf
Proving finite state machines correct with an automaton-based method.
Great Lakes Symposium on VLSI
Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda
1991 — conf
Resolution-based correctness proofs of synchronous circuits.
EURO-DAC
Paolo Camurati, Tiziana Margaria, Paolo Prinetto
1991 J jnl
TPDL: Extended Temporal Profile Description Language.
Softw. Pract. Exp.
Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1990 A conf
A diagnostic test pattern generation algorithm.
ITC
Paolo Camurati, Davide Medina, Paolo Prinetto, Matteo Sonza Reorda
1990 J jnl
Assessing the diagnostic power of test pattern sets.
Microprocessing and Microprogramming
Paolo Camurati, Antonio Lioy, Paolo Prinetto, Matteo Sonza Reorda
1990 — conf
Diagnosis oriented test pattern generation.
EURO-DAC
Paolo Camurati, Antonio Lioy, Paolo Prinetto, Matteo Sonza Reorda
1990 J jnl
Exact probabilistic testability measures for multi-output circuits.
J. Electron. Test.
Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1990 — conf
Model Checking and Graph Theory in Sequential ATPG.
CAV (DIMACS/AMS volume)
Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda
1990 J jnl
The OTTER environment for resolution-based proof of hardware correctness.
Microprocessing and Microprogramming
Paolo Camurati, Tiziana Margaria, Paolo Prinetto
1990 A* conf
The Use of Model Checking in ATPG for Sequential Circuits.
CAV
Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda
1989 J jnl
Expressing logical and temporal conditions in simulation environments: TPDL
Microprocessing and Microprogramming
Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1989 J jnl
Knowledge-based systems as an aid to computer-aided repair.
Microprocess. Microsystems
Paolo Camurati, Marco Mezzalama, Paolo Prinetto
1989 J jnl
Systolic array description in F
Microprocessing and Microprogramming
Paolo Camurati, Tiziana Margaria, Paolo Prinetto
1989 — conf
Zero-Defect Designs, Why and How: Formal Verification vs. Automated Synthesis.
IFIP Congress
Dominique Borrione, Paolo Prinetto
1988 C conf
A functional approach to formal hardware verification: the MTI experience.
ICCD
Dominique Borrione, Paolo Camurati, J. L. Paillet, Paolo Prinetto
1988 J jnl
ESTA: an expert system for DFT rule verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Paolo Camurati, Paolo Gianoglio, Renato Gianoglio, Paolo Prinetto
1988 J jnl
Formal Verification of Hardware Correctness: Introduction and Survey of Current Research.
Computer
Paolo Camurati, Paolo Prinetto
1988 C conf
Random testability analysis: comparing and evaluating existing approaches.
ICCD
Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1986 — conf
Experiences in Prolog-Based DFT Rule Checking.
FJCC
Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto
1985 J jnl
Testing Strategy and Technique for Macro-Based Circuits.
IEEE Trans. Computers
Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto
1984 J jnl
PART: Programmable Array Testing Based on a Partitioning Algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto
1983 J jnl
A Hierarchical Description Model for Microcode.
IEEE Trans. Computers
Marco Mezzalama, Paolo Prinetto
1983 A* conf
A new integrated system for PLA testing and verification.
DAC
Fabio Somenzi, Silvano Gai, Marco Mezzalama, Paolo Prinetto
1983 J jnl
A review of fault models for lsi/vlsi devices.
Softw. Microsystems
Silvano Gai, Marco Mezzalama, Paolo Prinetto
1982 J jnl
A Machine-independent Approach to Microprogram Synthesis.
Softw. Pract. Exp.
Marco Mezzalama, Paolo Prinetto
1982 A* conf
Microcode compaction via microblock definition.
MICRO
Marco Mezzalama, Paolo Prinetto, G. Filippi
1979 A* conf
Design and implementation of a flexible and interactive microprogram simulator.
MICRO
Marco Mezzalama, Paolo Prinetto