Paolo Maistri - RankMe

86 papers A 6B 6C 26Journal 12Unranked 35

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Analysis of Voltage Drop and Temperature Effects on Harmonic Errors Under EMFI on ROs. LATS Sami El Amraoui, Luc Salvo, Régis Leveugle, Paolo Maistri
2025	J	`jnl`	Countermeasures Against Fault Injection Attacks in Processors: A Review. Inf. Roua Boulifa, Giorgio Di Natale, Paolo Maistri
2025	B	`conf`	Early Result Capture: Racing Conditions in Pipeline due to Clock Glitches. ETS Roua Boulifa, Paolo Maistri, Giorgio Di Natale
2025	B	`conf`	European Test Symposium Teams: an Anniversary Snapshot. ETS Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilárd Enyedi, I. Stefan, Ovidiu Stan, Cosmina Corches, Z. Peng, Petru Eles, Rolf Drechsler, S. Eggersglüß, Görschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, P.-Y. Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, S. Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, P. Girard, Marcello Traiola, Arnaud Virazel, F. Fernandes Dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letícia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, F. Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, A. Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025	—	`conf`	Laser Fault Injection on RO-Based PUFs Implemented on FPGA. DFT Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, Jean-Max Dutertre, David Hély, Vincent Beroulle, Giorgio Di Natale
2025	J	`jnl`	On the Harmonic Locking of Ring Oscillators under Single ElectroMagnetic Pulsed Fault Injection in FPGAs. J. Electron. Test. Sami El Amraoui, Aghiles Douadi, Régis Leveugle, Paolo Maistri
2025	C	`conf`	Pulsed ElectroMagnetic Fault Injection Attack on a Time Measurement-based Arbiter-PUF. DSD Azzadine Thajte, Sami El Amraoui, Paolo Maistri, Régis Leveugle, Giorgio Di Natale, Laurent Fesquet
2025	B	`conf`	Pulsed Electromagnetic Fault Injection Attack on Ring Oscillator-based PUFs in FPGAs. ETS Sami El Amraoui, Aghiles Douadi, Régis Leveugle, Paolo Maistri
2025	C	`conf`	Real-Time Fault Analysis in RISC-V Processors: A Case Study Using the Internal State Monitor. IOLTS Roua Boulifa, Yongxin Sun, Giorgio Di Natale, Paolo Maistri
2025	B	`conf`	Reliability Under Stress: The Impact of Localized Aging on RO-PUF Architectures in FPGAs. ETS Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, David Hély, Vincent Beroulle, Giorgio Di Natale
2025	—	`conf`	Veritas-PUF: A Countermeasure against X-Ray Tampering and Side Channel Attacks. ATS Nasr-Eddine Ouldei Tebina, Luc Salvo, Marc Xander Makkes, Nacer-Eddine Zergainoh, Paolo Maistri
2024	C	`conf`	Capture the Pulse: Impact of FPGA Resource Utilization on EM Fault Injection Attacks Detection. VLSI-SoC Sami El Amraoui, Régis Leveugle, Paolo Maistri
2024	—	`conf`	Challenges in FPGA Resource Allocation and Placement for Efficient EM Fault Attack Detection Strategies. VLSI-SoC (Selected Papers) Sami El Amraoui, Régis Leveugle, Paolo Maistri
2024	C	`conf`	Choose your Path: Control of Ring Oscillators EMFI Susceptibility through FPGA P&R Constraints. DDECS Sami El Amraoui, Régis Leveugle, Paolo Maistri
2024	J	`jnl`	Cross-layer analysis of clock glitch fault injection while fetching variable-length instructions. J. Cryptogr. Eng. Ihab Alshaer, Gijs Burghoorn, Brice Colombier, Christophe Deleuze, Vincent Beroulle, Paolo Maistri
2024	A	`conf`	Enhancing Side-Channel Attacks Through X-Ray-Induced Leakage Amplification. DATE Nasr-Eddine Ouldei Tebina, Luc Salvo, Laurent Maingault, Nacer-Eddine Zergainoh, Guillaume Hubert, Paolo Maistri
2024	—	`conf`	Harmonic Response of Ring Oscillators under Single ElectroMagnetic Pulsed Fault Injection. LATS Sami El Amraoui, Aghiles Douadi, Régis Leveugle, Paolo Maistri
2024	—	`conf`	Internal State Monitoring in RISC-V Microarchitectures for Security Purpose. LATS Roua Boulifa, Giorgio Di Natale, Paolo Maistri
2024	B	`conf`	Modeling Thermal Effects For Biasing PUFs. ETS Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, David Hély, Vincent Beroulle, Giorgio Di Natale
2024	—	`conf`	Non-Invasive Attack on Ring Oscillator-Based PUFs Through Localized X-Ray Irradiation. HOST Nasr-Eddine Ouldei Tebina, Aghiles Douadi, Luc Salvo, Vincent Beroulle, Nacer-Eddine Zergainoh, Guillaume Hubert, Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Maistri
2023	C	`conf`	A Study of High Temperature Effects on Ring Oscillator Based Physical Unclonable Functions. IOLTS Aghiles Douadi, Giorgio Di Natale, Paolo Maistri, Elena-Ioana Vatajelu, Vincent Beroulle
2023	C	`conf`	Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack. IOLTS Maryam Esmaeilian, Aghiles Douadi, Zahra Kazemi, Vincent Beroulle, Amir-Pasha Mirbaha, Mahdi Fazeli, Elena-Ioana Vatajelu, Paolo Maistri, Giorgio Di Natale
2023	C	`conf`	Microarchitectural Insights into Unexplained Behaviors Under Clock Glitch Fault Injection. CARDIS Ihab Alshaer, Brice Colombier, Christophe Deleuze, Vincent Beroulle, Paolo Maistri
2023	C	`conf`	Ray-Spect: Local Parametric Degradation for Secure Designs: An application to X-Ray Fault Injection. IOLTS Nasr-Eddine Ouldei Tebina, Laurent Maingault, Nacer-Eddine Zergainoh, Guillaume Hubert, Paolo Maistri
2023	—	`conf`	Simulation Methodology for Assessing X-Ray Effects on Digital Circuits. DFT Nasr-Eddine Ouldei Tebina, Nacer-Eddine Zergainoh, Guillaume Hubert, Paolo Maistri
2022	A	`conf`	A Low-Cost Methodology for EM Fault Emulation on FPGA. DATE Paolo Maistri, Jiayun Po
2022	C	`conf`	Electromagnetic Leakage Assessment of a Proven Higher-Order Masking of AES S-Box. DSD Nicolas Bordes, Paolo Maistri
2022	J	`jnl`	Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions. IEEE Des. Test Michele Portolan, Emanuele Valea, Paolo Maistri, Giorgio Di Natale
2022	C	`conf`	Variable-Length Instruction Set: Feature or Bug? DSD Ihab Alshaer, Brice Colombier, Christophe Deleuze, Vincent Beroulle, Paolo Maistri
2022	—	`conf`	X-Ray Fault Injection: Reviewing Defensive Approaches from a Security Perspective. DFT Nasr-Eddine Ouldei Tebina, Nacer-Eddine Zergainoh, Paolo Maistri
2021	—	`conf`	Microarchitecture-aware Fault Models: Experimental Evidence and Cross-Layer Inference Methodology. DTIS Ihab Alshaer, Brice Colombier, Christophe Deleuze, Vincent Beroulle, Paolo Maistri
2021	—	`conf`	Secure Test with RSNs: Seamless Authenticated Extended Confidentiality. NEWCAS Paolo Maistri, Vincent Reynaud, Michele Portolan, Régis Leveugle
2021	A	`conf`	Security EDA Extension through P1687.1 and 1687 Callbacks. ITC Michele Portolan, Vincent Reynaud, Paolo Maistri, Régis Leveugle, Giorgio Di Natale
2020	C	`conf`	A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System. IOLTS Michele Portolan, R. Silveira Feitoza, Ghislain Takam Tchendjou, Vincent Reynaud, Kalpana Senthamarai Kannan, Manuel J. Barragán, Emmanuel Simeu, Paolo Maistri, Lorena Anghel, Régis Leveugle, Salvador Mir
2020	B	`conf`	Dynamic Authentication-Based Secure Access to Test Infrastructure. ETS Michele Portolan, Vincent Reynaud, Paolo Maistri, Régis Leveugle
2020	—	`conf`	Local Clock Glitching Fault Injection with Application to the ASCON Cipher. iSES G. Surya, Paolo Maistri, Sriram Sankaran
2019	—	`conf`	A Comprehensive Approach to a Trusted Test Infrastructure. IVSW Marc Merandat, Vincent Reynaud, Emanuele Valea, Jérôme Quévremont, Nicolas Valette, Paolo Maistri, Régis Leveugle, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre, Giorgio Di Natale
2018	J	`jnl`	Hardware Support for Security in the Internet of Things: From Lightweight Countermeasures to Accelerated Homomorphic Encryption. Inf. Régis Leveugle, Asma Mkhinini, Paolo Maistri
2018	C	`conf`	Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model. FDTC Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Stephan De Castro, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre
2018	C	`conf`	The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks. IOLTS Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre
2017	C	`conf`	HLS design of a hardware accelerator for Homomorphic Encryption. DDECS Asma Mkhinini, Paolo Maistri, Régis Leveugle, Rached Tourki
2016	—	`conf`	A flexible RNS-based large polynomial multiplier for Fully Homomorphic Encryption. IDT Asma Mkhinini, Paolo Maistri, Régis Leveugle, Rached Tourki, Mohsen Machhout
2016	J	`jnl`	Analysis of laser-induced errors: RTL fault models versus layout locality characteristics. Microprocess. Microsystems Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle
2016	J	`jnl`	Dummy operations in scalar multiplication over elliptic curves: A tradeoff between security and performance. Microprocess. Microsystems Simon Pontie, Paolo Maistri, Régis Leveugle
2016	C	`conf`	HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic. DSD Simon Pontie, Alban Bourge, Adrien Prost-Boucle, Paolo Maistri, Olivier Muller, Régis Leveugle, Frédéric Rousseau
2016	—	`conf`	On fault injections for early security evaluation vs. laser-based attacks. IVSW Régis Leveugle, A. Chahed, Paolo Maistri, Athanasios Papadimitriou, David Hély, Vincent Beroulle
2016	A	`conf`	On the development of a new countermeasure based on a laser attack RTL fault model. DATE Charalampos Ananiadis, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle
2015	—	`conf`	Polynomial multipliers for fully homomorphic encryption on FPGA. ReConFig C. Jayet-Griffon, Marie-Angela Cornelie, Paolo Maistri, Philippe Elbaz-Vincent, Régis Leveugle
2015	—	`conf`	Validation of RTL laser fault injection model with respect to layout information. HOST Athanasios Papadimitriou, Marios Tampas, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle
2014	A	`conf`	A multiple fault injection methodology based on cone partitioning towards RTL modeling of laser attacks. DATE Athanasios Papadimitriou, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle
2014	C	`conf`	An Elliptic Curve Crypto-Processor Secured by Randomized Windows. DSD Simon Pontie, Paolo Maistri, Régis Leveugle
2014	—	`conf`	Composite fields against side channel analysis for the advanced encryption standard. ICECS Matteo Bollo, Paolo Maistri
2014	C	`conf`	Electromagnetic analysis and fault injection onto secure circuits. VLSI-SoC Paolo Maistri, Régis Leveugle, Lilian Bossuet, Alain Aubert, Viktor Fischer, Bruno Robisson, Nicolas Moro, Philippe Maurine, Jean-Max Dutertre, Mathieu Lisart
2014	—	`conf`	Electromagnetic attacks on embedded devices: A model of probe-circuit power coupling. DTIS Diego Alberto, Paolo Maistri, Régis Leveugle
2014	—	`conf`	Laser-Induced Fault Effects in Security-Dedicated Circuits. VLSI-SoC (Selected Papers) Vincent Beroulle, Philippe Candelier, Stephan De Castro, Giorgio Di Natale, Jean-Max Dutertre, Marie-Lise Flottes, David Hély, Guillaume Hubert, Régis Leveugle, Feng Lu, Paolo Maistri, Athanasios Papadimitriou, Bruno Rouzeyre, Clément Tavernier, Pierre Vanhauwaert
2014	C	`conf`	Laser-induced fault effects in security-dedicated circuits. VLSI-SoC Régis Leveugle, Paolo Maistri, Pierre Vanhauwaert, Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Guillaume Hubert, Stephan De Castro, Jean-Max Dutertre, Alexandre Sarafianos, Noemie Boher, Mathieu Lisart, Joel Damiens, Philippe Candelier, Clément Tavernier
2014	—	`conf`	On error models for RTL security evaluations. DTIS Pierre Vanhauwaert, Paolo Maistri, Régis Leveugle, Athanasios Papadimitriou, David Hély, Vincent Beroulle
2014	—	`conf`	Randomized windows for secure scalar multiplication on elliptic curves. ASAP Simon Pontie, Paolo Maistri
2013	—	`conf`	An evaluation of an AES implementation protected against EM analysis. ACM Great Lakes Symposium on VLSI Paolo Maistri, Sébastien Tiran, Philippe Maurine, Israel Koren, Régis Leveugle
2013	—	`conf`	Countermeasures against EM analysis for a secured FPGA-based AES implementation. ReConFig Paolo Maistri, Sébastien Tiran, Philippe Maurine, Israel Koren, Régis Leveugle
2013	J	`jnl`	Forecasting the Effects of Electromagnetic Fault Injections on Embedded Cryptosystems. Inf. Secur. J. A Glob. Perspect. Diego Alberto, Paolo Maistri, Régis Leveugle
2011	C	`conf`	10-Gigabit Throughput and Low Area for a Hardware Implementation of the Advanced Encryption Standard. DSD Paolo Maistri, Régis Leveugle
2011	C	`conf`	Countermeasures against fault attacks: The good, the bad, and the ugly. IOLTS Paolo Maistri
2011	J	`jnl`	Glitch and Laser Fault Attacks onto a Secure AES Implementation on a SRAM-Based FPGA. J. Cryptol. Gaetan Canivet, Paolo Maistri, Régis Leveugle, Jessy Clédière, Florent Valette, Marc Renaudin
2010	—	`conf`	Dependability analysis of a countermeasure against fault attacks by means of laser shots onto a SRAM-based FPGA. ASAP Gaetan Canivet, Paolo Maistri, Régis Leveugle, Frédéric Valette, Jessy Clédière, Marc Renaudin
2009	—	`conf`	Pruning single event upset faults with petri nets. LATW Paolo Maistri
2009	A	`conf`	Statistical fault injection: Quantified error and confidence. DATE Régis Leveugle, A. Calvez, Paolo Maistri, Pierre Vanhauwaert
2009	C	`conf`	Towards automated fault pruning with Petri Nets. IOLTS Paolo Maistri, Régis Leveugle
2008	J	`jnl`	Double-Data-Rate Computation as a Countermeasure against Fault Analysis. IEEE Trans. Computers Paolo Maistri, Régis Leveugle
2008	—	`conf`	Software BIST capabilities of a symmetric cipher. ICECS Paolo Maistri, Cyril Excoffon, Régis Leveugle
2008	C	`conf`	Software Self-Testing of a Symmetric Cipher with Error Detection Capability. IOLTS Paolo Maistri, Cyril Excoffon, Régis Leveugle
2007	C	`conf`	A Novel Double-Data-Rate AES Architecture Resistant against Fault Injection. FDTC Paolo Maistri, Pierre Vanhauwaert, Régis Leveugle
2007	J	`jnl`	An Operation-Centered Approach to Fault Detection in Symmetric Cryptography Ciphers. IEEE Trans. Computers Luca Breveglieri, Israel Koren, Paolo Maistri
2007	—	`conf`	Evaluation of Register-Level Protection Techniques for the Advanced Encryption Standard by Multi-Level Fault Injections. DFT Paolo Maistri, Pierre Vanhauwaert, Régis Leveugle
2006	C	`conf`	A Fault Attack Against the FOX Cipher Family. FDTC Luca Breveglieri, Israel Koren, Paolo Maistri
2006	C	`conf`	A Note on Error Detection in an RSA Architecture by Means of Residue Codes. IOLTS Luca Breveglieri, Paolo Maistri, Israel Koren
2006	—	`—`	Cryptographic algorithms and architectures and their connections with errors and reliability. Paolo Maistri
2006	C	`conf`	Incorporating Error Detection in an RSA Architecture. FDTC Luca Breveglieri, Israel Koren, Paolo Maistri, M. Ravasio
2005	—	`conf`	Incorporating Error Detection and Online Reconfiguration into a Regular Architecture for the Advanced Encryption Standard. DFT Luca Breveglieri, Israel Koren, Paolo Maistri
2004	—	`conf`	An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost. DFT Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri
2004	—	`conf`	Detecting Faults in Four Symmetric Key Block Ciphers. ASAP Luca Breveglieri, Israel Koren, Paolo Maistri
2003	—	`conf`	Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm. ASAP Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
2003	—	`conf`	Detecting and Locating Faults in VLSI Implementations of the Advanced Encryption Standard. DFT Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
2003	J	`jnl`	Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. IEEE Trans. Computers Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
2002	—	`conf`	A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard. DFT Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri
2002	—	`conf`	On the Propagation of Faults and Their Detection in a Hardware Implementation of the Advanced Encryption Standard. ASAP Guido Bertoni, Luca Breveglieri, Israel Koren, Paolo Maistri, Vincenzo Piuri