Paolo Camurati

78 papers A* 6A 9B 4C 7Misc 3Journal 27Unranked 21

Year	Rank	Type	Title / Venue / Authors
2020	J	`jnl`	Reducing Interpolant Circuit Size Through SAT-Based Weakening. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2019	C	`conf`	KPIs for Optimal Location of charging stations for Electric Vehicles: the Biella case-study. FedCSIS Edoardo Fadda, Daniele Manerba, Roberto Tadei, Paolo Camurati, Gianpiero Cabodi
2019	J	`jnl`	Logic Synthesis for Interpolant Circuit Compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2019	—	`conf`	Model Checking Speculation-Dependent Security Properties: Abstracting and Reducing Processor Models for Sound and Complete Verification. C2SI Gianpiero Cabodi, Paolo Camurati, Fabrizio F. Finocchiaro, Danilo Vendraminetto
2018	J	`jnl`	To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking. Int. J. Softw. Tools Technol. Transf. Gianpiero Cabodi, Paolo Camurati, Carmelo Loiacono, Marco Palena, Paolo Pasini, Denis Patti, Stefano Quer
2017	J	`jnl`	Embedded Systems Secure Path Verification at the Hardware/Software Interface. IEEE Des. Test Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro, Francesco Savarese, Danilo Vendraminetto
2017	B	`conf`	Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper). SEFM Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2017	J	`jnl`	SAT solver management strategies in IC3: an experimental approach. Formal Methods Syst. Des. Gianpiero Cabodi, Paolo Camurati, Alan Mishchenko, Marco Palena, Paolo Pasini
2016	B	`conf`	A 7/2-Approximation Algorithm for the Maximum Duo-Preservation String Mapping Problem. CPM Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
2016	J	`jnl`	A Greedy Approach to Answer Reachability Queries on DAGs. CoRR Nicolas Boria, Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Stefano Quer
2016	J	`jnl`	A graph-labeling approach for efficient cone-of-influence computation in model-checking problems with multiple properties. Softw. Pract. Exp. Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2016	B	`conf`	Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening. FMCAD Gianpiero Cabodi, Paolo Camurati, Marco Palena, Paolo Pasini, Danilo Vendraminetto
2016	—	`conf`	Secure Path Verification. IVSW Gianpiero Cabodi, Paolo Camurati, Sebastiano F. Finocchiaro, Carmelo Loiacono, Francesco Savarese, Danilo Vendraminetto
2009	A	`conf`	Speeding up model checking by exploiting explicit and hidden verification constraints. DATE Gianpiero Cabodi, Paolo Camurati, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
2008	A	`conf`	Automated abstraction by incremental refinement in interpolant-based model checking. ICCAD Gianpiero Cabodi, Paolo Camurati, Marco Murciano
2008	B	`conf`	Trading-Off SAT Search and Variable Quantifications for Effective Unbounded Model Checking. FMCAD Gianpiero Cabodi, Paolo Camurati, Luz Amanda Garcia, Marco Murciano, Sergio Nocco, Stefano Quer
2002	A*	`conf`	Can BDDs compete with SAT solvers on bounded model checking? DAC Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2002	A	`conf`	Dynamic Scheduling and Clustering in Symbolic Image Computation. DATE Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2001	A	`conf`	Biasing symbolic search by means of dynamic activity profiles. DATE Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2001	J	`jnl`	Reachability analysis of large circuits using disjunctive partitioning and partial iterative squaring. J. Syst. Archit. Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2000	J	`jnl`	Improving symbolic reachability analysis by means of activityprofiles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2000	J	`jnl`	Symbolic forward/backward traversals of large finite state machines. J. Syst. Archit. Gianpiero Cabodi, Paolo Camurati, Stefano Quer
2000	J	`jnl`	Verification of Similar FSMs by Mixing Incremental Re-encoding, Reachability Analysis, and Combinational Checks. Formal Methods Syst. Des. Stefano Quer, Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Ellen Sentovich, Robert K. Brayton
1999	A	`conf`	Computing Timed Transition Relations for Sequential Cycle-Based Simulation. DATE Gianpiero Cabodi, Paolo Camurati, Claudio Passerone, Stefano Quer
1999	A*	`conf`	Improving Symbolic Traversals by Means of Activity Profiles. DAC Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1999	J	`jnl`	Improving the efficiency of BDD-based operators by means of partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1998	J	`jnl`	Auxiliary variables for BDD-based representation and manipulation of Boolean functions. ACM Trans. Design Autom. Electr. Syst. Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1998	J	`jnl`	Memory Optimization in Function and Set Manipulation with BDDs. Softw. Pract. Exp. Gianpiero Cabodi, Stefano Quer, Paolo Camurati
1998	J	`jnl`	The General Product Machine: a New Model for Symbolic FSM Traversal. Formal Methods Syst. Des. Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1997	—	`conf`	A parallel approach to symbolic traversal based on set partitioning. CHARME Gianpiero Cabodi, Paolo Camurati, Antonio Lioy, Massimo Poncino, Stefano Quer
1997	A*	`conf`	Disjunctive Partitioning and Partial Iterative Squaring: An Effective Approach for Symbolic Traversal of Large Circuits. DAC Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer
1997	J	`jnl`	Symbolic FSM traversals based on the transition relation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gianpiero Cabodi, Paolo Camurati
1997	—	`conf`	Verification and synthesis of counters based on symbolic techniques. ED&TC Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer
1996	—	`conf`	Decomposed symbolic forward traversals of large finite state machines. EURO-DAC Stefano Quer, Gianpiero Cabodi, Paolo Camurati
1996	C	`conf`	Enhancing FSM Traversal by Temporary Re-Encoding. ICCD Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich
1996	A	`conf`	Improved reachability analysis of large finite state machines. ICCAD Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1996	—	`conf`	Incremental re-encoding for symbolic traversal of product machines. EURO-DAC Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer, Robert K. Brayton, Ellen Sentovich
1995	—	`conf`	Computing subsets of equivalence classes for large FSMs. EURO-DAC Gianpiero Cabodi, Stefano Quer, Paolo Camurati
1995	—	`ed.`	Correct Hardware Design and Verification Methods, IFIP WG 10.5 Advanced Research Working Conference, CHARME '95, Frankfurt/Main, Germany, October 2-4, 1995, Proceedings CHARME Paolo Camurati, Hans Eveking
1995	J	`jnl`	Industrial BIST of Embedded RAMs. IEEE Des. Test Comput. Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina
1995	—	`conf`	Transforming boolean relations by symbolic encoding. CHARME Gianpiero Cabodi, Stefano Quer, Paolo Camurati
1994	Misc	`conf`	A new functional fault model for system-level descriptions. VTS Paolo Camurati, Fulvio Corno, Michela Meo, Paolo Prinetto
1994	Misc	`conf`	An industrial experience in the built-in self test of embedded RAMs. VTS Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda, Stefano Barbagallo, Andrea Burri, Davide Medina
1994	A*	`conf`	Auxiliary Variables for Extending Symbolic Traversal Techniques to Data Paths. DAC Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1994	C	`conf`	Detecting hard faults with combined approximate forward/backward symbolic techniques. ISCAS Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1994	C	`conf`	Efficient State Space Pruning in Symbolic Backward Traversal. ICCD Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1994	A	`conf`	Full-Symbolic ATPG for Large Circuits. ITC Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1994	—	`conf`	Symbolic exploration of large circuits with enhanced forward/backward traversals. EURO-DAC Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1994	—	`conf`	Symbolic traversals of data paths with auxiliary variables. Great Lakes Symposium on VLSI Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1994	—	`conf`	System-Level Modeling and Verification: a Comprehensive Design Methodology. EDAC-ETC-EUROASIC Paolo Camurati, Fulvio Corno, Paolo Prinetto, Catherine Bayol, Bernard Soulas
1993	—	`conf`	A Methodology for System-Level Design for Verifiability. CHARME Paolo Camurati, Fulvio Corno, Paolo Prinetto
1993	—	`conf`	Advancements in Symbolic Traversal Technique. CHARME Gianpiero Cabodi, Paolo Camurati
1993	J	`jnl`	An approach to sequential circuit diagnosis based on formal verification techniques. J. Electron. Test. Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1993	—	`conf`	An efficient tool for system-level verification of behaviors and temporal properties. EURO-DAC Paolo Camurati, Fulvio Corno, Paolo Prinetto
1993	C	`conf`	Exploiting Cofactoring for Efficient FSM Symbolic Traversal Based on the Transition Relation. ICCD Gianpiero Cabodi, Paolo Camurati
1993	—	`conf`	Exploiting Symbolic Traversal Techniques for Efficient Process Algebra Manipulation. CHDL Paolo Camurati, Fulvio Corno, Paolo Prinetto
1992	A*	`conf`	A New Model for Improving symbolic Product Machine Traversal. DAC Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Silvano Gai, Paolo Prinetto, Matteo Sonza Reorda
1992	Misc	`conf`	A simulation-based approach to test pattern generation for synchronous sequential circuits. VTS Paolo Camurati, Fulvio Corno, Fulvio Prinetto, Matteo Sonza Reorda
1992	—	`conf`	Cross-fertilizing FSM verification techniques and sequential diagnosis. EURO-DAC Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1992	A	`conf`	Sequential Circuit Diagnosis Based on Formal Verification Techniques. ITC Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1991	—	`conf`	Proving finite state machines correct with an automaton-based method. Great Lakes Symposium on VLSI Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda
1991	—	`conf`	Resolution-based correctness proofs of synchronous circuits. EURO-DAC Paolo Camurati, Tiziana Margaria, Paolo Prinetto
1991	J	`jnl`	TPDL: Extended Temporal Profile Description Language. Softw. Pract. Exp. Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1990	A	`conf`	A diagnostic test pattern generation algorithm. ITC Paolo Camurati, Davide Medina, Paolo Prinetto, Matteo Sonza Reorda
1990	J	`jnl`	Assessing the diagnostic power of test pattern sets. Microprocessing and Microprogramming Paolo Camurati, Antonio Lioy, Paolo Prinetto, Matteo Sonza Reorda
1990	—	`conf`	Diagnosis oriented test pattern generation. EURO-DAC Paolo Camurati, Antonio Lioy, Paolo Prinetto, Matteo Sonza Reorda
1990	J	`jnl`	Exact probabilistic testability measures for multi-output circuits. J. Electron. Test. Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1990	—	`conf`	Model Checking and Graph Theory in Sequential ATPG. CAV (DIMACS/AMS volume) Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda
1990	J	`jnl`	The OTTER environment for resolution-based proof of hardware correctness. Microprocessing and Microprogramming Paolo Camurati, Tiziana Margaria, Paolo Prinetto
1990	A*	`conf`	The Use of Model Checking in ATPG for Sequential Circuits. CAV Paolo Camurati, Marco Gilli, Paolo Prinetto, Matteo Sonza Reorda
1989	J	`jnl`	Expressing logical and temporal conditions in simulation environments: TPDL Microprocessing and Microprogramming Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1989	J	`jnl`	Knowledge-based systems as an aid to computer-aided repair. Microprocess. Microsystems Paolo Camurati, Marco Mezzalama, Paolo Prinetto
1989	J	`jnl`	Systolic array description in F Microprocessing and Microprogramming Paolo Camurati, Tiziana Margaria, Paolo Prinetto
1988	C	`conf`	A functional approach to formal hardware verification: the MTI experience. ICCD Dominique Borrione, Paolo Camurati, J. L. Paillet, Paolo Prinetto
1988	J	`jnl`	ESTA: an expert system for DFT rule verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Paolo Camurati, Paolo Gianoglio, Renato Gianoglio, Paolo Prinetto
1988	J	`jnl`	Formal Verification of Hardware Correctness: Introduction and Survey of Current Research. Computer Paolo Camurati, Paolo Prinetto
1988	C	`conf`	Random testability analysis: comparing and evaluating existing approaches. ICCD Paolo Camurati, Paolo Prinetto, Matteo Sonza Reorda
1986	—	`conf`	Experiences in Prolog-Based DFT Rule Checking. FJCC Gianpiero Cabodi, Paolo Camurati, Paolo Prinetto