Pankaj Pant - RankMe

17 papers A* 1A 10Misc 4Journal 2

Year	Rank	Type	Title / Venue / Authors
2024	A	`conf`	From Hybrid to Integrated: The Evolution of DFT Integration in SoC Design at Intel. ITC Brian Pajak, Pankaj Pant, Vidya Neerkundar
2024	A	`conf`	Functional State Extraction using Scan DFT. ITC Ilya Wagner, Pankaj Pant, Arani Sinha
2023	A	`conf`	Maximizing Stress Coverage by Novel DFT Techniques and Relaxed Timing Closure. ITC Arani Sinha, Glenn Colón-Bonet, Michael Fahy, Pankaj Pant, Haijing Mao, Akhilesh Shukla
2020	A	`conf`	Streaming Scan Network (SSN): An Efficient Packetized Data Network for Testing of Complex SoCs. ITC Jean-François Côté, Mark Kassab, Wojciech Janiszewski, Ricardo Rodrigues, Reinhard Meier, Bartosz Kaczmarek, Peter Orlando, Geir Eide, Janusz Rajski, Glenn Colón-Bonet, Naveen Mysore, Ya Yin, Pankaj Pant
2016	Misc	`conf`	Lateral coupling faults in multi-ported register files and methods for their testing. VTS Dilip Bhavsar, Michael Lohmiller, Pankaj Pant
2011	A	`conf`	Hardware hooks for transition scan characterization. ITC Pankaj Pant, Eric Skeels
2010	A	`conf`	Lessons from at-speed scan deployment on an Intel® Itanium® microprocessor. ITC Pankaj Pant, Joshua Zelman, Glenn Colón-Bonet, Jennifer Flint, Steve Yurash
2009	Misc	`conf`	Understanding Power Supply Droop during At-Speed Scan Testing. VTS Pankaj Pant, Joshua Zelman
2009	A	`conf`	Voltage transient detection and induction for debug and test. ITC Rex Petersen, Pankaj Pant, Pablo Lopez, Aaron Barton, Jim Ignowski, Doug Josephson
2002	J	`jnl`	On-chip decoupling capacitor optimization using architectural level prediction. IEEE Trans. Very Large Scale Integr. Syst. Mondira Deb Pant, Pankaj Pant, D. Scott Wills
2001	J	`jnl`	Path delay fault diagnosis in combinational circuits with implicitfault enumeration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pankaj Pant, Yuan-Chieh Hsu, Sandeep K. Gupta, Abhijit Chatterjee
2000	Misc	`conf`	Inductive Noise Reduction at the Architectural Level. VLSI Design Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari
2000	A	`conf`	Path-delay fault diagnosis in non-scan sequential circuits with at-speed test application. ITC Pankaj Pant, Abhijit Chatterjee
1999	A	`conf`	An architectural solution for the inductive noise problem due to clock-gating. ISLPED Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari
1999	A	`conf`	Efficient diagnosis of path delay faults in digital logic circuits. ICCAD Pankaj Pant, Abhijit Chatterjee
1997	A*	`conf`	Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks. DAC Pankaj Pant, Vivek De, Abhijit Chatterjee
1996	Misc	`conf`	Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages. VTS Abhijit Chatterjee, Rathish Jayabharathi, Pankaj Pant, Jacob A. Abraham