| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2004 | A | conf |
DATE
|
| 2003 | J | jnl |
Accelerating the compaction of test sequences in sequential circuits through problem size reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2002 | — | conf |
SETN
|
| 1999 | J | jnl |
Simul. Pract. Theory
|
| 1998 | J | jnl |
Inf. Process. Lett.
|
| 1997 | C | conf |
ADBIS
|
| 1997 | — | conf |
ICMC
|
| 1996 | — | conf |
ICECS
|
| 1996 | C | conf |
ADBIS
|
| 1994 | J | jnl |
Inf. Softw. Technol.
|
| 1994 | J | jnl |
Inf. Sci.
|