Palash Das

16 papers A 2C 1Misc 2Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2026 J jnl
Exploiting virtual channel allocation policies in STT-RAM buffers of NoC routers through hardware Trojan.
J. Syst. Archit.
Josna Philomina, Rekha K. James, Palash Das, Shirshendu Das, Daleesha M. Viswanathan
2026 Misc conf
Exploring Bit-Flip Attacks on DQNs with a Hash-Driven Defense Accelerator.
VLSID
Om Chandra Sharma, Anmol Yadav, Vihan Sachin Karnik, Palash Das
2026 J jnl
NeSTAR: Hardware Trojans and its mitigation strategy in NoC routers.
Integr.
Josna Philomina, Rekha K. James, Shirshendu Das, Palash Das, Daleesha M. Viswanathan
2025 A conf
Hybrid Token Selector based Accelerator for ViTs.
DATE
Akshansh Yadav, Anadi Goyal, Palash Das
2023 J jnl
ALAMNI: Adaptive LookAside Memory Based Near-Memory Inference Engine for Eliminating Multiplications in Real-Time.
IEEE Trans. Computers
Palash Das, Shashank Sharma, Hemangee K. Kapoor
2023 — conf
NDIE: A Near DRAM Inference Engine Exploiting DIMM's Parallelism.
APCCAS
Palash Das, Hemangee K. Kapoor
2023 J jnl
edAttack: Hardware Trojan Attack on On-Chip Packet Compression.
IEEE Des. Test
Atul Kumar, Dipika Deb, Shirshendu Das, Palash Das
2022 A conf
Hydra: A near hybrid memory accelerator for CNN inference.
DATE
Palash Das, Ajay Joshi, Hemangee K. Kapoor
2022 C conf
ZaLoBI: Zero avoiding Load Balanced Inference accelerator.
VLSI-SoC
Imlijungla Longchar, Palash Das, Hemangee K. Kapoor
2021 J jnl
CLU: A Near-Memory Accelerator Exploiting the Parallelism in Convolutional Neural Networks.
ACM J. Emerg. Technol. Comput. Syst.
Palash Das, Hemangee K. Kapoor
2021 J jnl
nZESPA: A Near-3D-Memory Zero Skipping Parallel Accelerator for CNNs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Palash Das, Hemangee K. Kapoor
2020 — conf
Dimming Hybrid Caches to Assist in Temperature Control of Chip MultiProcessors.
ACM Great Lakes Symposium on VLSI
Chirag Joshi, Palash Das, Ashwini A. Kulkarni, Hemangee K. Kapoor
2018 Misc conf
Towards Near Data Processing of Convolutional Neural Networks.
VLSID
Palash Das, Shivam Lakhotia, Prabodh Shetty, Hemangee K. Kapoor
2018 — conf
Towards Near-Data Processing of Compare Operations in 3D-Stacked Memory.
ACM Great Lakes Symposium on VLSI
Palash Das, Hemangee K. Kapoor
2014 J jnl
A comprehensive fault diagnosis technique for reversible logic circuits.
Comput. Electr. Eng.
Bikromadittya Mondal, Palash Das, Pradyut Sarkar, Susanta Chakraborty
2014 — conf
Signature analysis for synthesis of reversible circuit.
VDAT
Palash Das, Bikromadittya Mondal