Palanichamy Manikandan

14 papers C 2Journal 2Unranked 9
YearRankTypeTitle / Venue / Authors
2024 — conf
Advanced Path Delay Fault Testing Strategies in High-Performance Digital Circuits.
EWDTS
Palanichamy Manikandan, Ramesh Patel, Sundar Gopalakrishnan, Karthikeyan Palaniswamy
2024 — conf
Revolutionizing Industrial IoT with LoRaWAN for Smarter and Greener Industries.
EWDTS
Palanichamy Manikandan, Ramesh Patel, Sundar Gopalakrishnan, Karthikeyan Palaniswamy
2016 — conf
Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique.
ISVLSI
Papa-Sidi Ba, Sophie Dupuis, Palanichamy Manikandan, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015 — conf
Hardware Trojan prevention using layout-level design approach.
ECCTD
Papa-Sidi Ba, Palanichamy Manikandan, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015 J jnl
Selective Algorithms for Built-In Self-Test and Self-Diagnosis in Embedded SRAMS.
J. Low Power Electron.
Palanichamy Manikandan, Mohammad Areef, Bjørn B. Larsen, Vladimir Hahanov
2013 — —
Path Delay Fault Test and BIST.
Palanichamy Manikandan
2013 — conf
Quantum modeling and repairing digital systems.
EWDTS
Baghdadi Ammar Awni Abbas, Vladimir Ivanovich Hahanov, Palanichamy Manikandan, Eugenia Litvinova, S. Dementiev
2011 — conf
A programmable BIST with macro and micro codes for embedded SRAMs.
EWDTS
Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas, Mohammad Areef
2011 C conf
An Enhanced Path Delay Fault Simulator for Combinational Circuits.
DSD
Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas
2011 J jnl
Design of embedded TCAM based longest prefix match search engine.
Microprocess. Microsystems
Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas
2010 — conf
Experiments with ABIST test methodology applied to path delay fault testing.
EWDTS
Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas
2010 C conf
Path-Delay Fault Testing in Embedded Content Addressable Memories.
DSD
Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas
2009 — conf
Design of novel CAM core cell structures for an efficient implementation of low power BCAM system.
ACM Great Lakes Symposium on VLSI
Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas
2006 — conf
Asynchronous Design Methodology for an Efficient Implementation of Low power ALU.
APCCAS
Palanichamy Manikandan, B. D. Liu, L. Y. Chiou, G. Sundar, Chittaranjan R. Mandal