Pak K. Chan - RankMe

27 papers A* 4A 6C 4Misc 2Journal 11

Year	Rank	Type	Title / Venue / Authors
2003	A	`conf`	Parallel placement for field-programmable gate arrays. FPGA Pak K. Chan, Martine D. F. Schlag
2000	C	`conf`	A low-offset class-AB CMOS operational amplifier. ISCAS Pak K. Chan, Liter Siek, Hwee C. Tay, Jing H. Su
2000	J	`jnl`	Distributed-memory parallel routing for field-programmable gatearrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag, Carl Ebeling, Larry McMurchie
2000	A	`conf`	New parallelization and convergence results for NC: a negotiation-based FPGA router. FPGA Pak K. Chan, Martine D. F. Schlag
1999	J	`jnl`	Multilevel spectral hypergraph partitioning with arbitrary vertex sizes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jason Y. Zien, Martine D. F. Schlag, Pak K. Chan
1999	Misc	`conf`	Reducing Compilation Time of Zhong's FPGA-Based SAT Solver. FCCM Pak K. Chan, Mark J. Boyd, Sezer Gören, K. Klenk, V. Kodavati, R. Kundu, M. Margolese, J. Sun, Katsuharu Suzuki, E. Thorne, X. Wang, J. Xu, M. Zhu
1997	Misc	`conf`	Acceleration of an FPGA router. FCCM Pak K. Chan, Martine D. F. Schlag
1997	A	`conf`	Hybrid spectral/iterative partitioning. ICCAD Jason Y. Zien, Pak K. Chan, Martine D. F. Schlag
1996	A	`conf`	Multi-level spectral hypergraph partitioning with arbitrary vertex sizes. ICCAD Jason Y. Zien, Martine D. F. Schlag, Pak K. Chan
1996	J	`jnl`	Spectral-based multiway FPGA partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1995	A	`ed.`	Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays,FPGA 1995, Monterey, California, USA, February 12-14, 1995 FPGA Pak K. Chan, Jonathan Rose
1995	A	`conf`	Spectral-Based Multi-Way FPGA Partitioning. FPGA Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1994	J	`jnl`	Routability-driven technology mapping for lookup table-based FPGA's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Martine D. F. Schlag, Jackson Kong, Pak K. Chan
1994	J	`jnl`	Spectral K-way ratio-cut partitioning and clustering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1993	J	`jnl`	Empirical evaluation of multilevel logic minimization tools for a lookup-table-based field-programmable gate array technology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Martine D. F. Schlag, Pak K. Chan, Jackson Kong
1993	A*	`conf`	On Routability Prediction for Field-Programmable Gate Arrays. DAC Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1993	A*	`conf`	Spectral DAC Pak K. Chan, Martine D. F. Schlag, Jason Y. Zien
1992	J	`jnl`	Delay Optimization of Carry-Skip Adders and Block Carry-Lookahead Adders Using Multidimensional Dynamic Programming. IEEE Trans. Computers Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija
1992	C	`conf`	Routability-Driven Techology Mapping for LookUp-Table-Based FPGAs. ICCD Martine D. F. Schlag, Jackson Kong, Pak K. Chan
1991	J	`jnl`	Comments on 'Asymptotic waveform evaluation for timing analysis'. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan
1991	C	`conf`	Delay optimization of carry-skip adders and block carry-lookahead adders. IEEE Symposium on Computer Arithmetic Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija
1990	A*	`conf`	Algorithms for Library-Specific Sizing of Combinational Logic. DAC Pak K. Chan
1990	J	`jnl`	Analysis and Design of CMOS Manchester Adders with Variable Carry-Skip. IEEE Trans. Computers Pak K. Chan, Martine D. F. Schlag
1990	J	`jnl`	Computing signal delay in general RC networks by tree/link partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Kevin Karplus
1989	C	`conf`	Analysis and design of CMOS Manchester adders with variable carry-skip. IEEE Symposium on Computer Arithmetic Pak K. Chan, Martine D. F. Schlag
1989	J	`jnl`	Bounds on signal delay in RC mesh networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pak K. Chan, Martine D. F. Schlag
1989	A*	`conf`	Computing Signal Delay in General RC Networks by Tree/Link Partitioning. DAC Pak K. Chan, Kevin Karplus