Pablo Robelly

11 papers A 1Journal 1Unranked 9
YearRankTypeTitle / Venue / Authors
2008 J jnl
A HW/SW design methodology for embedded SIMD vector signal processors.
Int. J. Embed. Syst.
Pablo Robelly, Gordon Cichon, Hendrik Ahlendorf, Gerhard P. Fettweis
2008 — conf
A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals.
ESSCIRC
Torsten Limberg, Markus Winter, Marcel Bimberg, Reimund Klemm, Emil Matús, Marcos B. S. Tavares, Gerhard P. Fettweis, Hendrik Ahlendorf, Pablo Robelly
2006 — conf
A GFLOPS Vector-DSP for Broadband Wireless Applications.
CICC
E. Matu, Hendrik Seidel, Torsten Limberg, Pablo Robelly, Gerhard P. Fettweis
2006 A conf
Energy efficiency vs. programmability trade-off: architectures and design principles.
DATE
Pablo Robelly, Hendrik Seidel, K. C. Chen, Gerhard P. Fettweis
2005 — conf
A Compiler-friendly and Low-power DSP architecture.
GI Jahrestagung (1)
Emil Matús, Gordon Cichon, Hendrik Seidel, Pablo Robelly, Torsten Limberg, Gerhard P. Fettweis
2005 — conf
Two-Dimensional Fast Cosine Transform for Vector-STA Architectures.
SAMOS
Pablo Robelly, Arne Lehmann, Gerhard P. Fettweis
2004 — conf
Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach.
PARELEC
Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard P. Fettweis
2004 — conf
Compiler Scheduling for STA-Processors.
PARELEC
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Marcus Bronzel, Gerhard P. Fettweis
2004 — conf
Generated DSP Cores for Implementation of an OFDM Communication System.
SAMOS
Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis
2004 — conf
Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver.
PARELEC
Hendrik Seidel, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard P. Fettweis
2004 — conf
Synchronous Transfer Architecture (STA).
SAMOS
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard P. Fettweis