Pablo Peñil

25 papers B 1C 9Misc 1Journal 8Unranked 5
YearRankTypeTitle / Venue / Authors
2017 J jnl
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocess. Microsystems
Kim Grüttner, Ralph Görgen, Sören Schreiner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Emanuele Vitali, Davide Zoni, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Nima Khalilzad, Davide Quaglia
2017 J jnl
High-Level Design of Wireless Sensor Networks for Performance Optimization Under Security Hazards.
ACM Trans. Sens. Networks
Pablo Peñil, Álvaro Díaz Suárez, Hector Posadas, Julio L. Medina, Pablo Sánchez Espeso
2017 — —
Metodología de modelo único para el diseño de sistemas empotrados heterogéneos basada en UML/MARTE.
Pablo Peñil
2017 J jnl
Synthesis of simulation and implementation code for OpenMAX multimedia heterogeneous systems from UML/MARTE models.
Multim. Tools Appl.
David de la Fuente, Jesús Barba, Juan Carlos López, Pablo Peñil, Héctor Posadas, Pablo Sánchez Espeso
2016 C conf
CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties.
DSD
Ralph Görgen, Kim Grüttner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Davide Quaglia
2015 C conf
A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems.
SCOPES
Fernando Herrera, Pablo Peñil, Eugenio Villar
2015 J jnl
Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics.
J. Syst. Archit.
Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
2015 C conf
Building a dynamically reconfigurable system through a high development flow.
FDL
David de la Fuente, Jesús Barba, Xerach Peña, Juan Carlos López, Pablo Peñil, Pablo Pedro Sanchez
2015 C conf
Enhancing analysability and time predictability in UML/MARTE component-based application models.
FDL
Fernando Herrera, Pablo Peñil, Eugenio Villar
2014 C conf
Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse.
DSD
Alejandro Nicolás, Pablo Peñil, Héctor Posadas, Eugenio Villar
2014 J jnl
Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation.
Microelectron. J.
Héctor Posadas, Pablo Peñil, Alejandro Nicolás, Eugenio Villar
2014 J jnl
Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project.
Microprocess. Microsystems
Héctor Posadas, Alejandro Nicolás, Pablo Peñil, Eugenio Villar, Florian Broekaert, Michel Bourdellès, Albert Cohen, Mihai T. Lazarescu, Luciano Lavagno, Andrei Sergeevich Terechko, Miguel Glassee, Manuel Prieto
2014 J jnl
The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems.
J. Syst. Archit.
Fernando Herrera, Hector Posadas, Pablo Peñil, Eugenio Villar, Francisco Ferrero, Raúl Valencia, Gianluca Palermo
2013 C conf
UML/MARTE Methodology for Automatic SystemC Code Generation of Openmax Multimedia Applications.
DSD
Pablo Peñil, Pablo Sánchez Espeso, David de la Fuente, Jesús Barba, Juan Carlos López
2012 Misc conf
A MDD methodology for specification of embedded systems and automatic generation of fast configurable and executable performance models.
CODES+ISSS
Fernando Herrera, Hector Posadas, Pablo Peñil, Eugenio Villar, Francisco Ferrero, Raúl Valencia
2012 C conf
A model-driven methodology for the development of SystemC executable environments.
FDL
Fernando Herrera, Pablo Peñil, Hector Posadas, Eugenio Villar
2012 — conf
Automatic synthesis from UML/MARTE models using channel semantics.
ACES-MB@MoDELS
Pablo Peñil, Héctor Posadas, Alejandro Nicolás, Eugenio Villar
2012 — conf
Model-Driven Methodology for the Development of Multi-level Executable Environments.
FDL (Selected Papers)
Fernando Herrera, Pablo Peñil, Hector Posadas, Eugenio Villar
2012 C conf
Modeling and simulation of secure wireless sensor network.
FDL
Álvaro Díaz Suárez, Pablo Peñil, Pablo Sánchez Espeso, Juan Sancho, Juan Rico
2012 — conf
The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systems.
DASIP
Fernando Herrera, Hector Posadas, Pablo Peñil, Eugenio Villar, Francisco Ferrero, Raúl Valencia
2010 C conf
Formal Foundations for MARTE-SystemC Interoperability.
FDL
Pablo Peñil, Fernando Herrera, Eugenio Villar
2010 B conf
Formal Modeling for UML/MARTE Concurrency Resources.
ICECCS
Pablo Peñil, Hector Posadas, Eugenio Villar
2010 J jnl
Generating heterogeneous executable specifications in SystemC from UML/MARTE models.
Innov. Syst. Softw. Eng.
Pablo Peñil, Julio L. Medina, Hector Posadas, Eugenio Villar
2010 — conf
The SATURN Approach to SysML-Based HW/SW Codesign.
ISVLSI (Selected papers)
Wolfgang Müller, Da He, Fabian Mischkalla, Arthur Wegele, Adrian Larkham, Paul Whiston, Pablo Peñil, Eugenio Villar, Nikolaos Mitas, Dimitrios Kritharidis, Florent Azcarate, Manuel Carballeda
2010 — conf
The SATURN Approach to SysML-Based HW/SW Codesign.
ISVLSI
Wolfgang Müller, Da He, Fabian Mischkalla, Arthur Wegele, Paul Whiston, Pablo Peñil, Eugenio Villar, Nikolaos Mitas, Dimitrios Kritharidis, Florent Azcarate, Manuel Carballeda