Pablo Ituero - RankMe

20 papers B 1C 4Journal 5Unranked 10

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Design Space Exploration of FPGA-Based Spiking Neural Networks for Angle of Arrival Detection. DCIS Cristina Bermúdez-Martín, Samuel López Asunción, Pablo Ituero
2025	B	`conf`	Efficient on-chip cross-subject local field potential decoding for implantable neural interfaces. IJCNN Arnau Marin-Llobet, Victoria Clerico, Samuel López Asunción, Arnau Manasanch, Irene Merino, Melody Torao-Angosto, Pablo Ituero, Maria V. Sanchez-Vives, Leonardo Dalla Porta
2022	—	`conf`	Data Synchronization in Non-Uniform Latency Custom DSP Designs. DCIS Samuel López Asunción, Pablo Ituero, Marisa López-Vallejo, Jesús Grajal
2022	J	`jnl`	Reference-free power supply monitor with enhanced robustness against process and temperature variations. Integr. Hernan Aparicio, Pablo Ituero, Marisa López-Vallejo
2020	J	`jnl`	A 900 μm2 BiCMOS Temperature Sensor for Dynamic Thermal Management. Sensors Hernan Aparicio, Pablo Ituero
2020	—	`conf`	STDP Design Trade-offs for FPGA-Based Spiking Neural Networks. DCIS Rafael Medina Morillas, Pablo Ituero
2019	—	`conf`	Time-Domain Coding for Resource-Efficient Deep Neural Networks. DCIS Sergio Ávalos-Legaz, Pablo Ituero
2018	—	`conf`	A 40nm Critical Path Monitor for the Detection of Setup and Hold Time Violations. PATMOS Hernan Aparicio, Pablo Ituero
2017	J	`jnl`	Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges. IEEE Trans. Very Large Scale Integr. Syst. Fernando García-Redondo, Pablo Royer, Marisa López-Vallejo, Hernan Aparicio, Pablo Ituero, Carlos A. López-Barrio
2016	—	`conf`	Reliable design methodology: The combined effect of radiation, variability and temperature. SMACD Fernando García-Redondo, Marisa López-Vallejo, Hernan Aparicio, Pablo Ituero
2016	—	`conf`	Statistically-aided electronic design environment. SMACD Carlos Gil-Soriano, Pablo Ituero
2015	C	`conf`	A thermal adaptive scheme for reliable write operation on RRAM based architectures. ICCD Fernando García-Redondo, Marisa López-Vallejo, Pablo Ituero
2014	J	`jnl`	A Self-Timed Multipurpose Delay Sensor for Field Programmable Gate Arrays (FPGAs). Sensors Carlos Gómez Osuna, Pablo Ituero, Marisa López-Vallejo
2013	J	`jnl`	A 0.0016 mm Sensors Pablo Ituero, Marisa López-Vallejo, Carlos A. López-Barrio
2013	C	`conf`	A Low-Area Reference-Free Power Supply Sensor. DSD Carlos Benito, Pablo Ituero, Marisa López-Vallejo
2012	—	`conf`	A monitoring infrastructure for FPGA self-awareness and dynamic adaptation. ICECS Carlos Gómez Osuna, Miguel A. Sánchez Marcos, Pablo Ituero, Marisa López-Vallejo
2011	C	`conf`	On-chip Monitoring: A Light-Weight Interconnection Network Approach. DSD Pablo Ituero, Marisa López-Vallejo, Miguel A. Sánchez Marcos, Carlos Gómez Osuna
2007	—	`conf`	Joint Source-Channel Decoding ASIP Architecture for Sensor Networks. ICESS Pablo Ituero, Gorka Landaburu, Javier Del Ser, Marisa López-Vallejo, Pedro M. Crespo, Vicente Atxa, Jon Altuna
2007	C	`conf`	Leakage-based On-Chip Thermal Sensor for CMOS Technology. ISCAS Pablo Ituero, José L. Ayala, Marisa López-Vallejo
2006	—	`conf`	New Schemes in Clustered VLIW Processors Applied to Turbo Decoding. ASAP Pablo Ituero, Marisa López-Vallejo