P. Balasubramanian

49 papers C 5Journal 36Unranked 8

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	Fault-Tolerant Design Approach Based on Approximate Computing. CoRR P. Balasubramanian, Douglas L. Maskell
2021	J	`jnl`	Gate-Level Static Approximate Adders. CoRR P. Balasubramanian, Raunaq Nayar, Douglas L. Maskell
2020	J	`jnl`	Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. CoRR P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2019	—	`conf`	Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. EECS P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2019	J	`jnl`	Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. CoRR P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2019	J	`jnl`	Generalized Majority Voter Design Method for N-Modular Redundant Systems Used in Mission- and Safety-Critical Applications. Comput. Jaytrilok Choudhary, P. Balasubramanian, Danny M. Varghese, Dhirendra Pratap Singh, Douglas L. Maskell
2019	J	`jnl`	Indicating Asynchronous Array Multipliers. CoRR P. Balasubramanian, Douglas L. Maskell
2019	J	`jnl`	Indicating Asynchronous Multipliers. CoRR P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2019	J	`jnl`	Majority and Minority Voted Redundancy for Safety-Critical Applications. CoRR P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2019	J	`jnl`	Performance Comparison of Quasi-Delay-Insensitive Asynchronous Adders. CoRR P. Balasubramanian
2019	J	`jnl`	Speed and Energy Optimised Quasi-Delay-Insensitive Block Carry Lookahead Adder. CoRR P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2018	J	`jnl`	A Self-Healing Redundancy Scheme for Mission/Safety-Critical Applications. IEEE Access P. Balasubramanian, Douglas L. Maskell
2018	C	`conf`	A System Health Indicator for the Distributed Minority and Majority Voting Based Redundancy Scheme. TENCON P. Balasubramanian, Douglas L. Maskell, Krishnamachar Prasad
2018	J	`jnl`	Approximate Early Output Asynchronous Adders Based on Dual-Rail Data Encoding and 4-Phase Return-to-Zero and Return-to-One Handshaking. CoRR P. Balasubramanian
2018	—	`conf`	Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. MWSCAS P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2018	J	`jnl`	Asynchronous Ripple Carry Adder based on Area Optimized Early Output Dual-Bit Full Adder. CoRR P. Balasubramanian
2018	J	`jnl`	Comments on "Dual-rail asynchronous logic multi-level implementation". CoRR P. Balasubramanian
2018	C	`conf`	Hardware Efficient Approximate Adder Design. TENCON P. Balasubramanian, Douglas L. Maskell
2018	—	`conf`	Indicating Asynchronous Multipliers. EECS P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2018	—	`conf`	Majority and Minority Voted Redundancy for Safety-Critical Applications. MWSCAS P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
2018	J	`jnl`	Performance Comparison of some Synchronous Adders. CoRR P. Balasubramanian
2017	J	`jnl`	A Critique on "Asynchronous Logic Implementation Based on Factorized DIMS". CoRR P. Balasubramanian
2017	—	`conf`	A comparison of quasi-delay-insensitive asynchronous adder designs corresponding to return-to-zero and return-to-one handshaking. MWSCAS P. Balasubramanian, Cuong Dang
2017	J	`jnl`	Approximate Ripple Carry and Carry Lookahead Adders - A Comparative Analysis. CoRR P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad
2017	—	`conf`	Approximate quasi-delay-insensitive asynchronous adders: Design and analysis. MWSCAS P. Balasubramanian, Cuong Dang, Douglas L. Maskell
2017	J	`jnl`	Asynchronous Early Output Dual-Bit Full Adders Based on Homogeneous and Heterogeneous Delay-Insensitive Data Encoding. CoRR P. Balasubramanian, K. Prasad
2017	J	`jnl`	Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic. CoRR P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad
2017	J	`jnl`	Latency Optimized Asynchronous Early Output Ripple Carry Adder based on Delay-Insensitive Dual-Rail Data Encoding. CoRR P. Balasubramanian, K. Prasad
2017	J	`jnl`	Mathematical Estimation of Logical Masking Capability of Majority/Minority Gates Used in Nanoelectronic Circuits. CoRR P. Balasubramanian, R. T. Naayagi
2017	J	`jnl`	Redundant Logic Insertion and Fault Tolerance Improvement in Combinational Circuits. CoRR P. Balasubramanian, R. T. Naayagi
2016	J	`jnl`	A Fault Tolerance Improved Majority Voter for TMR System Architectures. CoRR P. Balasubramanian, K. Prasad, Nikos E. Mastorakis
2016	J	`jnl`	ASIC-based Implementation of Synchronous Section-Carry Based Carry Lookahead Adders. CoRR P. Balasubramanian, Nikos E. Mastorakis
2016	J	`jnl`	An Asynchronous Early Output Full Adder and a Relative-Timed Ripple Carry Adder. CoRR P. Balasubramanian, Nikos E. Mastorakis
2016	J	`jnl`	Area/latency optimized early output asynchronous full adders and relative-timed ripple carry adders. CoRR P. Balasubramanian, Shigeru Yamashita
2016	J	`jnl`	Comments on "Dual-rail asynchronous logic multi-level implementation". Integr. P. Balasubramanian
2016	J	`jnl`	Design of Synchronous Section-Carry Based Carry Lookahead Adders with Improved Figure of Merit. CoRR P. Balasubramanian, Nikos E. Mastorakis
2016	J	`jnl`	Early Output Hybrid Input Encoded Asynchronous Full Adder and Relative-Timed Ripple Carry Adder. CoRR P. Balasubramanian, K. Prasad
2016	J	`jnl`	FPGA Based Implementation of Distributed Minority and Majority Voting Based Redundancy for Mission and Safety-Critical Applications. CoRR P. Balasubramanian, Nikos E. Mastorakis
2016	J	`jnl`	Global versus Local Weak-Indication Self-Timed Function Blocks - A Comparative Analysis. CoRR P. Balasubramanian, Nikos E. Mastorakis
2016	J	`jnl`	Power, Delay and Area Comparisons of Majority Voters relevant to TMR Architectures. CoRR P. Balasubramanian, Nikos E. Mastorakis
2016	J	`jnl`	System Reliability, Fault Tolerance and Design Metrics Tradeoffs in the Distributed Minority and Majority Voting Based Redundancy Scheme. CoRR P. Balasubramanian, Nikos E. Mastorakis
2015	J	`jnl`	A distributed minority and majority voting based redundancy scheme. Microelectron. Reliab. P. Balasubramanian, Douglas L. Maskell
2013	C	`conf`	On the Error Resiliency of Combinational Logic Cells - Implications for Nano-based Digital Design. PRDC P. Balasubramanian, Shigeru Yamashita
2013	J	`jnl`	Self-Timed Section-Carry Based Carry Lookahead Adders and the Concept of Alias Logic. J. Circuits Syst. Comput. P. Balasubramanian, David A. Edwards, William B. Toms
2012	J	`jnl`	Redundant Logic Insertion and Latency Reduction in Self-Timed Adders. VLSI Design P. Balasubramanian, David A. Edwards, William B. Toms
2009	—	`conf`	Dual-Sum Single-Carry Self-Timed Adder Designs. ISVLSI P. Balasubramanian, Doug A. Edwards
2009	C	`conf`	Self-timed full adder designs based on hybrid input encoding. DDECS P. Balasubramanian, David A. Edwards, Charlie Brej
2008	C	`conf`	A New Design Technique for Weakly Indicating Function Blocks. DDECS P. Balasubramanian, David A. Edwards
2008	—	`conf`	Efficient Realization of Strongly Indicating Function Blocks. ISVLSI P. Balasubramanian, David A. Edwards