Osamu Watanabe

17 papers Journal 10Unranked 7
YearRankTypeTitle / Venue / Authors
2014 — conf
20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication.
ISSCC
Shigehito Saigusa, Toshiya Mitomo, Hidenori Okuni, Masahiro Hosoya, Akihide Sai, Shusuke Kawai, Tong Wang, Masanori Furuta, Kei Shiraishi, Koichiro Ban, Seiichiro Horikawa, Tomoya Tandai, Ryoko Matsuo, Takeshi Tomizawa, Hiroaki Hoshino, Junya Matsuno, Yukako Tsutsumi, Ryoichi Tachibana, Osamu Watanabe, Tetsuro Itakura
2013 J jnl
A 60 GHz Power Amplifier with 10 GHz 1-dB Bandwidth and 13.6% PAE in 65 nm CMOS.
IEICE Trans. Electron.
Tong Wang, Toshiya Mitomo, Naoko Ono, Shigehito Saigusa, Osamu Watanabe
2012 J jnl
A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion.
IEEE J. Solid State Circuits
Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka
2012 — conf
A digitally stabilized type-III PLL using ring VCO with 1.01psrms integrated jitter in 65nm CMOS.
ISSCC
Akihide Sai, Yuka Kobayashi, Shigehito Saigusa, Osamu Watanabe, Tetsuro Itakura
2011 — conf
A 1.5GHz-modulation-range 10ms-modulation-period 180kHzrms-frequency-error 26MHz-reference mixed-mode FMCW synthesizer for mm-wave radar application.
ISSCC
Hiroki Sakurai, Yuka Kobayashi, Toshiya Mitomo, Osamu Watanabe, Shoji Otaka
2011 — conf
A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller.
CICC
Kohei Onizuka, Hiroaki Ishihara, Masahiro Hosoya, Shigehito Saigusa, Osamu Watanabe, Shoji Otaka
2010 J jnl
A 10-MHz Signal Bandwidth Cartesian Loop Transmitter Capable of Off-Chip PA Linearization.
IEEE J. Solid State Circuits
Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe
2010 — conf
A 10MHz signal bandwidth Cartesian-loop transmitter capable of off-chip PA linearization.
ISSCC
Hiroaki Ishihara, Masahiro Hosoya, Shoji Otaka, Osamu Watanabe
2010 J jnl
A 77 GHz 90 nm CMOS Transceiver for FMCW Radar Applications.
IEEE J. Solid State Circuits
Toshiya Mitomo, Naoko Ono, Hiroaki Hoshino, Yoshiaki Yoshihara, Osamu Watanabe, Ichiro Seto
2010 — conf
A 900-MHz bandwidth analog baseband circuit with 1-dB step and 30-dB gain dynamic range.
ESSCIRC
Masahiro Hosoya, Toshiya Mitomo, Osamu Watanabe
2008 J jnl
A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals.
IEICE Trans. Electron.
Osamu Watanabe, Rui Ito, Toshiya Mitomo, Shigehito Saigusa, Tadashi Arai, Takehiko Toyoda
2007 J jnl
A Fast
IEICE Trans. Electron.
Osamu Watanabe, Rui Ito, Shigehito Saigusa, Tadashi Arai, Tetsuro Itakura
2007 J jnl
A Quadrature Demodulator for WCDMA Receiver Using Common-Base Input Stage with Robustness to Transmitter Leakage.
IEICE Trans. Electron.
Toshiya Mitomo, Osamu Watanabe, Ryuichi Fujimoto, Shunji Kawaguchi
2006 — conf
A Quadrature Demodulator for WCDMA Receiver Using Common-Base Input Stage with Robustness to Transmitter Leakage.
CICC
Toshiya Mitomo, Osamu Watanabe, Ryuichi Fujimoto, Shunji Kawaguchi
2005 J jnl
A Low LO Leakage and Low Power LO Buffer for Direct-Conversion Quadrature Demodulator.
IEICE Trans. Electron.
Toshiya Mitomo, Osamu Watanabe, Shoji Otaka, Ryuichi Fujimoto, Shunji Kawaguchi
2003 J jnl
A four-input beam-forming downconverter for adaptive antennas.
IEEE J. Solid State Circuits
Takafumi Yamaji, Daisuke Kurose, Osamu Watanabe, Shuichi Obayashi, Tetsuro Itakura
2002 J jnl
A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Osamu Watanabe, Takafumi Yamaji, Tetsuro Itakura, Ichiro Hattori