Orod Razeghi

24 papers A 1Journal 12Unranked 10
YearRankTypeTitle / Venue / Authors
2023 J jnl
Comput. Biol. Medicine
José Alonso Solís-Lemus, Tiffany M. G. Baptiste, Rosie K. Barrows, Charles Sillett, Ali Gharaviri, Giulia Raffaele, Orod Razeghi, Marina Strocchi, Iain Sim, Irum Kotadia, Neil Bodagh, Daniel O'Hare, Mark D. O'Neill, Steven E. Williams, Caroline H. Roney, Steven A. Niederer
2023 J jnl
CoRR
José Alonso Solís-Lemus, Tiffany M. G. Baptiste, Rosie K. Barrows, Charles Sillett, Ali Gharaviri, Giulia Raffaele, Orod Razeghi, Marina Strocchi, Iain Sim, Irum Kotadia, Neil Bodagh, Daniel O'Hare, Mark D. O'Neill, Steven E. Williams, Caroline H. Roney, Steven A. Niederer
2023 J jnl
Comput. Biol. Medicine
Cesare Corrado, Caroline H. Roney, Orod Razeghi, José Alonso Solís-Lemus, Sam Coveney, Iain Sim, Steven E. Williams, Mark D. O'Neill, Richard D. Wilkinson, Richard H. Clayton, Steven A. Niederer
2022 J jnl
IEEE Trans. Biomed. Eng.
Elias Karabelas, Stefano Longobardi, Jana Fuchsberger, Orod Razeghi, Cristóbal Rodero, Marina Strocchi, Ronak Rajani, Gundolf Haase, Gernot Plank, Steven A. Niederer
2021 J jnl
CoRR
Elias Karabelas, Stefano Longobardi, Jana Fuchsberger, Orod Razeghi, Cristóbal Rodero, Marina Strocchi, Ronak Rajani, Gundolf Haase, Gernot Plank, Steven A. Niederer
2021 conf
FIMH
Orod Razeghi, Marina Strocchi, Cesare Corrado, Henry Chubb, Ronak Rajani, Daniel B. Ennis, Steven A. Niederer
2021 J jnl
Comput. Biol. Medicine
Angela W. C. Lee, Orod Razeghi, José Alonso Solís-Lemus, Marina Strocchi, Baldeep Sidhu, Justin Gould, Jonathan M. Behar, Mark K. Elliott, Vishal Mehta, Gernot Plank, Christopher A. Rinaldi, Steven A. Niederer
2021 conf
FIMH
Charles Sillett, Orod Razeghi, Marina Strocchi, Caroline H. Roney, Hugh O'Brien, Daniel B. Ennis, Ulrike Haberland, Ronak Rajani, Christopher A. Rinaldi, Steven A. Niederer
2021 conf
FIMH
Marina Strocchi, Christoph M. Augustin, Matthias A. F. Gsell, Elias Karabelas, Aurel Neic, Karli Gillette, Caroline H. Roney, Orod Razeghi, Jonathan M. Behar, Christopher A. Rinaldi, Edward J. Vigmond, Martin J. Bishop, Gernot Plank, Steven A. Niederer
2021 conf
FIMH
Marianne Beach, Iain Sim, Arihant Mehta, Irum Kotadia, Daniel O'Hare, John Whitaker, José Alonso Solís-Lemus, Orod Razeghi, Amedeo Chiribiri, Mark D. O'Neill, Steven Williams, Steven A. Niederer, Caroline H. Roney
2020 J jnl
SoftwareX
Orod Razeghi, José Alonso Solís-Lemus, Angela W. C. Lee, Rashed Karim, Cesare Corrado, Caroline H. Roney, Adelaide de Vecchi, Steven A. Niederer
2020 conf
CinC
Caroline H. Roney, Marianne Beach, Arihant Mehta, Iain Sim, Cesare Corrado, Rokas Bendikas, José Alonso Solís-Lemus, Orod Razeghi, John Whitaker, Louisa O'Neill, Gernot Plank, Edward J. Vigmond, Steven E. Williams, Mark D. O'Neill, Steven A. Niederer
2020 J jnl
Medical Image Anal.
Cesare Corrado, Orod Razeghi, Caroline H. Roney, Sam Coveney, Steven Williams, Iain Sim, Mark D. O'Neill, Richard Wilkinson, Jeremy E. Oakley, Richard H. Clayton, Steven A. Niederer
2020 conf
CinC
José Alonso Solís-Lemus, Orod Razeghi, Caroline H. Roney, Iain Sim, Rahul K. Mukherjee, Steven Williams, Mark D. O'Neill, Steven A. Niederer
2019 J jnl
Medical Image Anal.
Angela W. C. Lee, Uyen Chau Nguyen, Orod Razeghi, Justin Gould, Baldeep Sidhu, Benjamin Sieniewicz, Jonathan M. Behar, M. Mafi-Rad, Gernot Plank, Frits W. Prinzen, C. Aldo Rinaldi, Kevin Vernooy, Steven A. Niederer
2019 J jnl
Comput. Biol. Medicine
Caroline H. Roney, John Whitaker, Iain Sim, Louisa O'Neill, Rahul K. Mukherjee, Orod Razeghi, Edward J. Vigmond, Matthew Wright, Mark D. O'Neill, Steven E. Williams, Steven A. Niederer
2019 J jnl
CoRR
Orod Razeghi, Guoping Qiu
2019 J jnl
CoRR
Orod Razeghi, Guoping Qiu
2018 conf
STACOM@MICCAI
Coen de Vente, Mitko Veta, Orod Razeghi, Steven A. Niederer, Josien P. W. Pluim, Kawal S. Rhode, Rashed Karim
2017 conf
CinC
Orod Razeghi, Rashed Karim, John Whitaker, Catalina Tobon-Gomez, Steven A. Niederer
2015
Orod Razeghi
2014 conf
ISBI
Orod Razeghi, Guoping Qiu
2013 A conf
ICME
Orod Razeghi, Qian Zhang, Guoping Qiu
2012 conf
MLMI
Orod Razeghi, Guoping Qiu, Hywel Williams, Kim Thomas
redb/extractors/decompiler/bninja/arch/x86.py
← Index redb/extractors/decompiler/bninja/arch/x86.py python
from binaryninja.enums import (
    InstructionTextTokenType,
)

# Support both package and standalone imports
try:
    from .architecture import Architecture
except ImportError:
    # Fallback to absolute imports (for multiprocessing spawned processes)
    from redb.extractors.decompiler.bninja.arch.architecture import Architecture


class Arch_x86(Architecture):
    """The concrete class for architecture-dependent details for x86_64"""

    def __init__(self):
        # general purpose registers for 64bits
        self.gpr_64 = [
            "RAX",
            "RBX",
            "RCX",
            "RDX",
            "RSI",
            "RDIR9",
            "R10",
            "R11",
            "R12",
            "R13",
            "R14",
            "R15",
        ]

        self.gpr_32 = [
            "EAX",
            "EBX",
            "ECX",
            "EDX",
            "ESI",
            "EDI",
            "R8D",
            "R9D",
            "R10D",
            "R11D",
            "R12D",
            "R13D",
            "R14D",
            "R15D",
        ]

        self.gpr_16 = [
            "AX",
            "BX",
            "CX",
            "DX",
            "SI",
            "DI",
            "R8W",
            "R9W",
            "R10W",
            "R11W",
            "R12W",
            "R13W",
            "R14W",
            "R15W",
        ]

        self.gpr_8 = [
            "AL",
            "BL",
            "CL",
            "DL",
            "SIL",
            "DIL",
            "R8B",
            "R9B",
            "R10B",
            "R11B",
            "R12B",
            "R13B",
            "R14B",
            "R15B",
        ]

        self.fpu_x87 = ["ST0", "ST1", "ST2", "ST3", "ST4", "ST5", "ST6", "ST7"]

        self.sse_xmm = [
            "XMM0",
            "XMM1",
            "XMM2",
            "XMM3",
            "XMM4",
            "XMM5",
            "XMM6",
            "XMM7",
            "XMM8",
            "XMM9",
            "XMM10",
            "XMM11",
            "XMM12",
            "XMM13",
            "XMM14",
            "XMM15",
        ]

        self.avx_ymm = [
            "YMM0",
            "YMM1",
            "YMM2",
            "YMM3",
            "YMM4",
            "YMM5",
            "YMM6",
            "YMM7",
            "YMM8",
            "YMM9",
            "YMM10",
            "YMM11",
            "YMM12",
            "YMM13",
            "YMM14",
            "YMM15",
        ]
        self.flags = ["FLAGS", "EFLAGS", "RFLAGS"]
        self.stack_registers = ["RBP", "RSP", "SP", "BP"]
        self.size = 8
        self.global_registers = (
            self.gpr_64
            + self.gpr_32
            + self.gpr_16
            + self.gpr_8
            + self.fpu_x87
            + self.sse_xmm
            + self.avx_ymm
        )
        self.opcode_categories = self._initialize_opcode_categories()

        ## instructions
        self.instructions = []

    def is_register(self, register):
        register = register.upper()
        return register in self.global_registers

    def is_general_purpose_register(self, register):
        register = register.upper()
        return (
            register in self.gpr_64
            or register in self.gpr_32
            or register in self.gpr_16
            or register in self.gpr_8
        )

    def is_stack_register(self, register):
        register = register.upper()
        return register in self.stack_registers

    def is_xmm_register(self, register):
        register = register.upper()
        return register in self.sse_xmm

    def is_control_flow(self, instr_tokens):
        return False

    def is_control_flow_instruction(self, instr_tokens):
        """Check if an instruction is a control flow instruction (jump, call, return, loop)."""
        try:
            # Extract the mnemonic from the instruction tokens
            mnemonic = None
            for token in instr_tokens:
                if token.type == InstructionTextTokenType.InstructionToken:
                    mnemonic = token.text.upper()
                    break

            if not mnemonic:
                return False

            # Check if it's a jump, call, return, or loop instruction
            return (
                mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
                or mnemonic == "CALL"  # Function calls
                or mnemonic == "RET"  # Return
                or mnemonic == "RETN"  # Another form of return
                or mnemonic.startswith("LOOP")
            )  # Loop instructions

        except Exception as e:
            print(e)
            # If we can't determine, assume it's not a control flow instruction
            return False

    def is_control_flow_instruction_by_mnemonic(self, mnemonic):
        """Check if an instruction is a control flow instruction based on its mnemonic."""
        if not mnemonic:
            return False

        mnemonic = mnemonic.upper()
        return (
            mnemonic.startswith("J")  # All jumps (JMP, JE, JNE, etc.)
            or mnemonic == "CALL"  # Function calls
            or mnemonic == "RET"  # Return
            or mnemonic == "RETN"  # Another form of return
            or mnemonic.startswith("LOOP")
        )

    def _initialize_opcode_categories(self):
        """Initialize mapping of opcodes to categories similar to Ghidra's implementation."""
        opcode_categories = {}
        opcode_index = {}  # Add this to mimic Ghidra's opcodeIndex

        # Define common opcodes array similar to Ghidra's COMMON_OPCODES
        COMMON_OPCODES = [
            # Core instructions (tracked individually)
            "MOV",
            "PUSH",
            "POP",
            "LEA",
            "CALL",
            "RET",  # Data movement and control
            "ADD",
            "SUB",
            "MUL",
            "DIV",  # Basic arithmetic
            "AND",
            "OR",
            "XOR",
            "NOT",  # Logical operations
            "JMP",
            "JE",
            "JNE",  # Basic jumps
            "TEST",
            "CMP",  # Comparisons
            # Grouped categories (aggregated tracking)
            "SIMD_MOVE",  # MOVAPS, MOVDQA, MOVDQU, etc.
            "COND_JUMP_EXT",  # Other conditional jumps (JG, JL, JGE, etc.)
            "STRING_OP",  # MOVS, STOS, LODS, SCAS, CMPS
            "STACK_ADV",  # ENTER, LEAVE, PUSHA, POPA
            "ARITHMETIC_ADV",  # IMUL, IDIV, ADC, SBB
            "BIT_OP",  # SHL, SHR, SAR, ROL, ROR, etc.
            "FPU_OP",  # FLD, FST, FADD, etc.
            "SYSTEM_OP",  # SYSCALL, INT, SYSENTER
            "CRYPTO_OP",  # AES*, SHA* instructions
            "MISC_OP",  # Rare but interesting (CPUID, RDTSC, etc.)
        ]

        # Create index map like Ghidra
        for i, opcode in enumerate(COMMON_OPCODES):
            opcode_index[opcode] = i

        # Now categorize opcodes using if/elif/else structure like in Ghidra
        for opcode in COMMON_OPCODES:
            # String Operations (checking these first to avoid MOV confusion)
            if opcode.startswith("MOVS") or opcode in [
                "STOS",
                "LODS",
                "SCAS",
                "CMPS",
                "REP",
                "REPE",
                "REPNE",
            ]:
                opcode_categories[opcode] = "STRING_MANIPULATION"

            # Data Movement (after string ops to avoid MOVS confusion)
            elif opcode.startswith("MOV") or opcode in ["LEA", "XCHG"]:
                opcode_categories[opcode] = "DATA_MOVEMENT"

            # Stack Operations
            elif opcode in ["PUSH", "POP", "ENTER", "LEAVE", "PUSHA", "POPA"]:
                opcode_categories[opcode] = "STACK_MANAGEMENT"

            # Control Flow (non-conditional)
            elif opcode in ["JMP", "CALL", "RET"]:
                opcode_categories[opcode] = "CONTROL_FLOW"

            # Conditional Jumps and Loops
            elif opcode.startswith("J") or opcode.startswith("LOOP"):
                opcode_categories[opcode] = "CONDITIONAL_JUMP"

            # Arithmetic
            elif opcode in [
                "ADD",
                "SUB",
                "MUL",
                "DIV",
                "IMUL",
                "IDIV",
                "ADC",
                "SBB",
                "INC",
                "DEC",
                "NEG",
            ]:
                opcode_categories[opcode] = "ARITHMETIC"

            # Logical
            elif opcode in ["AND", "OR", "XOR", "NOT", "TEST", "CMP"]:
                opcode_categories[opcode] = "LOGICAL"

            # Shifts & Rotates
            elif opcode in ["SHL", "SHR", "SAR", "SAL", "ROL", "ROR", "RCL", "RCR"]:
                opcode_categories[opcode] = "SHIFT_ROTATE"

            # System & Interrupts
            elif opcode in [
                "SYSCALL",
                "INT",
                "SYSENTER",
                "SYSEXIT",
                "SGDT",
                "SIDT",
                "SLDT",
                "WRMSR",
                "RDMSR",
            ]:
                opcode_categories[opcode] = "SYSTEM_CALLS"

            # Floating Point
            elif opcode.startswith("F"):
                opcode_categories[opcode] = "FPU_ARITHMETIC"

            # System Information and Random Number Generation
            elif opcode in ["PUSHF", "POPF", "CPUID", "RDTSC", "RDRAND", "RDSEED"]:
                opcode_categories[opcode] = "CPU_FEATURES"

            # Cryptography
            elif opcode.startswith("AES") or opcode.startswith("SHA"):
                opcode_categories[opcode] = "CRYPTOGRAPHIC"

            # Miscellaneous (including flag operations)
            else:
                opcode_categories[opcode] = "MISC"

        # Additional categorization for opcodes not in COMMON_OPCODES
        # This can be used in the normalize_opcode method

        # Store both maps as instance variables
        # self.opcode_categories = opcode_categories
        self.opcode_index = opcode_index

        return opcode_categories

    def is_simd_register(self, register):
        return register in self.sse_xmm