Ondrej Cekan - RankMe

24 papers C 13Journal 2Unranked 8

Year	Rank	Type	Title / Venue / Authors
2024	—	`—`	Principy generování testovacích stimulů ; Principles of test stimuli generation. Ondrej Cekan
2021	—	`conf`	Testing Embedded Software Through Fault Injection: Case Study on Smart Lock. LATS Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek
2020	—	`conf`	Analysis of Software-Implemented Fault Tolerance: Case Study on Smart Lock. EWDTS Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek
2020	C	`conf`	Automatic Design of Reliable Systems Based on the Multiple-choice Knapsack Problem. DDECS Jakub Lojda, Jakub Podivinsky, Ondrej Cekan, Richard Panek, Martin Krcma, Zdenek Kotásek
2020	—	`conf`	Evaluation Platform For Testing Fault Tolerance: Testing Reliability of Smart Electronic Locks. LASCAS Jakub Podivinsky, Jakub Lojda, Richard Panek, Ondrej Cekan, Martin Krcma, Zdenek Kotásek
2020	C	`conf`	Hardening of Smart Electronic Lock Software against Random and Deliberate Faults. DSD Jakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek
2020	—	`conf`	Iterative Algorithm for Multidimensional Pareto Frontiers Intersection Determination. LASCAS Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Radek Burget, Tomas Hruska, Zdenek Kotásek
2019	C	`conf`	Multidimensional Pareto Frontiers Intersection Determination and Processor Optimization Case Study. DSD Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Radek Burget, Tomas Hruska, Zdenek Kotásek
2019	C	`conf`	Testing Reliability of Smart Electronic Locks: Analysis and the First Steps Towards. DSD Ondrej Cekan, Jakub Podivinsky, Jakub Lojda, Richard Panek, Martin Krcma, Zdenek Kotásek
2018	—	`conf`	A Processor Optimization Framework for a Selected Application. EWDTS Jalab Podivinsky, Ondrej Cekan, Martin Krcma, Radek Burget, Tomas Hruska, Zdenek Kotásek
2018	C	`conf`	Evaluation Platform for Testing Fault Tolerance Properties: Soft-core Processor-Based Experimental Robot Controller. DSD Jakub Podivinsky, Jakub Lojda, Ondrej Cekan, Zdenek Kotásek
2018	C	`conf`	FT-EST Framework: Reliability Estimation for the Purposes of Fault-Tolerant System Design Automation. DSD Jakub Lojda, Jakub Podivinsky, Ondrej Cekan, Richard Panek, Zdenek Kotásek
2018	—	`conf`	Input and Output Generation for the Verification of ALU: A Use Case. EWDTS Ondrej Cekan, Richard Panek, Zdenek Kotásek
2018	C	`conf`	Program Generation Through a Probabilistic Constrained Grammar. DSD Ondrej Cekan, Jakub Podivinsky, Zdenek Kotásek
2017	C	`conf`	A Probabilistic Context-Free Grammar Based Random Test Program Generation. DSD Ondrej Cekan, Zdenek Kotásek
2017	J	`jnl`	Functional verification based platform for evaluating fault tolerance properties. Microprocess. Microsystems Jakub Podivinsky, Ondrej Cekan, Jakub Lojda, Marcela Zachariásová, Martin Krcma, Zdenek Kotásek
2017	C	`conf`	Reliability Analysis and Improvement of FPGA-Based Robot Controller. DSD Jakub Podivinsky, Jakub Lojda, Ondrej Cekan, Richard Panek, Zdenek Kotásek
2016	—	`conf`	Functional verification as a tool for monitoring impact of faults in SRAM-based FPGAs. FPT Jakub Podivinsky, Ondrej Cekan, Jakub Lojda, Zdenek Kotásek
2016	—	`conf`	Random stimuli generation based on a stochastic context-free grammar. FPT Ondrej Cekan, Jakub Podivinsky, Zdenek Kotásek
2016	C	`conf`	Verification of Robot Controller for Evaluating Impacts of Faults in Electro-Mechanical Systems. DSD Jakub Podivinsky, Ondrej Cekan, Jakub Lojda, Zdenek Kotásek
2015	C	`conf`	FPGA Prototyping and Accelerated Verification of ASIPs. DDECS Jakub Podivinsky, Marcela Simková, Ondrej Cekan, Zdenek Kotásek
2015	C	`conf`	Software Fault Tolerance: The Evaluation by Functional Verification. DSD Ondrej Cekan, Jakub Podivinsky, Zdenek Kotásek
2015	J	`jnl`	The evaluation platform for testing fault-tolerance methodologies in electro-mechanical applications. Microprocess. Microsystems Jakub Podivinsky, Ondrej Cekan, Marcela Simková, Zdenek Kotásek
2014	C	`conf`	The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications. DSD Jakub Podivinsky, Ondrej Cekan, Marcela Simková, Zdenek Kotásek