Omid Azizi

12 papers A* 5A 1B 1C 1Journal 3
YearRankTypeTitle / Venue / Authors
2014 A* conf
SI-TM: reducing transactional memory abort rates through snapshot isolation.
ASPLOS
Heiner Litz, David R. Cheriton, Amin Firoozshahian, Omid Azizi, John P. Stevenson
2013 A* conf
Hybrid latency tolerance for robust energy-efficiency on 1000-core data parallel processors.
HPCA
Neal Clayton Crago, Omid Azizi, Steven S. Lumetta, Sanjay J. Patel
2012 A* conf
HICAMP: architectural support for efficient concurrency-safe shared structured data access.
ASPLOS
David R. Cheriton, Amin Firoozshahian, Alex Solomatnikov, John P. Stevenson, Omid Azizi
2012 — ch.
Processor Optimization for Energy Efficiency.
Handbook of Energy-Aware and Green Computing
Omid Azizi, Benjamin C. Lee
2011 J jnl
Understanding sources of ineffciency in general-purpose chips.
Commun. ACM
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz
2010 A conf
An integrated framework for joint design space exploration of microarchitecture and circuits.
DATE
Omid Azizi, Aqeel Mahesri, John P. Stevenson, Sanjay J. Patel, Mark Horowitz
2010 A* conf
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis.
ISCA
Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay J. Patel, Mark Horowitz
2010 J jnl
Rethinking Digital Design: Why Design Must Change.
IEEE Micro
Ofer Shacham, Omid Azizi, Megan Wachs, Stephen Richardson, Mark Horowitz
2010 A* conf
Understanding sources of inefficiency in general-purpose chips.
ISCA
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz
2009 J jnl
Area-efficiency in CMP core design: co-optimization of microarchitecture and physical design.
SIGARCH Comput. Archit. News
Omid Azizi, Aqeel Mahesri, Sanjay J. Patel, Mark Horowitz
2008 B conf
Processor Performance Modeling using Symbolic Simulation.
ISPASS
Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz
2007 C conf
Robust Energy-Efficient Adder Topologies.
IEEE Symposium on Computer Arithmetic
Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman